1 /* $NetBSD: zs.c,v 1.111 2008/06/13 13:10:18 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Zilog Z8530 Dual UART driver (machine-dependent part) 34 * 35 * Runs two serial lines per chip using slave drivers. 36 * Plain tty/async lines use the zs_async slave. 37 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.111 2008/06/13 13:10:18 cegger Exp $"); 42 43 #include "opt_ddb.h" 44 #include "opt_kgdb.h" 45 #include "opt_sparc_arch.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/conf.h> 50 #include <sys/device.h> 51 #include <sys/file.h> 52 #include <sys/ioctl.h> 53 #include <sys/kernel.h> 54 #include <sys/proc.h> 55 #include <sys/tty.h> 56 #include <sys/time.h> 57 #include <sys/syslog.h> 58 #include <sys/intr.h> 59 60 #include <machine/bsd_openprom.h> 61 #include <machine/autoconf.h> 62 #include <machine/eeprom.h> 63 #include <machine/psl.h> 64 #include <machine/z8530var.h> 65 66 #include <dev/cons.h> 67 #include <dev/ic/z8530reg.h> 68 69 #include <sparc/sparc/vaddrs.h> 70 #include <sparc/sparc/auxreg.h> 71 #include <sparc/sparc/auxiotwo.h> 72 #include <sparc/dev/cons.h> 73 #include <dev/sun/kbd_ms_ttyvar.h> 74 75 #include "kbd.h" 76 #include "ms.h" 77 #include "wskbd.h" 78 79 /* 80 * Some warts needed by z8530tty.c - 81 * The default parity REALLY needs to be the same as the PROM uses, 82 * or you can not see messages done with printf during boot-up... 83 */ 84 int zs_def_cflag = (CREAD | CS8 | HUPCL); 85 86 /* 87 * The Sun provides a 4.9152 MHz clock to the ZS chips. 88 */ 89 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 90 91 #define ZS_DELAY() (CPU_ISSUN4C ? (0) : delay(2)) 92 93 /* The layout of this is hardware-dependent (padding, order). */ 94 struct zschan { 95 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */ 96 uint8_t zc_xxx0; 97 volatile uint8_t zc_data; /* data */ 98 uint8_t zc_xxx1; 99 }; 100 struct zsdevice { 101 /* Yes, they are backwards. */ 102 struct zschan zs_chan_b; 103 struct zschan zs_chan_a; 104 }; 105 106 /* ZS channel used as the console device (if any) */ 107 void *zs_conschan_get, *zs_conschan_put; 108 109 static uint8_t zs_init_reg[16] = { 110 0, /* 0: CMD (reset, etc.) */ 111 0, /* 1: No interrupts yet. */ 112 0, /* 2: IVECT */ 113 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 114 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 115 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 116 0, /* 6: TXSYNC/SYNCLO */ 117 0, /* 7: RXSYNC/SYNCHI */ 118 0, /* 8: alias for data port */ 119 ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR, 120 0, /*10: Misc. TX/RX control bits */ 121 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 122 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 123 0, /*13: BAUDHI (default=9600) */ 124 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 125 ZSWR15_BREAK_IE, 126 }; 127 128 /* Console ops */ 129 static int zscngetc(dev_t); 130 static void zscnputc(dev_t, int); 131 static void zscnpollc(dev_t, int); 132 133 struct consdev zs_consdev = { 134 NULL, 135 NULL, 136 zscngetc, 137 zscnputc, 138 zscnpollc, 139 NULL, 140 }; 141 142 143 /**************************************************************** 144 * Autoconfig 145 ****************************************************************/ 146 147 /* Definition of the driver for autoconfig. */ 148 static int zs_match_mainbus(device_t, cfdata_t, void *); 149 static int zs_match_obio(device_t, cfdata_t, void *); 150 static void zs_attach_mainbus(device_t, device_t, void *); 151 static void zs_attach_obio(device_t, device_t, void *); 152 153 #if defined(SUN4D) 154 #include <sparc/dev/bootbusvar.h> 155 156 static int zs_match_bootbus(device_t, cfdata_t, void *); 157 static void zs_attach_bootbus(device_t, device_t, void *); 158 159 CFATTACH_DECL_NEW(zs_bootbus, sizeof(struct zsc_softc), 160 zs_match_bootbus, zs_attach_bootbus, NULL, NULL); 161 #endif /* SUN4D */ 162 163 static void zs_attach(struct zsc_softc *, struct zsdevice *, int); 164 static int zs_print(void *, const char *name); 165 166 CFATTACH_DECL_NEW(zs_mainbus, sizeof(struct zsc_softc), 167 zs_match_mainbus, zs_attach_mainbus, NULL, NULL); 168 169 CFATTACH_DECL_NEW(zs_obio, sizeof(struct zsc_softc), 170 zs_match_obio, zs_attach_obio, NULL, NULL); 171 172 extern struct cfdriver zs_cd; 173 174 /* softintr(9) cookie, shared by all instances of this driver */ 175 static void *zs_sicookie; 176 177 /* Interrupt handlers. */ 178 static int zshard(void *); 179 static void zssoft(void *); 180 181 static int zs_get_speed(struct zs_chanstate *); 182 183 /* Console device support */ 184 static int zs_console_flags(int, int, int); 185 186 /* Power management hooks */ 187 int zs_enable(struct zs_chanstate *); 188 void zs_disable(struct zs_chanstate *); 189 190 191 /* XXX from dev/ic/z8530tty.c */ 192 extern struct tty *zstty_get_tty_from_dev(struct device *); 193 194 /* 195 * Is the zs chip present? 196 */ 197 static int 198 zs_match_mainbus(device_t parent, cfdata_t cf, void *aux) 199 { 200 struct mainbus_attach_args *ma = aux; 201 202 if (strcmp(cf->cf_name, ma->ma_name) != 0) 203 return (0); 204 205 return (1); 206 } 207 208 static int 209 zs_match_obio(device_t parent, cfdata_t cf, void *aux) 210 { 211 union obio_attach_args *uoba = aux; 212 struct obio4_attach_args *oba; 213 214 if (uoba->uoba_isobio4 == 0) { 215 struct sbus_attach_args *sa = &uoba->uoba_sbus; 216 217 if (strcmp(cf->cf_name, sa->sa_name) != 0) 218 return (0); 219 220 return (1); 221 } 222 223 oba = &uoba->uoba_oba4; 224 return (bus_space_probe(oba->oba_bustag, oba->oba_paddr, 225 1, 0, 0, NULL, NULL)); 226 } 227 228 #if defined(SUN4D) 229 static int 230 zs_match_bootbus(device_t parent, cfdata_t cf, void *aux) 231 { 232 struct bootbus_attach_args *baa = aux; 233 234 return (strcmp(cf->cf_name, baa->ba_name) == 0); 235 } 236 #endif /* SUN4D */ 237 238 static void 239 zs_attach_mainbus(device_t parent, device_t self, void *aux) 240 { 241 struct zsc_softc *zsc = device_private(self); 242 struct mainbus_attach_args *ma = aux; 243 244 zsc->zsc_dev = self; 245 zsc->zsc_bustag = ma->ma_bustag; 246 zsc->zsc_dmatag = ma->ma_dmatag; 247 zsc->zsc_promunit = prom_getpropint(ma->ma_node, "slave", -2); 248 zsc->zsc_node = ma->ma_node; 249 250 /* 251 * For machines with zs on mainbus (all sun4c models), we expect 252 * the device registers to be mapped by the PROM. 253 */ 254 zs_attach(zsc, ma->ma_promvaddr, ma->ma_pri); 255 } 256 257 static void 258 zs_attach_obio(device_t parent, device_t self, void *aux) 259 { 260 struct zsc_softc *zsc = device_private(self); 261 union obio_attach_args *uoba = aux; 262 263 zsc->zsc_dev = self; 264 265 if (uoba->uoba_isobio4 == 0) { 266 struct sbus_attach_args *sa = &uoba->uoba_sbus; 267 void *va; 268 struct zs_chanstate *cs; 269 int channel; 270 271 if (sa->sa_nintr == 0) { 272 aprint_error(": no interrupt lines\n"); 273 return; 274 } 275 276 /* 277 * Some sun4m models (Javastations) may not map the zs device. 278 */ 279 if (sa->sa_npromvaddrs > 0) 280 va = (void *)sa->sa_promvaddr; 281 else { 282 bus_space_handle_t bh; 283 284 if (sbus_bus_map(sa->sa_bustag, 285 sa->sa_slot, 286 sa->sa_offset, 287 sa->sa_size, 288 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 289 aprint_error(": cannot map zs registers\n"); 290 return; 291 } 292 va = (void *)bh; 293 } 294 295 /* 296 * Check if power state can be set, e.g. Tadpole 3GX 297 */ 298 if (prom_getpropint(sa->sa_node, "pwr-on-auxio2", 0)) { 299 aprint_normal(": powered via auxio2"); 300 for (channel = 0; channel < 2; channel++) { 301 cs = &zsc->zsc_cs_store[channel]; 302 cs->enable = zs_enable; 303 cs->disable = zs_disable; 304 } 305 } 306 307 zsc->zsc_bustag = sa->sa_bustag; 308 zsc->zsc_dmatag = sa->sa_dmatag; 309 zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2); 310 zsc->zsc_node = sa->sa_node; 311 zs_attach(zsc, va, sa->sa_pri); 312 } else { 313 struct obio4_attach_args *oba = &uoba->uoba_oba4; 314 bus_space_handle_t bh; 315 bus_addr_t paddr = oba->oba_paddr; 316 317 /* 318 * As for zs on mainbus, we require a PROM mapping. 319 */ 320 if (bus_space_map(oba->oba_bustag, 321 paddr, 322 sizeof(struct zsdevice), 323 BUS_SPACE_MAP_LINEAR | OBIO_BUS_MAP_USE_ROM, 324 &bh) != 0) { 325 aprint_error(": cannot map zs registers\n"); 326 return; 327 } 328 zsc->zsc_bustag = oba->oba_bustag; 329 zsc->zsc_dmatag = oba->oba_dmatag; 330 /* 331 * Find prom unit by physical address 332 * We're just comparing the address (not the iospace) here 333 */ 334 paddr = BUS_ADDR_PADDR(paddr); 335 if (cpuinfo.cpu_type == CPUTYP_4_100) 336 /* 337 * On the sun4/100, the top-most 4 bits are zero 338 * on obio addresses; force them to 1's for the 339 * sake of the comparison here. 340 */ 341 paddr |= 0xf0000000; 342 zsc->zsc_promunit = 343 (paddr == 0xf1000000) ? 0 : 344 (paddr == 0xf0000000) ? 1 : 345 (paddr == 0xe0000000) ? 2 : -2; 346 347 zs_attach(zsc, (void *)bh, oba->oba_pri); 348 } 349 } 350 351 #if defined(SUN4D) 352 static void 353 zs_attach_bootbus(device_t parent, device_t self, void *aux) 354 { 355 struct zsc_softc *zsc = device_private(self); 356 struct bootbus_attach_args *baa = aux; 357 void *va; 358 359 zsc->zsc_dev = self; 360 361 if (baa->ba_nintr == 0) { 362 aprint_error(": no interrupt lines\n"); 363 return; 364 } 365 366 if (baa->ba_npromvaddrs > 0) 367 va = (void *) baa->ba_promvaddrs; 368 else { 369 bus_space_handle_t bh; 370 371 if (bus_space_map(baa->ba_bustag, 372 BUS_ADDR(baa->ba_slot, baa->ba_offset), 373 baa->ba_size, BUS_SPACE_MAP_LINEAR, &bh) != 0) { 374 aprint_error(": cannot map zs registers\n"); 375 return; 376 } 377 va = (void *) bh; 378 } 379 380 zsc->zsc_bustag = baa->ba_bustag; 381 zsc->zsc_promunit = prom_getpropint(baa->ba_node, "slave", -2); 382 zsc->zsc_node = baa->ba_node; 383 zs_attach(zsc, va, baa->ba_intr[0].oi_pri); 384 } 385 #endif /* SUN4D */ 386 387 /* 388 * Attach a found zs. 389 * 390 * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR 391 * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE? 392 */ 393 static void 394 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri) 395 { 396 struct zsc_attach_args zsc_args; 397 struct zs_chanstate *cs; 398 int s, channel; 399 static int didintr, prevpri; 400 int ch0_is_cons = 0; 401 402 if (zsd == NULL) { 403 aprint_error(": configuration incomplete\n"); 404 return; 405 } 406 407 if (!didintr) { 408 zs_sicookie = softint_establish(SOFTINT_SERIAL, zssoft, NULL); 409 if (zs_sicookie == NULL) { 410 aprint_error(": cannot establish soft int handler\n"); 411 return; 412 } 413 } 414 aprint_normal(" softpri %d\n", IPL_SOFTSERIAL); 415 416 /* 417 * Initialize software state for each channel. 418 */ 419 for (channel = 0; channel < 2; channel++) { 420 struct zschan *zc; 421 struct device *child; 422 int hwflags; 423 424 zsc_args.channel = channel; 425 cs = &zsc->zsc_cs_store[channel]; 426 zsc->zsc_cs[channel] = cs; 427 428 zs_lock_init(cs); 429 cs->cs_channel = channel; 430 cs->cs_private = NULL; 431 cs->cs_ops = &zsops_null; 432 cs->cs_brg_clk = PCLK / 16; 433 434 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 435 436 hwflags = zs_console_flags(zsc->zsc_promunit, 437 zsc->zsc_node, 438 channel); 439 440 #if NWSKBD == 0 441 /* Not using wscons console, so always set console flags.*/ 442 zsc_args.hwflags = hwflags; 443 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) { 444 zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV; 445 zsc_args.consdev = &zs_consdev; 446 } 447 #else 448 /* If we are unit 1, then this is the "real" console. 449 * Remember this in order to set up the keyboard and 450 * mouse line disciplines for SUN4 machines below. 451 * Also, don't set the console flags, otherwise we 452 * tell zstty_attach() to attach as console. 453 */ 454 if (zsc->zsc_promunit == 1) { 455 if ((hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0 && 456 !channel) { 457 ch0_is_cons = 1; 458 } 459 } else { 460 zsc_args.hwflags = hwflags; 461 } 462 #endif 463 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) { 464 zs_conschan_get = zc; 465 } 466 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) { 467 zs_conschan_put = zc; 468 } 469 /* Childs need to set cn_dev, etc */ 470 471 cs->cs_reg_csr = &zc->zc_csr; 472 cs->cs_reg_data = &zc->zc_data; 473 474 bcopy(zs_init_reg, cs->cs_creg, 16); 475 bcopy(zs_init_reg, cs->cs_preg, 16); 476 477 /* XXX: Consult PROM properties for this?! */ 478 cs->cs_defspeed = zs_get_speed(cs); 479 cs->cs_defcflag = zs_def_cflag; 480 481 /* Make these correspond to cs_defcflag (-crtscts) */ 482 cs->cs_rr0_dcd = ZSRR0_DCD; 483 cs->cs_rr0_cts = 0; 484 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 485 cs->cs_wr5_rts = 0; 486 487 /* 488 * Clear the master interrupt enable. 489 * The INTENA is common to both channels, 490 * so just do it on the A channel. 491 */ 492 if (channel == 0) { 493 zs_write_reg(cs, 9, 0); 494 } 495 496 /* 497 * Look for a child driver for this channel. 498 * The child attach will setup the hardware. 499 */ 500 501 child = config_found(zsc->zsc_dev, &zsc_args, zs_print); 502 if (child == NULL) { 503 /* No sub-driver. Just reset it. */ 504 uint8_t reset = (channel == 0) ? 505 ZSWR9_A_RESET : ZSWR9_B_RESET; 506 s = splzs(); 507 zs_write_reg(cs, 9, reset); 508 splx(s); 509 } 510 #if (NKBD > 0) || (NMS > 0) 511 /* 512 * If this was a zstty it has a keyboard 513 * property on it we need to attach the 514 * sunkbd and sunms line disciplines. 515 * There are no properties on SUN4 machines. 516 * For them, check if we have set the 517 * ch0_is_cons variable above. 518 */ 519 if ((child != NULL) && 520 (device_is_a(child, "zstty")) && ( 521 (CPU_ISSUN4 && ch0_is_cons) || (!CPU_ISSUN4 && 522 (prom_getproplen(zsc->zsc_node, "keyboard") == 0)))) 523 { 524 struct kbd_ms_tty_attach_args kma; 525 struct tty *tp = zstty_get_tty_from_dev(child); 526 kma.kmta_tp = tp; 527 kma.kmta_dev = tp->t_dev; 528 kma.kmta_consdev = zsc_args.consdev; 529 530 /* Attach 'em if we got 'em. */ 531 #if (NKBD > 0) 532 if (channel == 0) { 533 kma.kmta_name = "keyboard"; 534 config_found(child, &kma, NULL); 535 } 536 #endif 537 #if (NMS > 0) 538 if (channel == 1) { 539 kma.kmta_name = "mouse"; 540 config_found(child, &kma, NULL); 541 } 542 #endif 543 } 544 #endif 545 } 546 547 /* 548 * Now safe to install interrupt handlers. Note the arguments 549 * to the interrupt handlers aren't used. Note, we only do this 550 * once since both SCCs interrupt at the same level and vector. 551 */ 552 if (!didintr) { 553 didintr = 1; 554 prevpri = pri; 555 bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, 556 zshard, NULL); 557 } else if (pri != prevpri) 558 panic("broken zs interrupt scheme"); 559 560 evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL, 561 device_xname(zsc->zsc_dev), "intr"); 562 563 /* 564 * Set the master interrupt enable and interrupt vector. 565 * (common to both channels, do it on A) 566 */ 567 cs = zsc->zsc_cs[0]; 568 s = splhigh(); 569 /* interrupt vector */ 570 zs_write_reg(cs, 2, zs_init_reg[2]); 571 /* master interrupt control (enable) */ 572 zs_write_reg(cs, 9, zs_init_reg[9]); 573 splx(s); 574 575 #if 0 576 /* 577 * XXX: L1A hack - We would like to be able to break into 578 * the debugger during the rest of autoconfiguration, so 579 * lower interrupts just enough to let zs interrupts in. 580 * This is done after both zs devices are attached. 581 */ 582 if (zsc->zsc_promunit == 1) { 583 aprint_debug("zs1: enabling zs interrupts\n"); 584 (void)splfd(); /* XXX: splzs - 1 */ 585 } 586 #endif 587 588 } 589 590 static int 591 zs_print(void *aux, const char *name) 592 { 593 struct zsc_attach_args *args = aux; 594 595 if (name != NULL) 596 aprint_normal("%s: ", name); 597 598 if (args->channel != -1) 599 aprint_normal(" channel %d", args->channel); 600 601 return (UNCONF); 602 } 603 604 static volatile int zssoftpending; 605 606 /* 607 * Our ZS chips all share a common, autovectored interrupt, 608 * so we have to look at all of them on each interrupt. 609 */ 610 static int 611 zshard(void *arg) 612 { 613 struct zsc_softc *zsc; 614 int unit, rr3, rval, softreq; 615 616 rval = softreq = 0; 617 for (unit = 0; unit < zs_cd.cd_ndevs; unit++) { 618 struct zs_chanstate *cs; 619 620 zsc = device_lookup_private(&zs_cd, unit); 621 if (zsc == NULL) 622 continue; 623 rr3 = zsc_intr_hard(zsc); 624 /* Count up the interrupts. */ 625 if (rr3) { 626 rval |= rr3; 627 zsc->zsc_intrcnt.ev_count++; 628 } 629 if ((cs = zsc->zsc_cs[0]) != NULL) 630 softreq |= cs->cs_softreq; 631 if ((cs = zsc->zsc_cs[1]) != NULL) 632 softreq |= cs->cs_softreq; 633 } 634 635 /* We are at splzs here, so no need to lock. */ 636 if (softreq && (zssoftpending == 0)) { 637 zssoftpending = 1; 638 softint_schedule(zs_sicookie); 639 } 640 return (rval); 641 } 642 643 /* 644 * Similar scheme as for zshard (look at all of them) 645 */ 646 static void 647 zssoft(void *arg) 648 { 649 struct zsc_softc *zsc; 650 int s, unit; 651 652 /* This is not the only ISR on this IPL. */ 653 if (zssoftpending == 0) 654 return; 655 656 /* 657 * The soft intr. bit will be set by zshard only if 658 * the variable zssoftpending is zero. The order of 659 * these next two statements prevents our clearing 660 * the soft intr bit just after zshard has set it. 661 */ 662 /* ienab_bic(IE_ZSSOFT); */ 663 zssoftpending = 0; 664 665 /* Make sure we call the tty layer at spltty. */ 666 s = spltty(); 667 for (unit = 0; unit < zs_cd.cd_ndevs; unit++) { 668 zsc = device_lookup_private(&zs_cd, unit); 669 if (zsc == NULL) 670 continue; 671 (void)zsc_intr_soft(zsc); 672 } 673 splx(s); 674 } 675 676 677 /* 678 * Compute the current baud rate given a ZS channel. 679 */ 680 static int 681 zs_get_speed(struct zs_chanstate *cs) 682 { 683 int tconst; 684 685 tconst = zs_read_reg(cs, 12); 686 tconst |= zs_read_reg(cs, 13) << 8; 687 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 688 } 689 690 /* 691 * MD functions for setting the baud rate and control modes. 692 * bps - in bits per second 693 */ 694 int 695 zs_set_speed(struct zs_chanstate *cs, int bps) 696 { 697 int tconst, real_bps; 698 699 if (bps == 0) 700 return (0); 701 702 #ifdef DIAGNOSTIC 703 if (cs->cs_brg_clk == 0) 704 panic("zs_set_speed"); 705 #endif 706 707 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 708 if (tconst < 0) 709 return (EINVAL); 710 711 /* Convert back to make sure we can do it. */ 712 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 713 714 /* XXX - Allow some tolerance here? */ 715 if (real_bps != bps) 716 return (EINVAL); 717 718 cs->cs_preg[12] = tconst; 719 cs->cs_preg[13] = tconst >> 8; 720 721 /* Caller will stuff the pending registers. */ 722 return (0); 723 } 724 725 int 726 zs_set_modes(struct zs_chanstate *cs, int cflag) 727 { 728 int s; 729 730 /* 731 * Output hardware flow control on the chip is horrendous: 732 * if carrier detect drops, the receiver is disabled, and if 733 * CTS drops, the transmitter is stoped IN MID CHARACTER! 734 * Therefore, NEVER set the HFC bit, and instead use the 735 * status interrupt to detect CTS changes. 736 */ 737 s = splzs(); 738 cs->cs_rr0_pps = 0; 739 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 740 cs->cs_rr0_dcd = 0; 741 if ((cflag & MDMBUF) == 0) 742 cs->cs_rr0_pps = ZSRR0_DCD; 743 } else 744 cs->cs_rr0_dcd = ZSRR0_DCD; 745 if ((cflag & CRTSCTS) != 0) { 746 cs->cs_wr5_dtr = ZSWR5_DTR; 747 cs->cs_wr5_rts = ZSWR5_RTS; 748 cs->cs_rr0_cts = ZSRR0_CTS; 749 } else if ((cflag & CDTRCTS) != 0) { 750 cs->cs_wr5_dtr = 0; 751 cs->cs_wr5_rts = ZSWR5_DTR; 752 cs->cs_rr0_cts = ZSRR0_CTS; 753 } else if ((cflag & MDMBUF) != 0) { 754 cs->cs_wr5_dtr = 0; 755 cs->cs_wr5_rts = ZSWR5_DTR; 756 cs->cs_rr0_cts = ZSRR0_DCD; 757 } else { 758 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 759 cs->cs_wr5_rts = 0; 760 cs->cs_rr0_cts = 0; 761 } 762 splx(s); 763 764 /* Caller will stuff the pending registers. */ 765 return (0); 766 } 767 768 769 /* 770 * Read or write the chip with suitable delays. 771 */ 772 773 uint8_t 774 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 775 { 776 uint8_t val; 777 778 *cs->cs_reg_csr = reg; 779 ZS_DELAY(); 780 val = *cs->cs_reg_csr; 781 ZS_DELAY(); 782 return (val); 783 } 784 785 void 786 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 787 { 788 789 *cs->cs_reg_csr = reg; 790 ZS_DELAY(); 791 *cs->cs_reg_csr = val; 792 ZS_DELAY(); 793 } 794 795 uint8_t 796 zs_read_csr(struct zs_chanstate *cs) 797 { 798 uint8_t val; 799 800 val = *cs->cs_reg_csr; 801 ZS_DELAY(); 802 return (val); 803 } 804 805 void 806 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 807 { 808 809 *cs->cs_reg_csr = val; 810 ZS_DELAY(); 811 } 812 813 uint8_t 814 zs_read_data(struct zs_chanstate *cs) 815 { 816 uint8_t val; 817 818 val = *cs->cs_reg_data; 819 ZS_DELAY(); 820 return (val); 821 } 822 823 void 824 zs_write_data(struct zs_chanstate *cs, uint8_t val) 825 { 826 827 *cs->cs_reg_data = val; 828 ZS_DELAY(); 829 } 830 831 /**************************************************************** 832 * Console support functions (Sun specific!) 833 * Note: this code is allowed to know about the layout of 834 * the chip registers, and uses that to keep things simple. 835 * XXX - I think I like the mvme167 code better. -gwr 836 ****************************************************************/ 837 838 /* 839 * Handle user request to enter kernel debugger. 840 */ 841 void 842 zs_abort(struct zs_chanstate *cs) 843 { 844 struct zschan *zc = zs_conschan_get; 845 int rr0; 846 847 /* Wait for end of break to avoid PROM abort. */ 848 /* XXX - Limit the wait? */ 849 do { 850 rr0 = zc->zc_csr; 851 ZS_DELAY(); 852 } while (rr0 & ZSRR0_BREAK); 853 854 #if defined(KGDB) 855 zskgdb(cs); 856 #elif defined(DDB) 857 Debugger(); 858 #else 859 printf("stopping on keyboard abort\n"); 860 callrom(); 861 #endif 862 } 863 864 int zs_getc(void *); 865 void zs_putc(void *, int); 866 867 /* 868 * Polled input char. 869 */ 870 int 871 zs_getc(void *arg) 872 { 873 struct zschan *zc = arg; 874 int s, c, rr0; 875 u_int omid; 876 877 /* Temporarily direct interrupts at ourselves */ 878 s = splhigh(); 879 omid = setitr(cpuinfo.mid); 880 881 /* Wait for a character to arrive. */ 882 do { 883 rr0 = zc->zc_csr; 884 ZS_DELAY(); 885 } while ((rr0 & ZSRR0_RX_READY) == 0); 886 887 c = zc->zc_data; 888 ZS_DELAY(); 889 setitr(omid); 890 splx(s); 891 892 /* 893 * This is used by the kd driver to read scan codes, 894 * so don't translate '\r' ==> '\n' here... 895 */ 896 return (c); 897 } 898 899 /* 900 * Polled output char. 901 */ 902 void 903 zs_putc(void *arg, int c) 904 { 905 struct zschan *zc = arg; 906 int s, rr0; 907 u_int omid; 908 909 /* Temporarily direct interrupts at ourselves */ 910 s = splhigh(); 911 omid = setitr(cpuinfo.mid); 912 913 /* Wait for transmitter to become ready. */ 914 do { 915 rr0 = zc->zc_csr; 916 ZS_DELAY(); 917 } while ((rr0 & ZSRR0_TX_READY) == 0); 918 919 /* 920 * Send the next character. 921 * Now you'd think that this could be followed by a ZS_DELAY() 922 * just like all the other chip accesses, but it turns out that 923 * the `transmit-ready' interrupt isn't de-asserted until 924 * some period of time after the register write completes 925 * (more than a couple instructions). So to avoid stray 926 * interrupts we put in the 2us delay regardless of CPU model. 927 */ 928 zc->zc_data = c; 929 delay(2); 930 931 setitr(omid); 932 splx(s); 933 } 934 935 /*****************************************************************/ 936 /* 937 * Polled console input putchar. 938 */ 939 static int 940 zscngetc(dev_t dev) 941 { 942 943 return (zs_getc(zs_conschan_get)); 944 } 945 946 /* 947 * Polled console output putchar. 948 */ 949 static void 950 zscnputc(dev_t dev, int c) 951 { 952 953 zs_putc(zs_conschan_put, c); 954 } 955 956 static void 957 zscnpollc(dev_t dev, int on) 958 { 959 960 /* No action needed */ 961 } 962 963 static int 964 zs_console_flags(int promunit, int node, int channel) 965 { 966 int cookie, flags = 0; 967 968 switch (prom_version()) { 969 case PROM_OLDMON: 970 case PROM_OBP_V0: 971 /* 972 * Use `promunit' and `channel' to derive the PROM 973 * stdio handles that correspond to this device. 974 */ 975 if (promunit == 0) 976 cookie = PROMDEV_TTYA + channel; 977 else if (promunit == 1 && channel == 0) 978 cookie = PROMDEV_KBD; 979 else 980 cookie = -1; 981 982 if (cookie == prom_stdin()) 983 flags |= ZS_HWFLAG_CONSOLE_INPUT; 984 985 /* 986 * Prevent the keyboard from matching the output device 987 * (note that PROMDEV_KBD == PROMDEV_SCREEN == 0!). 988 */ 989 if (cookie != PROMDEV_KBD && cookie == prom_stdout()) 990 flags |= ZS_HWFLAG_CONSOLE_OUTPUT; 991 992 break; 993 994 case PROM_OBP_V2: 995 case PROM_OBP_V3: 996 case PROM_OPENFIRM: 997 998 /* 999 * Match the nodes and device arguments prepared by 1000 * consinit() against our device node and channel. 1001 * (The device argument is the part of the OBP path 1002 * following the colon, as in `/obio/zs@0,100000:a') 1003 */ 1004 1005 /* Default to channel 0 if there are no explicit prom args */ 1006 cookie = 0; 1007 1008 if (node == prom_stdin_node) { 1009 if (prom_stdin_args[0] != '\0') 1010 /* Translate (a,b) -> (0,1) */ 1011 cookie = prom_stdin_args[0] - 'a'; 1012 1013 if (channel == cookie) 1014 flags |= ZS_HWFLAG_CONSOLE_INPUT; 1015 } 1016 1017 if (node == prom_stdout_node) { 1018 if (prom_stdout_args[0] != '\0') 1019 /* Translate (a,b) -> (0,1) */ 1020 cookie = prom_stdout_args[0] - 'a'; 1021 1022 if (channel == cookie) 1023 flags |= ZS_HWFLAG_CONSOLE_OUTPUT; 1024 } 1025 1026 break; 1027 1028 default: 1029 break; 1030 } 1031 1032 return (flags); 1033 } 1034 1035 /* 1036 * Power management hooks for zsopen() and zsclose(). 1037 * We use them to power on/off the ports, if necessary. 1038 */ 1039 int 1040 zs_enable(struct zs_chanstate *cs) 1041 { 1042 1043 auxiotwoserialendis (ZS_ENABLE); 1044 cs->enabled = 1; 1045 return(0); 1046 } 1047 1048 void 1049 zs_disable(struct zs_chanstate *cs) 1050 { 1051 1052 auxiotwoserialendis (ZS_DISABLE); 1053 cs->enabled = 0; 1054 } 1055