xref: /netbsd-src/sys/arch/sparc/dev/if_le_obio.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: if_le_obio.c,v 1.26 2008/04/28 20:23:35 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace
9  * Simulation Facility, NASA Ames Research Center; Paul Kranenburg.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_le_obio.c,v 1.26 2008/04/28 20:23:35 martin Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 
40 #include <uvm/uvm_extern.h>
41 
42 #include <net/if.h>
43 #include <net/if_ether.h>
44 #include <net/if_media.h>
45 
46 #include <machine/bus.h>
47 #include <machine/intr.h>
48 #include <machine/autoconf.h>
49 
50 #include <dev/ic/lancereg.h>
51 #include <dev/ic/lancevar.h>
52 #include <dev/ic/am7990reg.h>
53 #include <dev/ic/am7990var.h>
54 
55 /*
56  * LANCE registers.
57  */
58 #define LEREG1_RDP	0	/* Register Data port */
59 #define LEREG1_RAP	2	/* Register Address port */
60 
61 struct	le_softc {
62 	struct	am7990_softc	sc_am7990;	/* glue to MI code */
63 	bus_space_tag_t		sc_bustag;
64 	bus_dma_tag_t		sc_dmatag;
65 	bus_dmamap_t		sc_dmamap;
66 	bus_space_handle_t	sc_reg;		/* LANCE registers */
67 };
68 
69 #define MEMSIZE 0x4000		/* LANCE memory size */
70 
71 /*
72  * Media types supported.
73  */
74 static int lemedia[] = {
75 	IFM_ETHER|IFM_10_T,
76 };
77 #define NLEMEDIA	(sizeof(lemedia) / sizeof(lemedia[0]))
78 
79 static int	lematch_obio(device_t, cfdata_t, void *);
80 static void	leattach_obio(device_t, device_t, void *);
81 
82 CFATTACH_DECL_NEW(le_obio, sizeof(struct le_softc),
83     lematch_obio, leattach_obio, NULL, NULL);
84 
85 
86 static void lewrcsr(struct lance_softc *, uint16_t, uint16_t);
87 static uint16_t lerdcsr(struct lance_softc *, uint16_t);
88 
89 static void
90 lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)
91 {
92 	struct le_softc *lesc = (struct le_softc *)sc;
93 	bus_space_tag_t t = lesc->sc_bustag;
94 	bus_space_handle_t h = lesc->sc_reg;
95 
96 	bus_space_write_2(t, h, LEREG1_RAP, port);
97 	bus_space_write_2(t, h, LEREG1_RDP, val);
98 }
99 
100 static uint16_t
101 lerdcsr(struct lance_softc *sc, uint16_t port)
102 {
103 	struct le_softc *lesc = (struct le_softc *)sc;
104 	bus_space_tag_t t = lesc->sc_bustag;
105 	bus_space_handle_t h = lesc->sc_reg;
106 
107 	bus_space_write_2(t, h, LEREG1_RAP, port);
108 	return (bus_space_read_2(t, h, LEREG1_RDP));
109 }
110 
111 static int
112 lematch_obio(device_t parent, cfdata_t cf, void *aux)
113 {
114 	union obio_attach_args *uoba = aux;
115 	struct obio4_attach_args *oba;
116 
117 	if (uoba->uoba_isobio4 == 0)
118 		return (0);
119 
120 	oba = &uoba->uoba_oba4;
121 	return (bus_space_probe(oba->oba_bustag, oba->oba_paddr,
122 				2,	/* probe size */
123 				0,	/* offset */
124 				0,	/* flags */
125 				NULL, NULL));
126 }
127 
128 static void
129 leattach_obio(device_t parent, device_t self, void *aux)
130 {
131 	union obio_attach_args *uoba = aux;
132 	struct obio4_attach_args *oba = &uoba->uoba_oba4;
133 	struct le_softc *lesc = device_private(self);
134 	struct lance_softc *sc = &lesc->sc_am7990.lsc;
135 	bus_dma_segment_t seg;
136 	bus_dma_tag_t dmatag;
137 	int rseg;
138 	int error;
139 
140 	sc->sc_dev = self;
141 	lesc->sc_bustag = oba->oba_bustag;
142 	lesc->sc_dmatag = dmatag = oba->oba_dmatag;
143 
144 	if (bus_space_map(oba->oba_bustag, oba->oba_paddr,
145 			  2 * sizeof(uint16_t),
146 			  0, &lesc->sc_reg) != 0) {
147 		aprint_error(": cannot map registers\n");
148 		return;
149 	}
150 
151 	/* Get a DMA handle */
152 	if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0,
153 					BUS_DMA_NOWAIT|BUS_DMA_24BIT,
154 					&lesc->sc_dmamap)) != 0) {
155 		aprint_error(": DMA map create error %d\n", error);
156 		return;
157 	}
158 
159 	/* Allocate DMA buffer */
160 	if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, PAGE_SIZE, 0,
161 			     &seg, 1, &rseg,
162 			     BUS_DMA_NOWAIT | BUS_DMA_24BIT)) != 0) {
163 		aprint_error(": DMA memory allocation error %d\n", error);
164 		return;
165 	}
166 	/* Map DMA buffer into kernel space */
167 	if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE,
168 			   (void **)&sc->sc_mem,
169 			   BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
170 		aprint_error(": DMA memory map error %d\n", error);
171 		bus_dmamem_free(lesc->sc_dmatag, &seg, rseg);
172 		return;
173 	}
174 	/* Load DMA buffer */
175 	if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap,
176 				     sc->sc_mem, MEMSIZE, NULL,
177 				     BUS_DMA_NOWAIT)) != 0) {
178 		aprint_error(": DMA buffer map load error %d\n", error);
179 		bus_dmamem_unmap(dmatag, (void *)sc->sc_mem, MEMSIZE);
180 		bus_dmamem_free(dmatag, &seg, rseg);
181 		return;
182 	}
183 
184 	sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff;
185 	sc->sc_memsize = MEMSIZE;
186 	sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
187 
188 	sc->sc_supmedia = lemedia;
189 	sc->sc_nsupmedia = NLEMEDIA;
190 	sc->sc_defaultmedia = lemedia[0];
191 
192 	prom_getether(0, sc->sc_enaddr);
193 
194 	sc->sc_copytodesc = lance_copytobuf_contig;
195 	sc->sc_copyfromdesc = lance_copyfrombuf_contig;
196 	sc->sc_copytobuf = lance_copytobuf_contig;
197 	sc->sc_copyfrombuf = lance_copyfrombuf_contig;
198 	sc->sc_zerobuf = lance_zerobuf_contig;
199 
200 	sc->sc_rdcsr = lerdcsr;
201 	sc->sc_wrcsr = lewrcsr;
202 
203 	am7990_config(&lesc->sc_am7990);
204 
205 	/* Install interrupt */
206 	(void)bus_intr_establish(lesc->sc_bustag, oba->oba_pri, IPL_NET,
207 				 am7990_intr, sc);
208 }
209