xref: /netbsd-src/sys/arch/sparc/dev/ebus.c (revision 1ca5c1b28139779176bd5c13ad7c5f25c0bcd5f8)
1 /*	$NetBSD: ebus.c,v 1.1 2001/12/11 00:25:31 uwe Exp $ */
2 
3 /*
4  * Copyright (c) 1999, 2000 Matthew R. Green
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 /*
32  * EBus support for PCI based SPARC systems (ms-IIep, Ultra).
33  * EBus is documented in PCIO manual (Sun Part#: 802-7837-01).
34  */
35 
36 #undef DEBUG
37 #define DEBUG
38 
39 #ifdef DEBUG
40 #define	EDB_PROM	0x01
41 #define EDB_CHILD	0x02
42 #define	EDB_INTRMAP	0x04
43 #define EDB_BUSMAP	0x08
44 #define EDB_BUSDMA	0x10
45 #define EDB_INTR	0x20
46 int ebus_debug = 0;
47 #define DPRINTF(l, s)   do { if (ebus_debug & l) printf s; } while (0)
48 #else
49 #define DPRINTF(l, s)
50 #endif
51 
52 #include <sys/param.h>
53 #include <sys/conf.h>
54 #include <sys/device.h>
55 #include <sys/errno.h>
56 #include <sys/extent.h>
57 #include <sys/malloc.h>
58 #include <sys/systm.h>
59 #include <sys/time.h>
60 
61 #define _SPARC_BUS_DMA_PRIVATE
62 #include <machine/bus.h>
63 #include <machine/autoconf.h>
64 #include <machine/openfirm.h>
65 
66 #include <dev/pci/pcivar.h>
67 #include <dev/pci/pcireg.h>
68 #include <dev/pci/pcidevs.h>
69 
70 #include <dev/ofw/ofw_pci.h>
71 
72 /* XXX: convert to use shared <dev/ebus/ebusreg.h> */
73 #include <sparc/dev/ebusreg.h>
74 #include <sparc/dev/ebusvar.h>
75 
76 
77 int	ebus_match(struct device *, struct cfdata *, void *);
78 void	ebus_attach(struct device *, struct device *, void *);
79 
80 struct cfattach ebus_ca = {
81 	sizeof(struct ebus_softc), ebus_match, ebus_attach
82 };
83 
84 
85 int	ebus_setup_attach_args(struct ebus_softc *, int,
86 			       struct ebus_attach_args *);
87 void	ebus_destroy_attach_args(struct ebus_attach_args *);
88 int	ebus_print(void *, const char *);
89 
90 /*
91  * here are our bus space and bus dma routines.
92  */
93 static paddr_t	ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int);
94 static int	_ebus_bus_map(bus_space_tag_t, bus_type_t, bus_addr_t,
95 			      bus_size_t, int, vaddr_t, bus_space_handle_t *);
96 static void	*ebus_intr_establish(bus_space_tag_t, int, int, int,
97 				     int (*)(void *), void *);
98 
99 /*
100  * Working around PROM bogosity.
101  *
102  * EBus doesn't have official OFW binding.  sparc64 has a de-facto
103  * standard but patching it in in prompatch.c and then decoding it
104  * here would be an overkill for ms-IIep.
105  *
106  * So we assume that all ms-IIep based systems use PCIO chip only in
107  * "motherboard mode" with interrupt lines wired directly to ms-IIep
108  * interrupt inputs.
109  *
110  * Note that this is ineligible for prompatch.c, as we are not
111  * correcting PROM to conform to some established standard, this hack
112  * is tied to this version of ebus driver and as such it's better stay
113  * private to the driver.
114  */
115 
116 struct msiiep_ebus_intr_wiring {
117 	const char *name;	/* PROM node */
118 	int line;		/* ms-IIep interrupt input */
119 };
120 
121 static struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = {
122 	{ "su", 0 }, { "8042", 0 }, { "sound", 3 }
123 };
124 
125 
126 struct msiiep_known_ebus_wiring {
127 	const char *model;
128 	struct msiiep_ebus_intr_wiring *map;
129 	int mapsize;
130 };
131 
132 #define MSIIEP_MODEL_WIRING(name, map) \
133 	{ name, map, sizeof(map)/sizeof(map[0]) }
134 
135 static struct msiiep_known_ebus_wiring known_models[] = {
136 	MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring),
137 	{ NULL, NULL, 0}
138 };
139 
140 
141 /*
142  * XXX: This assumes single EBus.  However I don't think any ms-IIep
143  * system ever used more than one.  In any case, without looking at a
144  * system with multiple PCIO chips I don't know how to correctly
145  * program the driver to handle PROM glitches in them, so for the time
146  * being just use globals.
147  */
148 static struct msiiep_ebus_intr_wiring *wiring_map;
149 static int wiring_map_size;
150 
151 static int ebus_init_wiring_table(struct ebus_softc *);
152 
153 
154 int
155 ebus_match(parent, match, aux)
156 	struct device *parent;
157 	struct cfdata *match;
158 	void *aux;
159 {
160 	struct pci_attach_args *pa = aux;
161 	char name[10];
162 	int node;
163 
164 	/* Only attach if there's a PROM node. */
165 	node = PCITAG_NODE(pa->pa_tag);
166 	if (node == -1)
167 		return (0);
168 
169 	PROM_getpropstringA(node, "name", name, sizeof name);
170 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE
171 	    && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN
172 	    && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS
173 	    && strcmp(name, "ebus") == 0)
174 		return (1);
175 
176 	return (0);
177 }
178 
179 
180 static int
181 ebus_init_wiring_table(sc)
182 	struct ebus_softc *sc;
183 {
184 	struct msiiep_known_ebus_wiring *p;
185 	char buf[32];
186 	char *model;
187 
188 	if (wiring_map != NULL) {
189 		printf("%s: global ebus wiring map already initalized\n",
190 		       sc->sc_dev.dv_xname);
191 		return (0);
192 	}
193 
194 	model = PROM_getpropstringA(prom_findroot(), "model",
195 				    buf, sizeof(buf));
196 	if (model == NULL)
197 		panic("ebus_init_wiring_table: no \"model\" property");
198 
199 	for (p = known_models; p->model != NULL; ++p)
200 		if (strcmp(model, p->model) == 0) {
201 			wiring_map = p->map;
202 			wiring_map_size = p->mapsize;
203 			return (1);
204 		}
205 
206 	/* not found?  we should have failed in pci_attach_hook then. */
207 	panic("ebus_init_wiring_table: unknown model %s", model);
208 }
209 
210 
211 /*
212  * attach an ebus and all it's children.  this code is modeled
213  * after the sbus code which does similar things.
214  */
215 void
216 ebus_attach(parent, self, aux)
217 	struct device *parent, *self;
218 	void *aux;
219 {
220 	struct ebus_softc *sc = (struct ebus_softc *)self;
221 	struct pci_attach_args *pa = aux;
222 	struct ebus_attach_args ea;
223 	int node, error;
224 	char devinfo[256];
225 
226 	printf("\n");
227 
228 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
229 	printf("%s: %s, revision 0x%02x\n",
230 	       self->dv_xname, devinfo, PCI_REVISION(pa->pa_class));
231 
232 	node = PCITAG_NODE(pa->pa_tag);
233 	if (node == -1)
234 		panic("%s: unable to find ebus node", self->dv_xname);
235 
236 	if (ebus_init_wiring_table(sc) == 0)
237 		return;
238 
239 	sc->sc_node = node;
240 	sc->sc_parent = parent;	/* XXX: unused so far */
241 	sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */
242 	sc->sc_childbustag = ebus_alloc_bus_tag(sc);
243 	sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
244 
245 	/*
246 	 * Setup ranges.  The interesting thing is that we use "reg"
247 	 * not "ranges", since "reg" on ebus has exactly the data we'd
248 	 * get by processing "ranges".
249 	 *
250 	 */
251 	error = PROM_getprop(node, "reg", sizeof(struct ofw_pci_register),
252 			     &sc->sc_nreg, (void **)&sc->sc_reg);
253 	if (error)
254 		panic("%s: unable to read ebus registers (error %d)",
255 		      self->dv_xname, error);
256 
257 	/*
258 	 * now attach all our children
259 	 */
260 	DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
261 	for (node = firstchild(node); node; node = nextsibling(node)) {
262 		char *name = PROM_getpropstring(node, "name");
263 
264 		if (ebus_setup_attach_args(sc, node, &ea) != 0) {
265 			printf("ebus_attach: %s: incomplete\n", name);
266 			continue;
267 		}
268 		DPRINTF(EDB_CHILD,
269 			("- found child `%s', attaching\n", ea.ea_name));
270 		(void)config_found(self, &ea, ebus_print);
271 		ebus_destroy_attach_args(&ea);
272 	}
273 }
274 
275 int
276 ebus_setup_attach_args(sc, node, ea)
277 	struct ebus_softc *sc;
278 	int node;
279 	struct ebus_attach_args	*ea;
280 {
281 	int n, err;
282 
283 	memset(ea, 0, sizeof(struct ebus_attach_args));
284 
285 	err = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name);
286 	if (err != 0)
287 		return (err);
288 	ea->ea_name[n] = '\0';
289 
290 	ea->ea_node = node;
291 	ea->ea_bustag = sc->sc_childbustag;
292 	ea->ea_dmatag = sc->sc_dmatag;
293 
294 	err = PROM_getprop(node, "reg", sizeof(struct ebus_reg),
295 			   &ea->ea_nreg, (void **)&ea->ea_reg);
296 	if (err != 0)
297 		return (err);
298 
299 	err = PROM_getprop(node, "address", sizeof(u_int32_t),
300 			   &ea->ea_nvaddr, (void **)&ea->ea_vaddr);
301 	if (err != ENOENT) {
302 		if (err != 0)
303 			return (err);
304 
305 		if (ea->ea_nreg != ea->ea_nvaddr)
306 			printf("ebus loses: device %s: %d regs and %d addrs\n",
307 			       ea->ea_name, ea->ea_nreg, ea->ea_nvaddr);
308 	} else
309 		ea->ea_nvaddr = 0;
310 
311 	/* XXX: "interrupts" hack */
312 	for (n = 0; n < wiring_map_size; ++n) {
313 		struct msiiep_ebus_intr_wiring *w = &wiring_map[n];
314 		if (strcmp(w->name, ea->ea_name) == 0) {
315 			ea->ea_intr = malloc(sizeof(u_int32_t),
316 					     M_DEVBUF, M_NOWAIT);
317 			ea->ea_intr[0] = w->line;
318 			ea->ea_nintr = 1;
319 			break;
320 		}
321 	}
322 
323 	return (0);
324 }
325 
326 void
327 ebus_destroy_attach_args(ea)
328 	struct ebus_attach_args	*ea;
329 {
330 
331 	if (ea->ea_name)
332 		free((void *)ea->ea_name, M_DEVBUF);
333 	if (ea->ea_reg)
334 		free((void *)ea->ea_reg, M_DEVBUF);
335 	if (ea->ea_intr)
336 		free((void *)ea->ea_intr, M_DEVBUF);
337 	if (ea->ea_vaddr)
338 		free((void *)ea->ea_vaddr, M_DEVBUF);
339 }
340 
341 int
342 ebus_print(aux, p)
343 	void *aux;
344 	const char *p;
345 {
346 	struct ebus_attach_args *ea = aux;
347 	int i;
348 
349 	if (p)
350 		printf("%s at %s", ea->ea_name, p);
351 	for (i = 0; i < ea->ea_nreg; ++i)
352 		printf("%s bar %d offset 0x%x", i == 0 ? "" : ",",
353 		       ea->ea_reg[i].bar, ea->ea_reg[i].offset);
354 	for (i = 0; i < ea->ea_nintr; ++i)
355 		printf(" line %d", ea->ea_intr[i]);
356 	return (UNCONF);
357 }
358 
359 
360 /*
361  * bus space and bus dma methods below here
362  */
363 
364 bus_space_tag_t
365 ebus_alloc_bus_tag(sc)
366 	struct ebus_softc *sc;
367 {
368 	bus_space_tag_t bt;
369 
370 	bt = (bus_space_tag_t)
371 		malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
372 	if (bt == NULL)
373 		panic("could not allocate ebus bus tag");
374 
375 	memset(bt, 0, sizeof *bt);
376 	bt->cookie = sc;
377 	bt->parent = sc->sc_bustag;
378 	bt->sparc_bus_map = _ebus_bus_map;
379 	bt->sparc_bus_mmap = ebus_bus_mmap;
380 	bt->sparc_intr_establish = ebus_intr_establish;
381 	return (bt);
382 }
383 
384 
385 bus_dma_tag_t
386 ebus_alloc_dma_tag(sc, pdt)
387 	struct ebus_softc *sc;
388 	bus_dma_tag_t pdt;
389 {
390 	bus_dma_tag_t dt;
391 
392 	dt = (bus_dma_tag_t)
393 		malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
394 	if (dt == NULL)
395 		panic("could not allocate ebus dma tag");
396 
397 	memset(dt, 0, sizeof *dt);
398 	dt->_cookie = sc;
399 #define PCOPY(x)	dt->x = pdt->x
400 	PCOPY(_dmamap_create);
401 	PCOPY(_dmamap_destroy);
402 	PCOPY(_dmamap_load);
403 	PCOPY(_dmamap_load_mbuf);
404 	PCOPY(_dmamap_load_uio);
405 	PCOPY(_dmamap_load_raw);
406 	PCOPY(_dmamap_unload);
407 	PCOPY(_dmamap_sync);
408 	PCOPY(_dmamem_alloc);
409 	PCOPY(_dmamem_free);
410 	PCOPY(_dmamem_map);
411 	PCOPY(_dmamem_unmap);
412 	PCOPY(_dmamem_mmap);
413 #undef	PCOPY
414 	return (dt);
415 }
416 
417 /*
418  * bus space support.  <sparc64/dev/psychoreg.h> has a discussion
419  * about PCI physical addresses, which also applies to ebus.
420  */
421 static int
422 _ebus_bus_map(t, btype, addr, size, flags, vaddr, hp)
423 	bus_space_tag_t t;
424 	bus_type_t btype;	/* unused now that bus_addr_t is 64 bit */
425 	bus_addr_t addr;	/* encodes bar/offset */
426 	bus_size_t size;
427 	int	flags;
428 	vaddr_t vaddr;
429 	bus_space_handle_t *hp;
430 {
431 	struct ebus_softc *sc = t->cookie;
432 	u_int bar;
433 	paddr_t offset;
434 	int i;
435 
436 	bar = BUS_ADDR_IOSPACE(addr);
437 	offset = BUS_ADDR_PADDR(addr);
438 
439 	DPRINTF(EDB_BUSMAP,
440 		("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n",
441 		 (int)bar, (u_int32_t)offset, (u_int32_t)size,
442 		 flags, (void *)vaddr));
443 
444 	/* EBus only has two BARs */
445 	if (bar != 0 && bar != 1) {
446 		DPRINTF(EDB_BUSMAP,
447 			("\n_ebus_bus_map: impossible bar\n"));
448 		return (EINVAL);
449 	}
450 
451 	/* XXX: krups: change bar number to the offset in config space */
452 	bar = PCI_MAPREG_START + bar * sizeof(pcireg_t);
453 
454 	/*
455 	 * Almost all of the interesting ebus children are mapped by
456 	 * BAR1, the last entry in sc_reg[], so work our way backwards.
457 	 */
458 	for (i = sc->sc_nreg - 1; i >= 0; --i) {
459 		bus_addr_t pciaddr;
460 		u_int32_t ss;
461 
462 		/* EBus only does MEM32 */
463 		ss  = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK;
464 		if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32)
465 			continue;
466 
467 		if (bar != (sc->sc_reg[i].phys_hi
468 			    & OFW_PCI_PHYS_HI_REGISTERMASK))
469 			continue;
470 
471 		pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset;
472 
473 		if (pciaddr + size > sc->sc_reg[i].phys_lo
474 					+ sc->sc_reg[i].size_lo)
475 			continue;
476 
477 		DPRINTF(EDB_BUSMAP,
478 			("_ebus_bus_map: mapping to PCI addr %x\n",
479 			 (u_int32_t)pciaddr));
480 
481 		/* pass it onto the pci controller */
482 		return (bus_space_map2(sc->sc_bustag, 0, pciaddr, size,
483 				       flags, vaddr, hp));
484 	}
485 
486 	DPRINTF(EDB_BUSMAP, (": FAILED\n"));
487 	return (EINVAL);
488 }
489 
490 static paddr_t
491 ebus_bus_mmap(t, paddr, off, prot, flags)
492 	bus_space_tag_t t;
493 	bus_addr_t paddr;
494 	off_t off;
495 	int prot;
496 	int flags;
497 {
498 
499 	/* XXX: not implemetned yet */
500 	return (-1);
501 }
502 
503 /*
504  * Install an interrupt handler for a EBus device.
505  */
506 void *
507 ebus_intr_establish(t, pri, level, flags, handler, arg)
508 	bus_space_tag_t t;
509 	int pri;
510 	int level;
511 	int flags;
512 	int (*handler)(void *);
513 	void *arg;
514 {
515 	return (bus_intr_establish(t->parent, pri, level, flags, handler, arg));
516 }
517