1 /* $NetBSD: ebus.c,v 1.13 2003/05/03 18:10:59 wiz Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * EBus support for PCI based SPARC systems (ms-IIep, Ultra). 33 * EBus is documented in PCIO manual (Sun Part#: 802-7837-01). 34 */ 35 36 #if defined(DEBUG) && !defined(EBUS_DEBUG) 37 #define EBUS_DEBUG 38 #endif 39 40 #ifdef EBUS_DEBUG 41 #define EDB_PROM 0x01 42 #define EDB_CHILD 0x02 43 #define EDB_INTRMAP 0x04 44 #define EDB_BUSMAP 0x08 45 #define EDB_BUSDMA 0x10 46 #define EDB_INTR 0x20 47 int ebus_debug = 0; 48 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 49 #else 50 #define DPRINTF(l, s) 51 #endif 52 53 #include <sys/param.h> 54 #include <sys/conf.h> 55 #include <sys/device.h> 56 #include <sys/errno.h> 57 #include <sys/extent.h> 58 #include <sys/malloc.h> 59 #include <sys/systm.h> 60 #include <sys/time.h> 61 62 #define _SPARC_BUS_DMA_PRIVATE 63 #include <machine/bus.h> 64 #include <machine/autoconf.h> 65 66 #include <dev/pci/pcivar.h> 67 #include <dev/pci/pcireg.h> 68 #include <dev/pci/pcidevs.h> 69 70 #include <dev/ofw/ofw_pci.h> 71 72 #include <dev/ebus/ebusreg.h> 73 #include <dev/ebus/ebusvar.h> 74 75 76 struct ebus_softc { 77 struct device sc_dev; 78 struct device *sc_parent; /* PCI bus */ 79 80 int sc_node; /* PROM node */ 81 82 bus_space_tag_t sc_bustag; /* mem tag from pci */ 83 bus_dma_tag_t sc_dmatag; /* XXX */ 84 85 bus_space_tag_t sc_childbustag; /* EBus tag */ 86 87 /* 88 * "reg" contains exactly the info we'd get by processing 89 * "ranges", so don't bother with "ranges" and use "reg" directly. 90 */ 91 struct ofw_pci_register *sc_reg; 92 int sc_nreg; 93 }; 94 95 int ebus_match(struct device *, struct cfdata *, void *); 96 void ebus_attach(struct device *, struct device *, void *); 97 98 CFATTACH_DECL(ebus, sizeof(struct ebus_softc), 99 ebus_match, ebus_attach, NULL, NULL); 100 101 int ebus_setup_attach_args(struct ebus_softc *, int, 102 struct ebus_attach_args *); 103 void ebus_destroy_attach_args(struct ebus_attach_args *); 104 int ebus_print(void *, const char *); 105 106 /* 107 * here are our bus space and bus DMA routines. 108 */ 109 static paddr_t ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 110 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, 111 bus_size_t, int, vaddr_t, bus_space_handle_t *); 112 static void *ebus_intr_establish(bus_space_tag_t, int, int, 113 int (*)(void *), void *, void (*)(void)); 114 115 static bus_space_tag_t ebus_alloc_bus_tag(struct ebus_softc *); 116 static bus_dma_tag_t ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t); 117 118 119 /* 120 * Working around PROM bogosity. 121 * 122 * EBus doesn't have official OFW binding. sparc64 has a de-facto 123 * standard but patching it in in prompatch.c and then decoding it 124 * here would be an overkill for ms-IIep. 125 * 126 * So we assume that all ms-IIep based systems use PCIO chip only in 127 * "motherboard mode" with interrupt lines wired directly to ms-IIep 128 * interrupt inputs. 129 * 130 * Note that this is ineligible for prompatch.c, as we are not 131 * correcting PROM to conform to some established standard, this hack 132 * is tied to this version of ebus driver and as such it's better stay 133 * private to the driver. 134 */ 135 136 struct msiiep_ebus_intr_wiring { 137 const char *name; /* PROM node */ 138 int line; /* ms-IIep interrupt input */ 139 }; 140 141 static struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = { 142 { "su", 0 }, { "8042", 0 }, { "sound", 3 } 143 }; 144 145 146 struct msiiep_known_ebus_wiring { 147 const char *model; 148 struct msiiep_ebus_intr_wiring *map; 149 int mapsize; 150 }; 151 152 #define MSIIEP_MODEL_WIRING(name, map) \ 153 { name, map, sizeof(map)/sizeof(map[0]) } 154 155 static struct msiiep_known_ebus_wiring known_models[] = { 156 MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring), 157 { NULL, NULL, 0} 158 }; 159 160 161 /* 162 * XXX: This assumes single EBus. However I don't think any ms-IIep 163 * system ever used more than one. In any case, without looking at a 164 * system with multiple PCIO chips I don't know how to correctly 165 * program the driver to handle PROM glitches in them, so for the time 166 * being just use globals. 167 */ 168 static struct msiiep_ebus_intr_wiring *wiring_map; 169 static int wiring_map_size; 170 171 static int ebus_init_wiring_table(struct ebus_softc *); 172 173 174 int 175 ebus_match(parent, match, aux) 176 struct device *parent; 177 struct cfdata *match; 178 void *aux; 179 { 180 struct pci_attach_args *pa = aux; 181 char name[10]; 182 int node; 183 184 /* Only attach if there's a PROM node. */ 185 node = PCITAG_NODE(pa->pa_tag); 186 if (node == -1) 187 return (0); 188 189 PROM_getpropstringA(node, "name", name, sizeof name); 190 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE 191 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN 192 && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS 193 && strcmp(name, "ebus") == 0) 194 return (1); 195 196 return (0); 197 } 198 199 200 static int 201 ebus_init_wiring_table(sc) 202 struct ebus_softc *sc; 203 { 204 struct msiiep_known_ebus_wiring *p; 205 char buf[32]; 206 char *model; 207 208 if (wiring_map != NULL) { 209 printf("%s: global ebus wiring map already initalized\n", 210 sc->sc_dev.dv_xname); 211 return (0); 212 } 213 214 model = PROM_getpropstringA(prom_findroot(), "model", 215 buf, sizeof(buf)); 216 if (model == NULL) 217 panic("ebus_init_wiring_table: no \"model\" property"); 218 219 for (p = known_models; p->model != NULL; ++p) 220 if (strcmp(model, p->model) == 0) { 221 wiring_map = p->map; 222 wiring_map_size = p->mapsize; 223 return (1); 224 } 225 226 /* not found? we should have failed in pci_attach_hook then. */ 227 panic("ebus_init_wiring_table: unknown model %s", model); 228 } 229 230 231 /* 232 * attach an ebus and all it's children. this code is modeled 233 * after the sbus code which does similar things. 234 */ 235 void 236 ebus_attach(parent, self, aux) 237 struct device *parent, *self; 238 void *aux; 239 { 240 struct ebus_softc *sc = (struct ebus_softc *)self; 241 struct pci_attach_args *pa = aux; 242 struct ebus_attach_args ea; 243 int node, error; 244 char devinfo[256]; 245 246 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 247 printf(": %s, revision 0x%02x\n", 248 devinfo, PCI_REVISION(pa->pa_class)); 249 250 node = PCITAG_NODE(pa->pa_tag); 251 if (node == -1) 252 panic("%s: unable to find ebus node", self->dv_xname); 253 254 if (ebus_init_wiring_table(sc) == 0) 255 return; 256 257 sc->sc_node = node; 258 sc->sc_parent = parent; /* XXX: unused so far */ 259 sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */ 260 sc->sc_childbustag = ebus_alloc_bus_tag(sc); 261 sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat); 262 263 /* 264 * Setup ranges. The interesting thing is that we use "reg" 265 * not "ranges", since "reg" on ebus has exactly the data we'd 266 * get by processing "ranges". 267 * 268 */ 269 error = PROM_getprop(node, "reg", sizeof(struct ofw_pci_register), 270 &sc->sc_nreg, (void **)&sc->sc_reg); 271 if (error) 272 panic("%s: unable to read ebus registers (error %d)", 273 self->dv_xname, error); 274 275 /* 276 * now attach all our children 277 */ 278 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 279 for (node = firstchild(node); node; node = nextsibling(node)) { 280 char *name = PROM_getpropstring(node, "name"); 281 282 if (ebus_setup_attach_args(sc, node, &ea) != 0) { 283 printf("ebus_attach: %s: incomplete\n", name); 284 continue; 285 } 286 DPRINTF(EDB_CHILD, 287 ("- found child `%s', attaching\n", ea.ea_name)); 288 (void)config_found(self, &ea, ebus_print); 289 ebus_destroy_attach_args(&ea); 290 } 291 } 292 293 int 294 ebus_setup_attach_args(sc, node, ea) 295 struct ebus_softc *sc; 296 int node; 297 struct ebus_attach_args *ea; 298 { 299 int n, err; 300 301 memset(ea, 0, sizeof(struct ebus_attach_args)); 302 303 err = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name); 304 if (err != 0) 305 return (err); 306 ea->ea_name[n] = '\0'; 307 308 ea->ea_node = node; 309 ea->ea_bustag = sc->sc_childbustag; 310 ea->ea_dmatag = sc->sc_dmatag; 311 312 err = PROM_getprop(node, "reg", sizeof(struct ebus_regs), 313 &ea->ea_nreg, (void **)&ea->ea_reg); 314 if (err != 0) 315 return (err); 316 317 /* 318 * On Ultra the bar is the _offset_ of the BAR in PCI config 319 * space but in (some?) ms-IIep systems (e.g. Krups) it's the 320 * _number_ of the BAR - e.g. BAR1 is represented by 1 in 321 * Krups PROM, while on Ultra it's 0x14. Fix it here. 322 */ 323 for (n = 0; n < ea->ea_nreg; ++n) 324 if (ea->ea_reg[n].hi < PCI_MAPREG_START) { 325 ea->ea_reg[n].hi = PCI_MAPREG_START 326 + ea->ea_reg[n].hi * sizeof(pcireg_t); 327 } 328 329 330 err = PROM_getprop(node, "address", sizeof(u_int32_t), 331 &ea->ea_nvaddr, (void **)&ea->ea_vaddr); 332 if (err != ENOENT) { 333 if (err != 0) 334 return (err); 335 336 if (ea->ea_nreg != ea->ea_nvaddr) 337 printf("ebus loses: device %s: %d regs and %d addrs\n", 338 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 339 } else 340 ea->ea_nvaddr = 0; 341 342 /* XXX: "interrupts" hack */ 343 for (n = 0; n < wiring_map_size; ++n) { 344 struct msiiep_ebus_intr_wiring *w = &wiring_map[n]; 345 if (strcmp(w->name, ea->ea_name) == 0) { 346 ea->ea_intr = malloc(sizeof(u_int32_t), 347 M_DEVBUF, M_NOWAIT); 348 ea->ea_intr[0] = w->line; 349 ea->ea_nintr = 1; 350 break; 351 } 352 } 353 354 return (0); 355 } 356 357 void 358 ebus_destroy_attach_args(ea) 359 struct ebus_attach_args *ea; 360 { 361 362 if (ea->ea_name) 363 free((void *)ea->ea_name, M_DEVBUF); 364 if (ea->ea_reg) 365 free((void *)ea->ea_reg, M_DEVBUF); 366 if (ea->ea_intr) 367 free((void *)ea->ea_intr, M_DEVBUF); 368 if (ea->ea_vaddr) 369 free((void *)ea->ea_vaddr, M_DEVBUF); 370 } 371 372 int 373 ebus_print(aux, p) 374 void *aux; 375 const char *p; 376 { 377 struct ebus_attach_args *ea = aux; 378 int i; 379 380 if (p) 381 aprint_normal("%s at %s", ea->ea_name, p); 382 for (i = 0; i < ea->ea_nreg; ++i) 383 aprint_normal("%s bar %x offset 0x%x", i == 0 ? "" : ",", 384 ea->ea_reg[i].hi, ea->ea_reg[i].lo); 385 for (i = 0; i < ea->ea_nintr; ++i) 386 aprint_normal(" line %d", ea->ea_intr[i]); 387 return (UNCONF); 388 } 389 390 391 /* 392 * bus space and bus DMA methods below here 393 */ 394 395 bus_space_tag_t 396 ebus_alloc_bus_tag(sc) 397 struct ebus_softc *sc; 398 { 399 bus_space_tag_t bt; 400 401 bt = (bus_space_tag_t) 402 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 403 if (bt == NULL) 404 panic("unable to allocate ebus bus tag"); 405 406 memset(bt, 0, sizeof *bt); 407 bt->cookie = sc; 408 bt->parent = sc->sc_bustag; 409 bt->sparc_bus_map = _ebus_bus_map; 410 bt->sparc_bus_mmap = ebus_bus_mmap; 411 bt->sparc_intr_establish = ebus_intr_establish; 412 return (bt); 413 } 414 415 416 bus_dma_tag_t 417 ebus_alloc_dma_tag(sc, pdt) 418 struct ebus_softc *sc; 419 bus_dma_tag_t pdt; 420 { 421 bus_dma_tag_t dt; 422 423 dt = (bus_dma_tag_t) 424 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 425 if (dt == NULL) 426 panic("unable to allocate ebus DMA tag"); 427 428 memset(dt, 0, sizeof *dt); 429 dt->_cookie = sc; 430 #define PCOPY(x) dt->x = pdt->x 431 PCOPY(_dmamap_create); 432 PCOPY(_dmamap_destroy); 433 PCOPY(_dmamap_load); 434 PCOPY(_dmamap_load_mbuf); 435 PCOPY(_dmamap_load_uio); 436 PCOPY(_dmamap_load_raw); 437 PCOPY(_dmamap_unload); 438 PCOPY(_dmamap_sync); 439 PCOPY(_dmamem_alloc); 440 PCOPY(_dmamem_free); 441 PCOPY(_dmamem_map); 442 PCOPY(_dmamem_unmap); 443 PCOPY(_dmamem_mmap); 444 #undef PCOPY 445 return (dt); 446 } 447 448 /* 449 * bus space support. <sparc64/dev/psychoreg.h> has a discussion 450 * about PCI physical addresses, which also applies to ebus. 451 */ 452 static int 453 _ebus_bus_map(t, ba, size, flags, va, hp) 454 bus_space_tag_t t; 455 bus_addr_t ba; /* encodes bar/offset */ 456 bus_size_t size; 457 int flags; 458 vaddr_t va; 459 bus_space_handle_t *hp; 460 { 461 struct ebus_softc *sc = t->cookie; 462 u_int bar; 463 paddr_t offset; 464 int i; 465 466 bar = BUS_ADDR_IOSPACE(ba); 467 offset = BUS_ADDR_PADDR(ba); 468 469 DPRINTF(EDB_BUSMAP, 470 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 471 (int)bar, (u_int32_t)offset, (u_int32_t)size, 472 flags, (void *)va)); 473 474 /* EBus has only two BARs */ 475 if (PCI_MAPREG_NUM(bar) > 1) { 476 DPRINTF(EDB_BUSMAP, 477 ("\n_ebus_bus_map: impossible bar\n")); 478 return (EINVAL); 479 } 480 481 /* 482 * Almost all of the interesting ebus children are mapped by 483 * BAR1, the last entry in sc_reg[], so work our way backwards. 484 */ 485 for (i = sc->sc_nreg - 1; i >= 0; --i) { 486 bus_addr_t pciaddr; 487 u_int32_t ss; 488 489 /* EBus only does MEM32 */ 490 ss = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK; 491 if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32) 492 continue; 493 494 if (bar != (sc->sc_reg[i].phys_hi 495 & OFW_PCI_PHYS_HI_REGISTERMASK)) 496 continue; 497 498 pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset; 499 500 if (pciaddr + size > sc->sc_reg[i].phys_lo 501 + sc->sc_reg[i].size_lo) 502 continue; 503 504 DPRINTF(EDB_BUSMAP, 505 ("_ebus_bus_map: mapping to PCI addr %x\n", 506 (u_int32_t)pciaddr)); 507 508 /* pass it onto the pci controller */ 509 return (bus_space_map2(sc->sc_bustag, pciaddr, size, 510 flags, va, hp)); 511 } 512 513 DPRINTF(EDB_BUSMAP, (": FAILED\n")); 514 return (EINVAL); 515 } 516 517 static paddr_t 518 ebus_bus_mmap(t, ba, off, prot, flags) 519 bus_space_tag_t t; 520 bus_addr_t ba; 521 off_t off; 522 int prot; 523 int flags; 524 { 525 526 /* XXX: not implemetned yet */ 527 return (-1); 528 } 529 530 /* 531 * Install an interrupt handler for a EBus device. 532 */ 533 void * 534 ebus_intr_establish(t, pri, level, handler, arg, fastvec) 535 bus_space_tag_t t; 536 int pri; 537 int level; 538 int (*handler)(void *); 539 void *arg; 540 void (*fastvec)(void); /* ignored */ 541 { 542 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 543 } 544