xref: /netbsd-src/sys/arch/sh3/include/tmureg.h (revision 9fbd88883c38d0c0fbfcbe66d76fe6b0fab3f9de)
1 /* $NetBSD: tmureg.h,v 1.4 2000/03/20 20:36:58 msaitoh Exp $ */
2 
3 /*-
4  * Copyright (C) 1999 SAITOH Masanobu.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef _SH3_TMUREG_H_
30 #define _SH3_TMUREG_H_
31 
32 /*
33  * Timer Unit
34  */
35 
36 #if !defined(SH4)
37 
38 /* SH3 definition */
39 
40 /* common */
41 #define SHREG_TOCR	(*(volatile unsigned char *)	0xfffffe90)
42 #define SHREG_TSTR	(*(volatile unsigned char *)	0xfffffe92)
43 
44 /* ch. 0 */
45 #define SHREG_TCOR0	(*(volatile unsigned int *)	0xfffffe94)
46 #define SHREG_TCNT0	(*(volatile unsigned int *)	0xfffffe98)
47 #define SHREG_TCR0	(*(volatile unsigned short *)	0xfffffe9c)
48 
49 /* ch. 1 */
50 #define SHREG_TCOR1	(*(volatile unsigned int *)	0xfffffea0)
51 #define SHREG_TCNT1	(*(volatile unsigned int *)	0xfffffea4)
52 #define SHREG_TCR1	(*(volatile unsigned short *)	0xfffffea8)
53 
54 /* ch. 2 */
55 #define SHREG_TCOR2	(*(volatile unsigned int *)	0xfffffeac)
56 #define SHREG_TCNT2	(*(volatile unsigned int *)	0xfffffeb0)
57 #define SHREG_TCR2	(*(volatile unsigned short *)	0xfffffeb4)
58 #define SHREG_TCPR2	(*(volatile unsigned int *)	0xfffffeb8)
59 
60 #else
61 
62 /* SH4 address definition */
63 
64 /* common */
65 #define SHREG_TOCR	(*(volatile unsigned char *)	0xffd80000)
66 #define SHREG_TSTR	(*(volatile unsigned char *)	0xffd80004)
67 
68 /* ch. 0 */
69 #define SHREG_TCOR0	(*(volatile unsigned int *)	0xffd80008)
70 #define SHREG_TCNT0	(*(volatile unsigned int *)	0xffd8000c)
71 #define SHREG_TCR0	(*(volatile unsigned short *)	0xffd80010)
72 
73 /* ch. 1 */
74 #define SHREG_TCOR1	(*(volatile unsigned int *)	0xffd80014)
75 #define SHREG_TCNT1	(*(volatile unsigned int *)	0xffd80018)
76 #define SHREG_TCR1	(*(volatile unsigned short *)	0xffd8001c)
77 
78 /* ch. 2 */
79 #define SHREG_TCOR2	(*(volatile unsigned int *)	0xffd80020)
80 #define SHREG_TCNT2	(*(volatile unsigned int *)	0xffd80024)
81 #define SHREG_TCR2	(*(volatile unsigned short *)	0xffd80028)
82 #define SHREG_TCPR2	(*(volatile unsigned int *)	0xffd8002c)
83 
84 #endif
85 
86 #define TOCR_TCOE	0x01
87 
88 #define TSTR_STR2	0x04
89 #define TSTR_STR1	0x02
90 #define TSTR_STR0	0x01
91 
92 #define TCR_ICPF	0x0200
93 #define TCR_UNF		0x0100
94 #define TCR_ICPE1	0x0080
95 #define TCR_ICPE0	0x0040
96 #define TCR_UNIE	0x0020
97 #define TCR_CKEG1	0x0010
98 #define TCR_CKEG0	0x0008
99 #define TCR_TPSC2	0x0004
100 #define TCR_TPSC1	0x0002
101 #define TCR_TPSC0	0x0001
102 
103 #define TCR_TPSC_P4	0x0000
104 #define TCR_TPSC_P16	0x0001
105 #define TCR_TPSC_P64	0x0002
106 #define TCR_TPSC_P256	0x0003
107 #if !defined(SH4)
108 #define TCR_TPSC_RTC	0x0004
109 #define TCR_TPSC_TCLK	0x0005
110 #else
111 #define TCR_TPSC_P512	0x0004
112 #define TCR_TPSC_RTC	0x0006
113 #define TCR_TPSC_TCLK	0x0007
114 #endif
115 
116 #endif	/* !_SH3_TMUREG_H_ */
117