1 /* $Id: rtcreg.h,v 1.4 2001/04/22 16:50:17 uch Exp $ */ 2 /* $NetBSD: rtcreg.h,v 1.4 2001/04/22 16:50:17 uch Exp $ */ 3 4 /*- 5 * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef _SH3_RTCREG_H__ 31 #define _SH3_RTCREG_H__ 32 33 /* 34 * Real Time Clock 35 */ 36 37 #if !defined(SH4) 38 39 /* SH3 definitions */ 40 41 #define SHREG_R64CNT (*(volatile unsigned char *) 0xFFFFFEC0) 42 #define SHREG_RSECCNT (*(volatile unsigned char *) 0xFFFFFEC2) 43 #define SHREG_RMINCNT (*(volatile unsigned char *) 0xFFFFFEC4) 44 #define SHREG_RHRCNT (*(volatile unsigned char *) 0xFFFFFEC6) 45 #define SHREG_RWKCNT (*(volatile unsigned char *) 0xFFFFFEC8) 46 #define SHREG_RDAYCNT (*(volatile unsigned char *) 0xFFFFFECA) 47 #define SHREG_RMONCNT (*(volatile unsigned char *) 0xFFFFFECC) 48 #define SHREG_RYRCNT (*(volatile unsigned char *) 0xFFFFFECE) 49 #define SHREG_RSECAR (*(volatile unsigned char *) 0xFFFFFED0) 50 #define SHREG_RMINAR (*(volatile unsigned char *) 0xFFFFFED2) 51 #define SHREG_RHRAR (*(volatile unsigned char *) 0xFFFFFED4) 52 #define SHREG_RWKAR (*(volatile unsigned char *) 0xFFFFFED6) 53 #define SHREG_RDAYAR (*(volatile unsigned char *) 0xFFFFFED8) 54 #define SHREG_RMONAR (*(volatile unsigned char *) 0xFFFFFEDA) 55 #define SHREG_RCR1 (*(volatile unsigned char *) 0xFFFFFEDC) 56 #define SHREG_RCR2 (*(volatile unsigned char *) 0xFFFFFEDE) 57 58 #else 59 60 /* SH4 definitions */ 61 62 #define SHREG_R64CNT (*(volatile unsigned char *) 0xffc80000) 63 #define SHREG_RSECCNT (*(volatile unsigned char *) 0xffc80004) 64 #define SHREG_RMINCNT (*(volatile unsigned char *) 0xffc80008) 65 #define SHREG_RHRCNT (*(volatile unsigned char *) 0xffc8000c) 66 #define SHREG_RWKCNT (*(volatile unsigned char *) 0xffc80010) 67 #define SHREG_RDAYCNT (*(volatile unsigned char *) 0xffc80014) 68 #define SHREG_RMONCNT (*(volatile unsigned char *) 0xffc80018) 69 #define SHREG_RYRCNT (*(volatile unsigned short *) 0xffc8001c) 70 #define SHREG_RSECAR (*(volatile unsigned char *) 0xffc80020) 71 #define SHREG_RMINAR (*(volatile unsigned char *) 0xffc80024) 72 #define SHREG_RHRAR (*(volatile unsigned char *) 0xffc80028) 73 #define SHREG_RWKAR (*(volatile unsigned char *) 0xffc8002c) 74 #define SHREG_RDAYAR (*(volatile unsigned char *) 0xffc80030) 75 #define SHREG_RMONAR (*(volatile unsigned char *) 0xffc80034) 76 #define SHREG_RCR1 (*(volatile unsigned char *) 0xffc80038) 77 #define SHREG_RCR2 (*(volatile unsigned char *) 0xffc8003c) 78 79 #endif 80 81 #define SHREG_RCR1_CF 0x80 82 #define SHREG_RCR1_CIE 0x10 83 #define SHREG_RCR1_AIE 0x08 84 #define SHREG_RCR1_AF 0x01 85 86 #define SHREG_RCR2_PEF 0x80 87 #define SHREG_RCR2_PES2 0x40 88 #define SHREG_RCR2_PES1 0x20 89 #define SHREG_RCR2_PES0 0x10 90 #define SHREG_RCR2_ENABLE 0x08 91 #define SHREG_RCR2_ADJ 0x04 92 #define SHREG_RCR2_RESET 0x02 93 #define SHREG_RCR2_START 0x01 94 95 #define SHREG_RCR2_P64 (SHREG_RCR2_PES1) 96 97 #endif /* !_SH3_RTCREG_H__ */ 98