xref: /netbsd-src/sys/arch/sh3/include/intr.h (revision fad4c9f71477ae11cea2ee75ec82151ac770a534)
1 /*	$NetBSD: intr.h,v 1.22 2006/01/24 23:51:42 uwe Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *        This product includes software developed by the NetBSD
18  *        Foundation, Inc. and its contributors.
19  * 4. Neither the name of The NetBSD Foundation nor the names of its
20  *    contributors may be used to endorse or promote products derived
21  *    from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #ifndef _SH3_INTR_H_
37 #define	_SH3_INTR_H_
38 
39 #include <sys/device.h>
40 #include <sys/lock.h>
41 #include <sys/queue.h>
42 #include <sh3/psl.h>
43 
44 /* Interrupt sharing types. */
45 #define	IST_NONE		0	/* none */
46 #define	IST_PULSE		1	/* pulsed */
47 #define	IST_EDGE		2	/* edge-triggered */
48 #define	IST_LEVEL		3	/* level-triggered */
49 
50 /* Interrupt priority levels */
51 #define	_IPL_N		15
52 #define	_IPL_NSOFT	4
53 
54 #define	IPL_NONE	0	/* nothing */
55 #define	IPL_SOFT	1
56 #define	IPL_SOFTCLOCK	2	/* timeouts */
57 #define	IPL_SOFTNET	3	/* protocol stacks */
58 #define	IPL_SOFTSERIAL	4	/* serial */
59 
60 #define	IPL_SOFTNAMES {							\
61 	"misc",								\
62 	"clock",							\
63 	"net",								\
64 	"serial",							\
65 }
66 
67 struct intc_intrhand {
68 	int	(*ih_func)(void *);
69 	void	*ih_arg;
70 	int	ih_level;	/* SR.I[0:3] value */
71 	int	ih_evtcode;	/* INTEVT or INTEVT2(SH7709/SH7709A) */
72 	int	ih_idx;		/* evtcode -> intrhand mapping */
73 };
74 
75 /* from 0x200 by 0x20 -> from 0 by 1 */
76 #define	EVTCODE_TO_MAP_INDEX(x)		(((x) >> 5) - 0x10)
77 #define	EVTCODE_TO_IH_INDEX(x)						\
78 	__intc_evtcode_to_ih[EVTCODE_TO_MAP_INDEX(x)]
79 #define	EVTCODE_IH(x)	(&__intc_intrhand[EVTCODE_TO_IH_INDEX(x)])
80 extern int8_t __intc_evtcode_to_ih[];
81 extern struct intc_intrhand __intc_intrhand[];
82 
83 void intc_init(void);
84 void *intc_intr_establish(int, int, int, int (*)(void *), void *);
85 void intc_intr_disestablish(void *);
86 void intc_intr_enable(int);
87 void intc_intr_disable(int);
88 void intc_intr(int, int, int);
89 
90 void intpri_intr_priority(int evtcode, int level);
91 
92 /*
93  * software simulated interrupt
94  */
95 struct sh_soft_intrhand {
96 	TAILQ_ENTRY(sh_soft_intrhand) sih_q;
97 	struct sh_soft_intr *sih_intrhead;
98 	void	(*sih_fn)(void *);
99 	void	*sih_arg;
100 	int	sih_pending;
101 };
102 
103 struct sh_soft_intr {
104 	TAILQ_HEAD(, sh_soft_intrhand) softintr_q;
105 	struct evcnt softintr_evcnt;
106 	struct simplelock softintr_slock;
107 	unsigned long softintr_ipl;
108 };
109 
110 #define	softintr_schedule(arg)						\
111 do {									\
112 	struct sh_soft_intrhand *__sih = (arg);				\
113 	struct sh_soft_intr *__si = __sih->sih_intrhead;		\
114 	int __s;							\
115 									\
116 	__s = _cpu_intr_suspend();					\
117 	simple_lock(&__si->softintr_slock);				\
118 	if (__sih->sih_pending == 0) {					\
119 		TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q);	\
120 		__sih->sih_pending = 1;					\
121 		setsoft(__si->softintr_ipl);				\
122 	}								\
123 	simple_unlock(&__si->softintr_slock);				\
124 	_cpu_intr_resume(__s);						\
125 } while (/*CONSTCOND*/0)
126 
127 void softintr_init(void);
128 void *softintr_establish(int, void (*)(void *), void *);
129 void softintr_disestablish(void *);
130 void softintr_dispatch(int);
131 void setsoft(int);
132 
133 /* XXX For legacy software interrupts. */
134 extern struct sh_soft_intrhand *softnet_intrhand;
135 
136 #define	setsoftnet()	softintr_schedule(softnet_intrhand)
137 
138 #endif /* !_SH3_INTR_H_ */
139