1 /* $NetBSD: scif.c,v 1.63 2014/03/16 05:20:25 dholland Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 55 * POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58 /* 59 * Copyright (c) 1991 The Regents of the University of California. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions 64 * are met: 65 * 1. Redistributions of source code must retain the above copyright 66 * notice, this list of conditions and the following disclaimer. 67 * 2. Redistributions in binary form must reproduce the above copyright 68 * notice, this list of conditions and the following disclaimer in the 69 * documentation and/or other materials provided with the distribution. 70 * 3. Neither the name of the University nor the names of its contributors 71 * may be used to endorse or promote products derived from this software 72 * without specific prior written permission. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 75 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 77 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 80 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 82 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 83 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 84 * SUCH DAMAGE. 85 * 86 * @(#)com.c 7.5 (Berkeley) 5/16/91 87 */ 88 89 /* 90 * SH internal serial driver 91 * 92 * This code is derived from both z8530tty.c and com.c 93 */ 94 95 #include <sys/cdefs.h> 96 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.63 2014/03/16 05:20:25 dholland Exp $"); 97 98 #include "opt_kgdb.h" 99 #include "opt_scif.h" 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/tty.h> 104 #include <sys/proc.h> 105 #include <sys/conf.h> 106 #include <sys/file.h> 107 #include <sys/syslog.h> 108 #include <sys/kernel.h> 109 #include <sys/device.h> 110 #include <sys/malloc.h> 111 #include <sys/kgdb.h> 112 #include <sys/kauth.h> 113 #include <sys/intr.h> 114 115 #include <dev/cons.h> 116 117 #include <sh3/clock.h> 118 #include <sh3/exception.h> 119 #include <sh3/scifreg.h> 120 121 #include <sh3/dev/scifvar.h> 122 123 #include "locators.h" 124 125 126 struct scif_softc { 127 device_t sc_dev; 128 129 struct tty *sc_tty; 130 void *sc_si; 131 132 callout_t sc_diag_ch; 133 134 #if 0 135 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 136 bus_space_handle_t sc_ioh; /* ISA io handle */ 137 138 int sc_drq; 139 140 int sc_frequency; 141 #endif 142 143 u_int sc_overflows, 144 sc_floods, 145 sc_errors; /* number of retries so far */ 146 u_char sc_status[7]; /* copy of registers */ 147 148 int sc_hwflags; 149 int sc_swflags; 150 u_int sc_fifolen; 151 152 u_int sc_r_hiwat, 153 sc_r_lowat; 154 u_char *volatile sc_rbget, 155 *volatile sc_rbput; 156 volatile u_int sc_rbavail; 157 u_char *sc_rbuf, 158 *sc_ebuf; 159 160 u_char *sc_tba; /* transmit buffer address */ 161 u_int sc_tbc, /* transmit byte count */ 162 sc_heldtbc; 163 164 volatile u_char sc_rx_flags, 165 #define RX_TTY_BLOCKED 0x01 166 #define RX_TTY_OVERFLOWED 0x02 167 #define RX_IBUF_BLOCKED 0x04 168 #define RX_IBUF_OVERFLOWED 0x08 169 #define RX_ANY_BLOCK 0x0f 170 sc_tx_busy, /* working on an output chunk */ 171 sc_tx_done, /* done with one output chunk */ 172 sc_tx_stopped, /* H/W level stop (lost CTS) */ 173 sc_st_check, /* got a status interrupt */ 174 sc_rx_ready; 175 176 volatile u_char sc_heldchange; 177 }; 178 179 180 static int scif_match(device_t, cfdata_t, void *); 181 static void scif_attach(device_t, device_t, void *); 182 183 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc), 184 scif_match, scif_attach, NULL, NULL); 185 186 static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */ 187 188 extern struct cfdriver scif_cd; 189 190 #define SCIFUNIT_MASK 0x7ffff 191 #define SCIFDIALOUT_MASK 0x80000 192 193 #define SCIFUNIT(x) (minor(x) & SCIFUNIT_MASK) 194 #define SCIFDIALOUT(x) (minor(x) & SCIFDIALOUT_MASK) 195 196 197 /* console */ 198 dev_type_cnprobe(scifcnprobe); 199 dev_type_cninit(scifcninit); 200 dev_type_cngetc(scifcngetc); 201 dev_type_cnputc(scifcnputc); 202 203 204 /* cdevsw */ 205 dev_type_open(scifopen); 206 dev_type_close(scifclose); 207 dev_type_read(scifread); 208 dev_type_write(scifwrite); 209 dev_type_ioctl(scifioctl); 210 dev_type_stop(scifstop); 211 dev_type_tty(sciftty); 212 dev_type_poll(scifpoll); 213 214 const struct cdevsw scif_cdevsw = { 215 .d_open = scifopen, 216 .d_close = scifclose, 217 .d_read = scifread, 218 .d_write = scifwrite, 219 .d_ioctl = scifioctl, 220 .d_stop = scifstop, 221 .d_tty = sciftty, 222 .d_poll = scifpoll, 223 .d_mmap = nommap, 224 .d_kqfilter = ttykqfilter, 225 .d_flag = D_TTY 226 }; 227 228 229 /* struct tty */ 230 static void scifstart(struct tty *); 231 static int scifparam(struct tty *, struct termios *); 232 233 234 void InitializeScif (unsigned int); 235 int ScifErrCheck(void); 236 void scif_putc(unsigned char); 237 unsigned char scif_getc(void); 238 239 static int scifintr(void *); 240 static void scifsoft(void *); 241 static void scif_rxsoft(struct scif_softc *, struct tty *); 242 static void scif_txsoft(struct scif_softc *, struct tty *); 243 #if 0 244 static void scif_stsoft(struct scif_softc *, struct tty *); 245 #endif 246 static void scif_schedrx(struct scif_softc *); 247 static void scifdiag(void *); 248 249 static void scif_break(struct scif_softc *, int); 250 static void scif_iflush(struct scif_softc *); 251 252 253 /* Hardware flag masks (sc_hwflags) */ 254 #define SCIF_HW_NOIEN 0x01 255 #define SCIF_HW_FIFO 0x02 256 #define SCIF_HW_FLOW 0x08 257 #define SCIF_HW_DEV_OK 0x20 258 #define SCIF_HW_CONSOLE 0x40 259 #define SCIF_HW_KGDB 0x80 260 261 262 /* Buffer size for character buffer */ 263 #define SCIF_RING_SIZE 2048 264 static unsigned int scif_rbuf_size = SCIF_RING_SIZE; 265 266 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 267 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4; 268 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4; 269 270 271 #ifdef SCIFCN_SPEED 272 unsigned int scifcn_speed = SCIFCN_SPEED; 273 #else 274 unsigned int scifcn_speed = 9600; 275 #endif 276 277 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 278 int scifconscflag = CONMODE; 279 280 static int scifisconsole = 0; 281 282 #ifdef KGDB 283 static int kgdb_attached = 0; 284 #endif 285 286 287 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 288 289 290 /* XXX: uwe 291 * Prepare for bus_spacification. The difference in access widths is 292 * still handled by the magic definitions in scifreg.h 293 */ 294 #define scif_smr_read() SHREG_SCSMR2 295 #define scif_smr_write(v) (SHREG_SCSMR2 = (v)) 296 297 #define scif_brr_read() SHREG_SCBRR2 298 #define scif_brr_write(v) (SHREG_SCBRR2 = (v)) 299 300 #define scif_scr_read() SHREG_SCSCR2 301 #define scif_scr_write(v) (SHREG_SCSCR2 = (v)) 302 303 #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v)) 304 305 #define scif_ssr_read() SHREG_SCSSR2 306 #define scif_ssr_write(v) (SHREG_SCSSR2 = (v)) 307 308 #define scif_frdr_read() SHREG_SCFRDR2 309 310 #define scif_fcr_read() SHREG_SCFCR2 311 #define scif_fcr_write(v) (SHREG_SCFCR2 = (v)) 312 313 #define scif_fdr_read() SHREG_SCFDR2 314 315 #ifdef SH4 /* additional registers in sh4 */ 316 317 #define scif_sptr_read() SHREG_SCSPTR2 318 #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v)) 319 320 #define scif_lsr_read() SHREG_SCLSR2 321 #define scif_lsr_write(v) (SHREG_SCLSR2 = (v)) 322 323 #endif /* SH4 */ 324 325 326 void 327 InitializeScif(unsigned int bps) 328 { 329 330 /* Initialize SCR */ 331 scif_scr_write(0x00); 332 333 #if 0 334 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE); 335 #else 336 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST); 337 #endif 338 /* Serial Mode Register */ 339 scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */ 340 341 /* Bit Rate Register */ 342 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1); 343 344 /* 345 * wait 2m Sec, because Send/Recv must begin 1 bit period after 346 * BRR is set. 347 */ 348 delay(2000); 349 350 #if 0 351 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE); 352 #else 353 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1); 354 #endif 355 356 /* Send permission, Receive permission ON */ 357 scif_scr_write(SCSCR2_TE | SCSCR2_RE); 358 359 /* Serial Status Register */ 360 scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */ 361 } 362 363 int 364 ScifErrCheck(void) 365 { 366 367 return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)); 368 } 369 370 void 371 scif_putc(unsigned char c) 372 { 373 374 /* wait for ready */ 375 while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL) 376 continue; 377 378 /* write send data to send register */ 379 scif_ftdr_write(c); 380 381 /* clear ready flag */ 382 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND)); 383 } 384 385 unsigned char 386 scif_getc(void) 387 { 388 unsigned char c, err_c; 389 #ifdef SH4 390 unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */ 391 #endif 392 393 for (;;) { 394 /* wait for ready */ 395 while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0) 396 continue; 397 398 c = scif_frdr_read(); 399 err_c = scif_ssr_read(); 400 scif_ssr_write(scif_ssr_read() 401 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR)); 402 #ifdef SH4 403 if (CPU_IS_SH4) { 404 err_c2 = scif_lsr_read(); 405 scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER); 406 } 407 #endif 408 if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER 409 | SCSSR2_PER)) == 0) 410 { 411 #ifdef SH4 412 if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0)) 413 #endif 414 return(c); 415 } 416 } 417 418 } 419 420 static int 421 scif_match(device_t parent, cfdata_t cfp, void *aux) 422 { 423 424 if (scif_attached) 425 return 0; 426 427 if (strcmp(cfp->cf_name, "scif") != 0) 428 return 0; 429 430 return 1; 431 } 432 433 static void 434 scif_attach(device_t parent, device_t self, void *aux) 435 { 436 struct scif_softc *sc; 437 struct tty *tp; 438 439 sc = device_private(self); 440 sc->sc_dev = self; 441 442 scif_attached = 1; 443 444 sc->sc_hwflags = 0; /* XXX */ 445 sc->sc_swflags = 0; /* XXX */ 446 sc->sc_fifolen = 16; 447 448 aprint_normal("\n"); 449 if (scifisconsole) { 450 aprint_naive(" (console)\n"); 451 aprint_normal_dev(self, "console\n"); 452 SET(sc->sc_hwflags, SCIF_HW_CONSOLE); 453 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 454 } 455 #ifdef KGDB 456 else if (kgdb_attached) { 457 aprint_naive(" (kgdb)\n"); 458 aprint_normal_dev(self, "kgdb\n"); 459 SET(sc->sc_hwflags, SCIF_HW_KGDB); 460 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 461 } 462 #endif 463 else { 464 aprint_naive("\n"); 465 InitializeScif(9600); /* XXX */ 466 } 467 468 callout_init(&sc->sc_diag_ch, 0); 469 #ifdef SH4 470 intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 471 scifintr, sc); 472 intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 473 scifintr, sc); 474 intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 475 scifintr, sc); 476 intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 477 scifintr, sc); 478 #else 479 intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 480 scifintr, sc); 481 intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 482 scifintr, sc); 483 intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 484 scifintr, sc); 485 intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 486 scifintr, sc); 487 #endif 488 489 sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc); 490 SET(sc->sc_hwflags, SCIF_HW_DEV_OK); 491 492 tp = tty_alloc(); 493 tp->t_oproc = scifstart; 494 tp->t_param = scifparam; 495 tp->t_hwiflow = NULL; 496 497 sc->sc_tty = tp; 498 sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 499 if (sc->sc_rbuf == NULL) { 500 aprint_error_dev(self, "unable to allocate ring buffer\n"); 501 return; 502 } 503 sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1); 504 505 tty_attach(tp); 506 507 /* XXX: TODO */ 508 if (!pmf_device_register(self, NULL, NULL)) 509 aprint_error_dev(self, "unable to establish power handler\n"); 510 } 511 512 /* 513 * Start or restart transmission. 514 */ 515 static void 516 scifstart(struct tty *tp) 517 { 518 struct scif_softc *sc; 519 int s; 520 521 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 522 523 s = spltty(); 524 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 525 goto out; 526 if (sc->sc_tx_stopped) 527 goto out; 528 if (!ttypull(tp)) 529 goto out; 530 531 /* Grab the first contiguous region of buffer space. */ 532 { 533 u_char *tba; 534 int tbc; 535 536 tba = tp->t_outq.c_cf; 537 tbc = ndqb(&tp->t_outq, 0); 538 539 (void)splserial(); 540 541 sc->sc_tba = tba; 542 sc->sc_tbc = tbc; 543 } 544 545 SET(tp->t_state, TS_BUSY); 546 sc->sc_tx_busy = 1; 547 548 /* Enable transmit completion interrupts if necessary. */ 549 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 550 551 /* Output the first chunk of the contiguous buffer. */ 552 { 553 int n; 554 int maxchars; 555 int i; 556 557 n = sc->sc_tbc; 558 maxchars = sc->sc_fifolen 559 - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 560 if (n > maxchars) 561 n = maxchars; 562 563 for (i = 0; i < n; i++) { 564 scif_putc(*(sc->sc_tba)); 565 sc->sc_tba++; 566 } 567 sc->sc_tbc -= n; 568 } 569 out: 570 splx(s); 571 return; 572 } 573 574 /* 575 * Set SCIF tty parameters from termios. 576 * XXX - Should just copy the whole termios after 577 * making sure all the changes could be done. 578 */ 579 static int 580 scifparam(struct tty *tp, struct termios *t) 581 { 582 struct scif_softc *sc; 583 int ospeed = t->c_ospeed; 584 int s; 585 586 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 587 if (!device_is_active(sc->sc_dev)) 588 return (EIO); 589 590 /* Check requested parameters. */ 591 if (ospeed < 0) 592 return (EINVAL); 593 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 594 return (EINVAL); 595 596 /* 597 * For the console, always force CLOCAL and !HUPCL, so that the port 598 * is always active. 599 */ 600 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 601 ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 602 SET(t->c_cflag, CLOCAL); 603 CLR(t->c_cflag, HUPCL); 604 } 605 606 /* 607 * If there were no changes, don't do anything. This avoids dropping 608 * input and improves performance when all we did was frob things like 609 * VMIN and VTIME. 610 */ 611 if (tp->t_ospeed == t->c_ospeed && 612 tp->t_cflag == t->c_cflag) 613 return (0); 614 615 #if 0 616 /* XXX (msaitoh) */ 617 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 618 #endif 619 620 s = splserial(); 621 622 /* 623 * Set the flow control pins depending on the current flow control 624 * mode. 625 */ 626 if (ISSET(t->c_cflag, CRTSCTS)) { 627 scif_fcr_write(scif_fcr_read() | SCFCR2_MCE); 628 } else { 629 scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE); 630 } 631 632 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1); 633 634 /* 635 * Set the FIFO threshold based on the receive speed. 636 * 637 * * If it's a low speed, it's probably a mouse or some other 638 * interactive device, so set the threshold low. 639 * * If it's a high speed, trim the trigger level down to prevent 640 * overflows. 641 * * Otherwise set it a bit higher. 642 */ 643 #if 0 644 /* XXX (msaitoh) */ 645 if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP)) 646 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 647 else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO)) 648 sc->sc_fifo = FIFO_ENABLE | 649 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 650 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 651 else 652 sc->sc_fifo = 0; 653 #endif 654 655 /* And copy to tty. */ 656 tp->t_ispeed = 0; 657 tp->t_ospeed = t->c_ospeed; 658 tp->t_cflag = t->c_cflag; 659 660 if (!sc->sc_heldchange) { 661 if (sc->sc_tx_busy) { 662 sc->sc_heldtbc = sc->sc_tbc; 663 sc->sc_tbc = 0; 664 sc->sc_heldchange = 1; 665 } 666 #if 0 667 /* XXX (msaitoh) */ 668 else 669 scif_loadchannelregs(sc); 670 #endif 671 } 672 673 if (!ISSET(t->c_cflag, CHWFLOW)) { 674 /* Disable the high water mark. */ 675 sc->sc_r_hiwat = 0; 676 sc->sc_r_lowat = 0; 677 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 678 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 679 scif_schedrx(sc); 680 } 681 } else { 682 sc->sc_r_hiwat = scif_rbuf_hiwat; 683 sc->sc_r_lowat = scif_rbuf_lowat; 684 } 685 686 splx(s); 687 688 #ifdef SCIF_DEBUG 689 if (scif_debug) 690 scifstatus(sc, "scifparam "); 691 #endif 692 693 if (!ISSET(t->c_cflag, CHWFLOW)) { 694 if (sc->sc_tx_stopped) { 695 sc->sc_tx_stopped = 0; 696 scifstart(tp); 697 } 698 } 699 700 return (0); 701 } 702 703 static void 704 scif_iflush(struct scif_softc *sc) 705 { 706 int i; 707 708 i = scif_fdr_read() & SCFDR2_RECVCNT; 709 710 while (i > 0) { 711 (void)scif_frdr_read(); 712 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR)); 713 i--; 714 } 715 } 716 717 int 718 scifopen(dev_t dev, int flag, int mode, struct lwp *l) 719 { 720 struct scif_softc *sc; 721 struct tty *tp; 722 int s, s2; 723 int error; 724 725 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 726 if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) || 727 sc->sc_rbuf == NULL) 728 return (ENXIO); 729 730 if (!device_is_active(sc->sc_dev)) 731 return (ENXIO); 732 733 #ifdef KGDB 734 /* 735 * If this is the kgdb port, no other use is permitted. 736 */ 737 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) 738 return (EBUSY); 739 #endif /* KGDB */ 740 741 tp = sc->sc_tty; 742 743 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 744 return (EBUSY); 745 746 s = spltty(); 747 748 /* 749 * Do the following iff this is a first open. 750 */ 751 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 752 struct termios t; 753 754 tp->t_dev = dev; 755 756 s2 = splserial(); 757 758 /* Turn on interrupts. */ 759 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 760 761 splx(s2); 762 763 /* 764 * Initialize the termios status to the defaults. Add in the 765 * sticky bits from TIOCSFLAGS. 766 */ 767 t.c_ispeed = 0; 768 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 769 t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */ 770 t.c_cflag = scifconscflag; 771 } else { 772 t.c_ospeed = TTYDEF_SPEED; 773 t.c_cflag = TTYDEF_CFLAG; 774 } 775 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 776 SET(t.c_cflag, CLOCAL); 777 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 778 SET(t.c_cflag, CRTSCTS); 779 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 780 SET(t.c_cflag, MDMBUF); 781 /* Make sure scifparam() will do something. */ 782 tp->t_ospeed = 0; 783 (void) scifparam(tp, &t); 784 tp->t_iflag = TTYDEF_IFLAG; 785 tp->t_oflag = TTYDEF_OFLAG; 786 tp->t_lflag = TTYDEF_LFLAG; 787 ttychars(tp); 788 ttsetwater(tp); 789 790 s2 = splserial(); 791 792 /* Clear the input ring, and unblock. */ 793 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 794 sc->sc_rbavail = scif_rbuf_size; 795 scif_iflush(sc); 796 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 797 #if 0 798 /* XXX (msaitoh) */ 799 scif_hwiflow(sc); 800 #endif 801 802 #ifdef SCIF_DEBUG 803 if (scif_debug) 804 scifstatus(sc, "scifopen "); 805 #endif 806 807 splx(s2); 808 } 809 810 splx(s); 811 812 error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 813 if (error) 814 goto bad; 815 816 error = (*tp->t_linesw->l_open)(dev, tp); 817 if (error) 818 goto bad; 819 820 return (0); 821 822 bad: 823 824 return (error); 825 } 826 827 int 828 scifclose(dev_t dev, int flag, int mode, struct lwp *l) 829 { 830 struct scif_softc *sc; 831 struct tty *tp; 832 833 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 834 tp = sc->sc_tty; 835 836 /* XXX This is for cons.c. */ 837 if (!ISSET(tp->t_state, TS_ISOPEN)) 838 return (0); 839 840 (*tp->t_linesw->l_close)(tp, flag); 841 ttyclose(tp); 842 843 if (!device_is_active(sc->sc_dev)) 844 return (0); 845 846 return (0); 847 } 848 849 int 850 scifread(dev_t dev, struct uio *uio, int flag) 851 { 852 struct scif_softc *sc; 853 struct tty *tp; 854 855 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 856 tp = sc->sc_tty; 857 858 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 859 } 860 861 int 862 scifwrite(dev_t dev, struct uio *uio, int flag) 863 { 864 struct scif_softc *sc; 865 struct tty *tp; 866 867 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 868 tp = sc->sc_tty; 869 870 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 871 } 872 873 int 874 scifpoll(dev_t dev, int events, struct lwp *l) 875 { 876 struct scif_softc *sc; 877 struct tty *tp; 878 879 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 880 tp = sc->sc_tty; 881 882 return ((*tp->t_linesw->l_poll)(tp, events, l)); 883 } 884 885 struct tty * 886 sciftty(dev_t dev) 887 { 888 struct scif_softc *sc; 889 struct tty *tp; 890 891 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 892 tp = sc->sc_tty; 893 894 return (tp); 895 } 896 897 int 898 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 899 { 900 struct scif_softc *sc; 901 struct tty *tp; 902 int error; 903 int s; 904 905 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 906 if (!device_is_active(sc->sc_dev)) 907 return (EIO); 908 909 tp = sc->sc_tty; 910 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 911 if (error != EPASSTHROUGH) 912 return (error); 913 914 error = ttioctl(tp, cmd, data, flag, l); 915 if (error != EPASSTHROUGH) 916 return (error); 917 918 error = 0; 919 920 s = splserial(); 921 922 switch (cmd) { 923 case TIOCSBRK: 924 scif_break(sc, 1); 925 break; 926 927 case TIOCCBRK: 928 scif_break(sc, 0); 929 break; 930 931 case TIOCGFLAGS: 932 *(int *)data = sc->sc_swflags; 933 break; 934 935 case TIOCSFLAGS: 936 error = kauth_authorize_device_tty(l->l_cred, 937 KAUTH_DEVICE_TTY_PRIVSET, tp); 938 if (error) 939 break; 940 sc->sc_swflags = *(int *)data; 941 break; 942 943 default: 944 error = EPASSTHROUGH; 945 break; 946 } 947 948 splx(s); 949 950 return (error); 951 } 952 953 static void 954 scif_schedrx(struct scif_softc *sc) 955 { 956 957 sc->sc_rx_ready = 1; 958 959 /* Wake up the poller. */ 960 softint_schedule(sc->sc_si); 961 } 962 963 static void 964 scif_break(struct scif_softc *sc, int onoff) 965 { 966 967 if (onoff) 968 scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE); 969 else 970 scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE); 971 972 #if 0 /* XXX */ 973 if (!sc->sc_heldchange) { 974 if (sc->sc_tx_busy) { 975 sc->sc_heldtbc = sc->sc_tbc; 976 sc->sc_tbc = 0; 977 sc->sc_heldchange = 1; 978 } else 979 scif_loadchannelregs(sc); 980 } 981 #endif 982 } 983 984 /* 985 * Stop output, e.g., for ^S or output flush. 986 */ 987 void 988 scifstop(struct tty *tp, int flag) 989 { 990 struct scif_softc *sc; 991 int s; 992 993 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 994 995 s = splserial(); 996 if (ISSET(tp->t_state, TS_BUSY)) { 997 /* Stop transmitting at the next chunk. */ 998 sc->sc_tbc = 0; 999 sc->sc_heldtbc = 0; 1000 if (!ISSET(tp->t_state, TS_TTSTOP)) 1001 SET(tp->t_state, TS_FLUSH); 1002 } 1003 splx(s); 1004 } 1005 1006 static void 1007 scifdiag(void *arg) 1008 { 1009 struct scif_softc *sc = arg; 1010 int overflows, floods; 1011 int s; 1012 1013 s = splserial(); 1014 overflows = sc->sc_overflows; 1015 sc->sc_overflows = 0; 1016 floods = sc->sc_floods; 1017 sc->sc_floods = 0; 1018 sc->sc_errors = 0; 1019 splx(s); 1020 1021 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1022 device_xname(sc->sc_dev), 1023 overflows, overflows == 1 ? "" : "s", 1024 floods, floods == 1 ? "" : "s"); 1025 } 1026 1027 static void 1028 scif_rxsoft(struct scif_softc *sc, struct tty *tp) 1029 { 1030 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1031 u_char *get, *end; 1032 u_int cc, scc; 1033 u_char ssr2; 1034 int code; 1035 int s; 1036 1037 end = sc->sc_ebuf; 1038 get = sc->sc_rbget; 1039 scc = cc = scif_rbuf_size - sc->sc_rbavail; 1040 1041 if (cc == scif_rbuf_size) { 1042 sc->sc_floods++; 1043 if (sc->sc_errors++ == 0) 1044 callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc); 1045 } 1046 1047 while (cc) { 1048 code = get[0]; 1049 ssr2 = get[1]; 1050 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) { 1051 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER)) 1052 SET(code, TTY_FE); 1053 if (ISSET(ssr2, SCSSR2_PER)) 1054 SET(code, TTY_PE); 1055 } 1056 if ((*rint)(code, tp) == -1) { 1057 /* 1058 * The line discipline's buffer is out of space. 1059 */ 1060 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1061 /* 1062 * We're either not using flow control, or the 1063 * line discipline didn't tell us to block for 1064 * some reason. Either way, we have no way to 1065 * know when there's more space available, so 1066 * just drop the rest of the data. 1067 */ 1068 get += cc << 1; 1069 if (get >= end) 1070 get -= scif_rbuf_size << 1; 1071 cc = 0; 1072 } else { 1073 /* 1074 * Don't schedule any more receive processing 1075 * until the line discipline tells us there's 1076 * space available (through scifhwiflow()). 1077 * Leave the rest of the data in the input 1078 * buffer. 1079 */ 1080 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1081 } 1082 break; 1083 } 1084 get += 2; 1085 if (get >= end) 1086 get = sc->sc_rbuf; 1087 cc--; 1088 } 1089 1090 if (cc != scc) { 1091 sc->sc_rbget = get; 1092 s = splserial(); 1093 cc = sc->sc_rbavail += scc - cc; 1094 /* Buffers should be ok again, release possible block. */ 1095 if (cc >= sc->sc_r_lowat) { 1096 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1097 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1098 scif_scr_write(scif_scr_read() | SCSCR2_RIE); 1099 } 1100 #if 0 1101 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1102 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1103 scif_hwiflow(sc); 1104 } 1105 #endif 1106 } 1107 splx(s); 1108 } 1109 } 1110 1111 static void 1112 scif_txsoft(struct scif_softc *sc, struct tty *tp) 1113 { 1114 1115 CLR(tp->t_state, TS_BUSY); 1116 if (ISSET(tp->t_state, TS_FLUSH)) 1117 CLR(tp->t_state, TS_FLUSH); 1118 else 1119 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1120 (*tp->t_linesw->l_start)(tp); 1121 } 1122 1123 #if 0 /* XXX (msaitoh) */ 1124 static void 1125 scif_stsoft(struct scif_softc *sc, struct tty *tp) 1126 { 1127 u_char msr, delta; 1128 int s; 1129 1130 s = splserial(); 1131 msr = sc->sc_msr; 1132 delta = sc->sc_msr_delta; 1133 sc->sc_msr_delta = 0; 1134 splx(s); 1135 1136 if (ISSET(delta, sc->sc_msr_dcd)) { 1137 /* 1138 * Inform the tty layer that carrier detect changed. 1139 */ 1140 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1141 } 1142 1143 if (ISSET(delta, sc->sc_msr_cts)) { 1144 /* Block or unblock output according to flow control. */ 1145 if (ISSET(msr, sc->sc_msr_cts)) { 1146 sc->sc_tx_stopped = 0; 1147 (*tp->t_linesw->l_start)(tp); 1148 } else { 1149 sc->sc_tx_stopped = 1; 1150 } 1151 } 1152 1153 #ifdef SCIF_DEBUG 1154 if (scif_debug) 1155 scifstatus(sc, "scif_stsoft"); 1156 #endif 1157 } 1158 #endif /* 0 */ 1159 1160 static void 1161 scifsoft(void *arg) 1162 { 1163 struct scif_softc *sc = arg; 1164 struct tty *tp; 1165 1166 if (!device_is_active(sc->sc_dev)) 1167 return; 1168 1169 tp = sc->sc_tty; 1170 1171 if (sc->sc_rx_ready) { 1172 sc->sc_rx_ready = 0; 1173 scif_rxsoft(sc, tp); 1174 } 1175 1176 #if 0 1177 if (sc->sc_st_check) { 1178 sc->sc_st_check = 0; 1179 scif_stsoft(sc, tp); 1180 } 1181 #endif 1182 1183 if (sc->sc_tx_done) { 1184 sc->sc_tx_done = 0; 1185 scif_txsoft(sc, tp); 1186 } 1187 } 1188 1189 static int 1190 scifintr(void *arg) 1191 { 1192 struct scif_softc *sc = arg; 1193 u_char *put, *end; 1194 u_int cc; 1195 u_short ssr2; 1196 int count; 1197 1198 if (!device_is_active(sc->sc_dev)) 1199 return (0); 1200 1201 end = sc->sc_ebuf; 1202 put = sc->sc_rbput; 1203 cc = sc->sc_rbavail; 1204 1205 do { 1206 ssr2 = scif_ssr_read(); 1207 if (ISSET(ssr2, SCSSR2_BRK)) { 1208 scif_ssr_write(scif_ssr_read() 1209 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR)); 1210 #ifdef DDB 1211 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 1212 console_debugger(); 1213 } 1214 #endif /* DDB */ 1215 #ifdef KGDB 1216 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) { 1217 kgdb_connect(1); 1218 } 1219 #endif /* KGDB */ 1220 } 1221 count = scif_fdr_read() & SCFDR2_RECVCNT; 1222 if (count != 0) { 1223 for (;;) { 1224 u_char c = scif_frdr_read(); 1225 u_char err = (u_char)(scif_ssr_read() & 0x00ff); 1226 1227 scif_ssr_write(scif_ssr_read() 1228 & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR)); 1229 #ifdef SH4 1230 if (CPU_IS_SH4) 1231 scif_lsr_write(scif_lsr_read() 1232 & ~SCLSR2_ORER); 1233 #endif 1234 if ((cc > 0) && (count > 0)) { 1235 put[0] = c; 1236 put[1] = err; 1237 put += 2; 1238 if (put >= end) 1239 put = sc->sc_rbuf; 1240 cc--; 1241 count--; 1242 } else 1243 break; 1244 } 1245 1246 /* 1247 * Current string of incoming characters ended because 1248 * no more data was available or we ran out of space. 1249 * Schedule a receive event if any data was received. 1250 * If we're out of space, turn off receive interrupts. 1251 */ 1252 sc->sc_rbput = put; 1253 sc->sc_rbavail = cc; 1254 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1255 sc->sc_rx_ready = 1; 1256 1257 /* 1258 * See if we are in danger of overflowing a buffer. If 1259 * so, use hardware flow control to ease the pressure. 1260 */ 1261 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1262 cc < sc->sc_r_hiwat) { 1263 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1264 #if 0 1265 scif_hwiflow(sc); 1266 #endif 1267 } 1268 1269 /* 1270 * If we're out of space, disable receive interrupts 1271 * until the queue has drained a bit. 1272 */ 1273 if (!cc) { 1274 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1275 scif_scr_write(scif_scr_read() & ~SCSCR2_RIE); 1276 } 1277 } else { 1278 if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) { 1279 scif_scr_write(scif_scr_read() 1280 & ~(SCSCR2_TIE | SCSCR2_RIE)); 1281 delay(10); 1282 scif_scr_write(scif_scr_read() 1283 | SCSCR2_TIE | SCSCR2_RIE); 1284 continue; 1285 } 1286 } 1287 } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)); 1288 1289 #if 0 1290 msr = bus_space_read_1(iot, ioh, scif_msr); 1291 delta = msr ^ sc->sc_msr; 1292 sc->sc_msr = msr; 1293 if (ISSET(delta, sc->sc_msr_mask)) { 1294 SET(sc->sc_msr_delta, delta); 1295 1296 /* 1297 * Pulse-per-second clock signal on edge of DCD? 1298 */ 1299 if (ISSET(delta, sc->sc_ppsmask)) { 1300 struct timeval tv; 1301 if (ISSET(msr, sc->sc_ppsmask) == 1302 sc->sc_ppsassert) { 1303 /* XXX nanotime() */ 1304 microtime(&tv); 1305 TIMEVAL_TO_TIMESPEC(&tv, 1306 &sc->ppsinfo.assert_timestamp); 1307 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1308 timespecadd(&sc->ppsinfo.assert_timestamp, 1309 &sc->ppsparam.assert_offset, 1310 &sc->ppsinfo.assert_timestamp); 1311 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1312 } 1313 1314 #ifdef PPS_SYNC 1315 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1316 hardpps(&tv, tv.tv_usec); 1317 #endif 1318 sc->ppsinfo.assert_sequence++; 1319 sc->ppsinfo.current_mode = 1320 sc->ppsparam.mode; 1321 1322 } else if (ISSET(msr, sc->sc_ppsmask) == 1323 sc->sc_ppsclear) { 1324 /* XXX nanotime() */ 1325 microtime(&tv); 1326 TIMEVAL_TO_TIMESPEC(&tv, 1327 &sc->ppsinfo.clear_timestamp); 1328 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1329 timespecadd(&sc->ppsinfo.clear_timestamp, 1330 &sc->ppsparam.clear_offset, 1331 &sc->ppsinfo.clear_timestamp); 1332 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1333 } 1334 1335 #ifdef PPS_SYNC 1336 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1337 hardpps(&tv, tv.tv_usec); 1338 #endif 1339 sc->ppsinfo.clear_sequence++; 1340 sc->ppsinfo.current_mode = 1341 sc->ppsparam.mode; 1342 } 1343 } 1344 1345 /* 1346 * Stop output immediately if we lose the output 1347 * flow control signal or carrier detect. 1348 */ 1349 if (ISSET(~msr, sc->sc_msr_mask)) { 1350 sc->sc_tbc = 0; 1351 sc->sc_heldtbc = 0; 1352 #ifdef SCIF_DEBUG 1353 if (scif_debug) 1354 scifstatus(sc, "scifintr "); 1355 #endif 1356 } 1357 1358 sc->sc_st_check = 1; 1359 } 1360 #endif 1361 1362 /* 1363 * Done handling any receive interrupts. See if data can be 1364 * transmitted as well. Schedule tx done event if no data left 1365 * and tty was marked busy. 1366 */ 1367 if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */ 1368 /* 1369 * If we've delayed a parameter change, do it now, and restart 1370 * output. 1371 */ 1372 if (sc->sc_heldchange) { 1373 sc->sc_heldchange = 0; 1374 sc->sc_tbc = sc->sc_heldtbc; 1375 sc->sc_heldtbc = 0; 1376 } 1377 1378 /* Output the next chunk of the contiguous buffer, if any. */ 1379 if (sc->sc_tbc > 0) { 1380 int n; 1381 int maxchars; 1382 int i; 1383 1384 n = sc->sc_tbc; 1385 maxchars = sc->sc_fifolen - 1386 ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 1387 if (n > maxchars) 1388 n = maxchars; 1389 1390 for (i = 0; i < n; i++) { 1391 scif_putc(*(sc->sc_tba)); 1392 sc->sc_tba++; 1393 } 1394 sc->sc_tbc -= n; 1395 } else { 1396 /* Disable transmit completion interrupts if necessary. */ 1397 #if 0 1398 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1399 #endif 1400 scif_scr_write(scif_scr_read() & ~SCSCR2_TIE); 1401 1402 if (sc->sc_tx_busy) { 1403 sc->sc_tx_busy = 0; 1404 sc->sc_tx_done = 1; 1405 } 1406 } 1407 } 1408 1409 /* Wake up the poller. */ 1410 softint_schedule(sc->sc_si); 1411 1412 #ifdef RND_SCIF 1413 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1414 #endif 1415 1416 return (1); 1417 } 1418 1419 void 1420 scifcnprobe(struct consdev *cp) 1421 { 1422 int maj; 1423 1424 /* locate the major number */ 1425 maj = cdevsw_lookup_major(&scif_cdevsw); 1426 1427 /* Initialize required fields. */ 1428 cp->cn_dev = makedev(maj, 0); 1429 #ifdef SCIFCONSOLE 1430 cp->cn_pri = CN_REMOTE; 1431 #else 1432 cp->cn_pri = CN_NORMAL; 1433 #endif 1434 } 1435 1436 void 1437 scifcninit(struct consdev *cp) 1438 { 1439 1440 InitializeScif(scifcn_speed); 1441 scifisconsole = 1; 1442 } 1443 1444 int 1445 scifcngetc(dev_t dev) 1446 { 1447 int c; 1448 int s; 1449 1450 s = splserial(); 1451 c = scif_getc(); 1452 splx(s); 1453 1454 return (c); 1455 } 1456 1457 void 1458 scifcnputc(dev_t dev, int c) 1459 { 1460 int s; 1461 1462 s = splserial(); 1463 scif_putc((u_char)c); 1464 splx(s); 1465 } 1466 1467 #ifdef KGDB 1468 int 1469 scif_kgdb_init(void) 1470 { 1471 1472 if (strcmp(kgdb_devname, "scif") != 0) 1473 return (1); 1474 1475 if (scifisconsole) 1476 return (1); /* can't share with console */ 1477 1478 InitializeScif(kgdb_rate); 1479 1480 kgdb_attach((int (*)(void *))scifcngetc, 1481 (void (*)(void *, int))scifcnputc, NULL); 1482 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1483 kgdb_attached = 1; 1484 1485 return (0); 1486 } 1487 #endif /* KGDB */ 1488