xref: /netbsd-src/sys/arch/sh3/dev/scif.c (revision 946379e7b37692fc43f68eb0d1c10daa0a7f3b6c)
1 /*	$NetBSD: scif.c,v 1.66 2015/12/06 02:21:55 tsutsui Exp $ */
2 
3 /*-
4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 /*-
30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31  * All rights reserved.
32  *
33  * This code is derived from software contributed to The NetBSD Foundation
34  * by Charles M. Hannum.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
46  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
49  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
50  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
51  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
52  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
53  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55  * POSSIBILITY OF SUCH DAMAGE.
56  */
57 
58 /*
59  * Copyright (c) 1991 The Regents of the University of California.
60  * All rights reserved.
61  *
62  * Redistribution and use in source and binary forms, with or without
63  * modification, are permitted provided that the following conditions
64  * are met:
65  * 1. Redistributions of source code must retain the above copyright
66  *    notice, this list of conditions and the following disclaimer.
67  * 2. Redistributions in binary form must reproduce the above copyright
68  *    notice, this list of conditions and the following disclaimer in the
69  *    documentation and/or other materials provided with the distribution.
70  * 3. Neither the name of the University nor the names of its contributors
71  *    may be used to endorse or promote products derived from this software
72  *    without specific prior written permission.
73  *
74  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
75  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
76  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
77  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
78  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
79  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
80  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
82  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
83  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
84  * SUCH DAMAGE.
85  *
86  *	@(#)com.c	7.5 (Berkeley) 5/16/91
87  */
88 
89 /*
90  * SH internal serial driver
91  *
92  * This code is derived from both z8530tty.c and com.c
93  */
94 
95 #include <sys/cdefs.h>
96 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.66 2015/12/06 02:21:55 tsutsui Exp $");
97 
98 #include "opt_kgdb.h"
99 #include "opt_scif.h"
100 
101 #include <sys/param.h>
102 #include <sys/systm.h>
103 #include <sys/tty.h>
104 #include <sys/proc.h>
105 #include <sys/conf.h>
106 #include <sys/file.h>
107 #include <sys/syslog.h>
108 #include <sys/kernel.h>
109 #include <sys/device.h>
110 #include <sys/malloc.h>
111 #include <sys/kgdb.h>
112 #include <sys/kauth.h>
113 #include <sys/intr.h>
114 
115 #include <dev/cons.h>
116 
117 #include <sh3/clock.h>
118 #include <sh3/exception.h>
119 #include <sh3/scifreg.h>
120 
121 #include <sh3/dev/scifvar.h>
122 
123 #include "locators.h"
124 
125 
126 struct scif_softc {
127 	device_t sc_dev;
128 
129 	struct tty *sc_tty;
130 	void *sc_si;
131 
132 	callout_t sc_diag_ch;
133 
134 #if 0
135 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
136 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
137 
138 	int sc_drq;
139 
140 	int sc_frequency;
141 #endif
142 
143 	u_int sc_overflows,
144 	      sc_floods,
145 	      sc_errors;		/* number of retries so far */
146 	u_char sc_status[7];		/* copy of registers */
147 
148 	int sc_hwflags;
149 	int sc_swflags;
150 	u_int sc_fifolen;
151 
152 	u_int sc_r_hiwat,
153 	      sc_r_lowat;
154 	u_char *volatile sc_rbget,
155 	       *volatile sc_rbput;
156  	volatile u_int sc_rbavail;
157 	u_char *sc_rbuf,
158 	       *sc_ebuf;
159 
160  	u_char *sc_tba;			/* transmit buffer address */
161  	u_int sc_tbc,			/* transmit byte count */
162 	      sc_heldtbc;
163 
164 	volatile u_char sc_rx_flags,
165 #define	RX_TTY_BLOCKED		0x01
166 #define	RX_TTY_OVERFLOWED	0x02
167 #define	RX_IBUF_BLOCKED		0x04
168 #define	RX_IBUF_OVERFLOWED	0x08
169 #define	RX_ANY_BLOCK		0x0f
170 			sc_tx_busy,	/* working on an output chunk */
171 			sc_tx_done,	/* done with one output chunk */
172 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
173 			sc_st_check,	/* got a status interrupt */
174 			sc_rx_ready;
175 
176 	volatile u_char sc_heldchange;
177 };
178 
179 
180 static int scif_match(device_t, cfdata_t, void *);
181 static void scif_attach(device_t, device_t, void *);
182 
183 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc),
184     scif_match, scif_attach, NULL, NULL);
185 
186 static int scif_attached = 0;	/* XXX: FIXME: don't limit to just one! */
187 
188 extern struct cfdriver scif_cd;
189 
190 #define	SCIFUNIT(x)	TTUNIT(x)
191 #define	SCIFDIALOUT(x)	TTDIALOUT(x)
192 
193 
194 /* console */
195 dev_type_cnprobe(scifcnprobe);
196 dev_type_cninit(scifcninit);
197 dev_type_cngetc(scifcngetc);
198 dev_type_cnputc(scifcnputc);
199 
200 
201 /* cdevsw */
202 dev_type_open(scifopen);
203 dev_type_close(scifclose);
204 dev_type_read(scifread);
205 dev_type_write(scifwrite);
206 dev_type_ioctl(scifioctl);
207 dev_type_stop(scifstop);
208 dev_type_tty(sciftty);
209 dev_type_poll(scifpoll);
210 
211 const struct cdevsw scif_cdevsw = {
212 	.d_open = scifopen,
213 	.d_close = scifclose,
214 	.d_read = scifread,
215 	.d_write = scifwrite,
216 	.d_ioctl = scifioctl,
217 	.d_stop = scifstop,
218 	.d_tty = sciftty,
219 	.d_poll = scifpoll,
220 	.d_mmap = nommap,
221 	.d_kqfilter = ttykqfilter,
222 	.d_discard = nodiscard,
223 	.d_flag = D_TTY
224 };
225 
226 #ifndef SCIFCONSOLE
227 #define SCIFCONSOLE	0
228 #endif
229 int scifconsole = SCIFCONSOLE;	/* patchable */
230 
231 /* struct tty */
232 static void scifstart(struct tty *);
233 static int scifparam(struct tty *, struct termios *);
234 
235 
236 void InitializeScif (unsigned int);
237 int ScifErrCheck(void);
238 void scif_putc(unsigned char);
239 unsigned char scif_getc(void);
240 
241 static int scifintr(void *);
242 static void scifsoft(void *);
243 static void scif_rxsoft(struct scif_softc *, struct tty *);
244 static void scif_txsoft(struct scif_softc *, struct tty *);
245 #if 0
246 static void scif_stsoft(struct scif_softc *, struct tty *);
247 #endif
248 static void scif_schedrx(struct scif_softc *);
249 static void scifdiag(void *);
250 
251 static void scif_break(struct scif_softc *, int);
252 static void scif_iflush(struct scif_softc *);
253 
254 
255 /* Hardware flag masks (sc_hwflags) */
256 #define	SCIF_HW_NOIEN	0x01
257 #define	SCIF_HW_FIFO	0x02
258 #define	SCIF_HW_FLOW	0x08
259 #define	SCIF_HW_DEV_OK	0x20
260 #define	SCIF_HW_CONSOLE	0x40
261 #define	SCIF_HW_KGDB	0x80
262 
263 
264 /* Buffer size for character buffer */
265 #define	SCIF_RING_SIZE	2048
266 static unsigned int scif_rbuf_size = SCIF_RING_SIZE;
267 
268 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
269 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
270 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
271 
272 
273 #ifdef SCIFCN_SPEED
274 unsigned int scifcn_speed = SCIFCN_SPEED;
275 #else
276 unsigned int scifcn_speed = 9600;
277 #endif
278 
279 #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
280 int scifconscflag = CONMODE;
281 
282 static int scifisconsole = 0;
283 
284 #ifdef KGDB
285 static int kgdb_attached = 0;
286 #endif
287 
288 
289 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
290 
291 
292 /* XXX: uwe
293  * Prepare for bus_spacification.  The difference in access widths is
294  * still handled by the magic definitions in scifreg.h
295  */
296 #define scif_smr_read()		SHREG_SCSMR2
297 #define scif_smr_write(v)	(SHREG_SCSMR2 = (v))
298 
299 #define scif_brr_read()		SHREG_SCBRR2
300 #define scif_brr_write(v)	(SHREG_SCBRR2 = (v))
301 
302 #define scif_scr_read()		SHREG_SCSCR2
303 #define scif_scr_write(v)	(SHREG_SCSCR2 = (v))
304 
305 #define scif_ftdr_write(v)	(SHREG_SCFTDR2 = (v))
306 
307 #define scif_ssr_read()		SHREG_SCSSR2
308 #define scif_ssr_write(v)	(SHREG_SCSSR2 = (v))
309 
310 #define scif_frdr_read()	SHREG_SCFRDR2
311 
312 #define scif_fcr_read()		SHREG_SCFCR2
313 #define scif_fcr_write(v)	(SHREG_SCFCR2 = (v))
314 
315 #define scif_fdr_read()		SHREG_SCFDR2
316 
317 #ifdef SH4 /* additional registers in sh4 */
318 
319 #define scif_sptr_read()	SHREG_SCSPTR2
320 #define scif_sptr_write(v)	(SHREG_SCSPTR2 = (v))
321 
322 #define scif_lsr_read()		SHREG_SCLSR2
323 #define scif_lsr_write(v)	(SHREG_SCLSR2 = (v))
324 
325 #endif /* SH4 */
326 
327 
328 void
329 InitializeScif(unsigned int bps)
330 {
331 
332 	/* Initialize SCR */
333 	scif_scr_write(0x00);
334 
335 #if 0
336 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
337 #else
338 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
339 #endif
340 	/* Serial Mode Register */
341 	scif_smr_write(0x00);	/* 8bit,NonParity,Even,1Stop */
342 
343 	/* Bit Rate Register */
344 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
345 
346 	/*
347 	 * wait 2m Sec, because Send/Recv must begin 1 bit period after
348 	 * BRR is set.
349 	 */
350 	delay(2000);
351 
352 #if 0
353 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
354 #else
355 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
356 #endif
357 
358 	/* Send permission, Receive permission ON */
359 	scif_scr_write(SCSCR2_TE | SCSCR2_RE);
360 
361 	/* Serial Status Register */
362 	scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
363 }
364 
365 int
366 ScifErrCheck(void)
367 {
368 
369 	return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
370 }
371 
372 void
373 scif_putc(unsigned char c)
374 {
375 
376 	/* wait for ready */
377 	while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
378 		continue;
379 
380 	/* write send data to send register */
381 	scif_ftdr_write(c);
382 
383 	/* clear ready flag */
384 	scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
385 }
386 
387 unsigned char
388 scif_getc(void)
389 {
390 	unsigned char c, err_c;
391 #ifdef SH4
392 	unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
393 #endif
394 
395 	for (;;) {
396 		/* wait for ready */
397 		while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
398 			continue;
399 
400 		c = scif_frdr_read();
401 		err_c = scif_ssr_read();
402 		scif_ssr_write(scif_ssr_read()
403 			& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
404 #ifdef SH4
405 		if (CPU_IS_SH4) {
406 			err_c2 = scif_lsr_read();
407 			scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
408 		}
409 #endif
410 		if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
411 		    | SCSSR2_PER)) == 0)
412 		{
413 #ifdef SH4
414 			if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
415 #endif
416 			return(c);
417 		}
418 	}
419 
420 }
421 
422 static int
423 scif_match(device_t parent, cfdata_t cfp, void *aux)
424 {
425 
426 	if (scif_attached)
427 		return 0;
428 
429 	if (strcmp(cfp->cf_name, "scif") != 0)
430 		return 0;
431 
432 	return 1;
433 }
434 
435 static void
436 scif_attach(device_t parent, device_t self, void *aux)
437 {
438 	struct scif_softc *sc;
439 	struct tty *tp;
440 
441 	sc = device_private(self);
442 	sc->sc_dev = self;
443 
444 	scif_attached = 1;
445 
446 	sc->sc_hwflags = 0;	/* XXX */
447 	sc->sc_swflags = 0;	/* XXX */
448 	sc->sc_fifolen = 16;
449 
450 	aprint_normal("\n");
451 	if (scifisconsole) {
452 		aprint_naive(" (console)\n");
453 		aprint_normal_dev(self, "console\n");
454 		SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
455 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
456 	}
457 #ifdef KGDB
458 	else if (kgdb_attached) {
459 		aprint_naive(" (kgdb)\n");
460 		aprint_normal_dev(self, "kgdb\n");
461 		SET(sc->sc_hwflags, SCIF_HW_KGDB);
462 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
463 	}
464 #endif
465 	else {
466 		aprint_naive("\n");
467 		InitializeScif(9600); /* XXX */
468 	}
469 
470 	callout_init(&sc->sc_diag_ch, 0);
471 #ifdef SH4
472 	intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
473 	    scifintr, sc);
474 	intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
475 	    scifintr, sc);
476 	intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
477 	    scifintr, sc);
478 	intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
479 	    scifintr, sc);
480 #else
481 	intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
482 	    scifintr, sc);
483 	intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
484 	    scifintr, sc);
485 	intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
486 	    scifintr, sc);
487 	intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
488 	    scifintr, sc);
489 #endif
490 
491 	sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc);
492 	SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
493 
494 	tp = tty_alloc();
495 	tp->t_oproc = scifstart;
496 	tp->t_param = scifparam;
497 	tp->t_hwiflow = NULL;
498 
499 	sc->sc_tty = tp;
500 	sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
501 	if (sc->sc_rbuf == NULL) {
502 		aprint_error_dev(self, "unable to allocate ring buffer\n");
503 		return;
504 	}
505 	sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
506 
507 	tty_attach(tp);
508 
509 	/* XXX: TODO */
510 	if (!pmf_device_register(self, NULL, NULL))
511 		aprint_error_dev(self, "unable to establish power handler\n");
512 }
513 
514 /*
515  * Start or restart transmission.
516  */
517 static void
518 scifstart(struct tty *tp)
519 {
520 	struct scif_softc *sc;
521 	int s;
522 
523 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
524 
525 	s = spltty();
526 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
527 		goto out;
528 	if (sc->sc_tx_stopped)
529 		goto out;
530 	if (!ttypull(tp))
531 		goto out;
532 
533 	/* Grab the first contiguous region of buffer space. */
534 	{
535 		u_char *tba;
536 		int tbc;
537 
538 		tba = tp->t_outq.c_cf;
539 		tbc = ndqb(&tp->t_outq, 0);
540 
541 		(void)splserial();
542 
543 		sc->sc_tba = tba;
544 		sc->sc_tbc = tbc;
545 	}
546 
547 	SET(tp->t_state, TS_BUSY);
548 	sc->sc_tx_busy = 1;
549 
550 	/* Enable transmit completion interrupts if necessary. */
551 	scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
552 
553 	/* Output the first chunk of the contiguous buffer. */
554 	{
555 		int n;
556 		int maxchars;
557 		int i;
558 
559 		n = sc->sc_tbc;
560 		maxchars = sc->sc_fifolen
561 			- ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
562 		if (n > maxchars)
563 			n = maxchars;
564 
565 		for (i = 0; i < n; i++) {
566 			scif_putc(*(sc->sc_tba));
567 			sc->sc_tba++;
568 		}
569 		sc->sc_tbc -= n;
570 	}
571 out:
572 	splx(s);
573 	return;
574 }
575 
576 /*
577  * Set SCIF tty parameters from termios.
578  * XXX - Should just copy the whole termios after
579  * making sure all the changes could be done.
580  */
581 static int
582 scifparam(struct tty *tp, struct termios *t)
583 {
584 	struct scif_softc *sc;
585 	int ospeed = t->c_ospeed;
586 	int s;
587 
588 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
589 	if (!device_is_active(sc->sc_dev))
590 		return (EIO);
591 
592 	/* Check requested parameters. */
593 	if (ospeed < 0)
594 		return (EINVAL);
595 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
596 		return (EINVAL);
597 
598 	/*
599 	 * For the console, always force CLOCAL and !HUPCL, so that the port
600 	 * is always active.
601 	 */
602 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
603 	    ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
604 		SET(t->c_cflag, CLOCAL);
605 		CLR(t->c_cflag, HUPCL);
606 	}
607 
608 	/*
609 	 * If there were no changes, don't do anything.  This avoids dropping
610 	 * input and improves performance when all we did was frob things like
611 	 * VMIN and VTIME.
612 	 */
613 	if (tp->t_ospeed == t->c_ospeed &&
614 	    tp->t_cflag == t->c_cflag)
615 		return (0);
616 
617 #if 0
618 /* XXX (msaitoh) */
619 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
620 #endif
621 
622 	s = splserial();
623 
624 	/*
625 	 * Set the flow control pins depending on the current flow control
626 	 * mode.
627 	 */
628 	if (ISSET(t->c_cflag, CRTSCTS)) {
629 		scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
630 	} else {
631 		scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
632 	}
633 
634 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
635 
636 	/*
637 	 * Set the FIFO threshold based on the receive speed.
638 	 *
639 	 *  * If it's a low speed, it's probably a mouse or some other
640 	 *    interactive device, so set the threshold low.
641 	 *  * If it's a high speed, trim the trigger level down to prevent
642 	 *    overflows.
643 	 *  * Otherwise set it a bit higher.
644 	 */
645 #if 0
646 /* XXX (msaitoh) */
647 	if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
648 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
649 	else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
650 		sc->sc_fifo = FIFO_ENABLE |
651 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
652 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
653 	else
654 		sc->sc_fifo = 0;
655 #endif
656 
657 	/* And copy to tty. */
658 	tp->t_ispeed = 0;
659 	tp->t_ospeed = t->c_ospeed;
660 	tp->t_cflag = t->c_cflag;
661 
662 	if (!sc->sc_heldchange) {
663 		if (sc->sc_tx_busy) {
664 			sc->sc_heldtbc = sc->sc_tbc;
665 			sc->sc_tbc = 0;
666 			sc->sc_heldchange = 1;
667 		}
668 #if 0
669 /* XXX (msaitoh) */
670 		else
671 			scif_loadchannelregs(sc);
672 #endif
673 	}
674 
675 	if (!ISSET(t->c_cflag, CHWFLOW)) {
676 		/* Disable the high water mark. */
677 		sc->sc_r_hiwat = 0;
678 		sc->sc_r_lowat = 0;
679 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
680 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
681 			scif_schedrx(sc);
682 		}
683 	} else {
684 		sc->sc_r_hiwat = scif_rbuf_hiwat;
685 		sc->sc_r_lowat = scif_rbuf_lowat;
686 	}
687 
688 	splx(s);
689 
690 #ifdef SCIF_DEBUG
691 	if (scif_debug)
692 		scifstatus(sc, "scifparam ");
693 #endif
694 
695 	if (!ISSET(t->c_cflag, CHWFLOW)) {
696 		if (sc->sc_tx_stopped) {
697 			sc->sc_tx_stopped = 0;
698 			scifstart(tp);
699 		}
700 	}
701 
702 	return (0);
703 }
704 
705 static void
706 scif_iflush(struct scif_softc *sc)
707 {
708 	int i;
709 
710 	i = scif_fdr_read() & SCFDR2_RECVCNT;
711 
712 	while (i > 0) {
713 		(void)scif_frdr_read();
714 		scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
715 		i--;
716 	}
717 }
718 
719 int
720 scifopen(dev_t dev, int flag, int mode, struct lwp *l)
721 {
722 	struct scif_softc *sc;
723 	struct tty *tp;
724 	int s, s2;
725 	int error;
726 
727 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
728 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
729 	    sc->sc_rbuf == NULL)
730 		return (ENXIO);
731 
732 	if (!device_is_active(sc->sc_dev))
733 		return (ENXIO);
734 
735 #ifdef KGDB
736 	/*
737 	 * If this is the kgdb port, no other use is permitted.
738 	 */
739 	if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
740 		return (EBUSY);
741 #endif /* KGDB */
742 
743 	tp = sc->sc_tty;
744 
745 	if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
746 		return (EBUSY);
747 
748 	s = spltty();
749 
750 	/*
751 	 * Do the following iff this is a first open.
752 	 */
753 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
754 		struct termios t;
755 
756 		tp->t_dev = dev;
757 
758 		s2 = splserial();
759 
760 		/* Turn on interrupts. */
761 		scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
762 
763 		splx(s2);
764 
765 		/*
766 		 * Initialize the termios status to the defaults.  Add in the
767 		 * sticky bits from TIOCSFLAGS.
768 		 */
769 		t.c_ispeed = 0;
770 		if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
771 			t.c_ospeed = scifcn_speed;	/* XXX (msaitoh) */
772 			t.c_cflag = scifconscflag;
773 		} else {
774 			t.c_ospeed = TTYDEF_SPEED;
775 			t.c_cflag = TTYDEF_CFLAG;
776 		}
777 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
778 			SET(t.c_cflag, CLOCAL);
779 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
780 			SET(t.c_cflag, CRTSCTS);
781 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
782 			SET(t.c_cflag, MDMBUF);
783 		/* Make sure scifparam() will do something. */
784 		tp->t_ospeed = 0;
785 		(void) scifparam(tp, &t);
786 		tp->t_iflag = TTYDEF_IFLAG;
787 		tp->t_oflag = TTYDEF_OFLAG;
788 		tp->t_lflag = TTYDEF_LFLAG;
789 		ttychars(tp);
790 		ttsetwater(tp);
791 
792 		s2 = splserial();
793 
794 		/* Clear the input ring, and unblock. */
795 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
796 		sc->sc_rbavail = scif_rbuf_size;
797 		scif_iflush(sc);
798 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
799 #if 0
800 /* XXX (msaitoh) */
801 		scif_hwiflow(sc);
802 #endif
803 
804 #ifdef SCIF_DEBUG
805 		if (scif_debug)
806 			scifstatus(sc, "scifopen  ");
807 #endif
808 
809 		splx(s2);
810 	}
811 
812 	splx(s);
813 
814 	error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
815 	if (error)
816 		goto bad;
817 
818 	error = (*tp->t_linesw->l_open)(dev, tp);
819 	if (error)
820 		goto bad;
821 
822 	return (0);
823 
824 bad:
825 
826 	return (error);
827 }
828 
829 int
830 scifclose(dev_t dev, int flag, int mode, struct lwp *l)
831 {
832 	struct scif_softc *sc;
833 	struct tty *tp;
834 
835 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
836 	tp = sc->sc_tty;
837 
838 	/* XXX This is for cons.c. */
839 	if (!ISSET(tp->t_state, TS_ISOPEN))
840 		return (0);
841 
842 	(*tp->t_linesw->l_close)(tp, flag);
843 	ttyclose(tp);
844 
845 	if (!device_is_active(sc->sc_dev))
846 		return (0);
847 
848 	return (0);
849 }
850 
851 int
852 scifread(dev_t dev, struct uio *uio, int flag)
853 {
854 	struct scif_softc *sc;
855 	struct tty *tp;
856 
857 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
858 	tp = sc->sc_tty;
859 
860 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
861 }
862 
863 int
864 scifwrite(dev_t dev, struct uio *uio, int flag)
865 {
866 	struct scif_softc *sc;
867 	struct tty *tp;
868 
869 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
870 	tp = sc->sc_tty;
871 
872 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
873 }
874 
875 int
876 scifpoll(dev_t dev, int events, struct lwp *l)
877 {
878 	struct scif_softc *sc;
879 	struct tty *tp;
880 
881 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
882 	tp = sc->sc_tty;
883 
884 	return ((*tp->t_linesw->l_poll)(tp, events, l));
885 }
886 
887 struct tty *
888 sciftty(dev_t dev)
889 {
890 	struct scif_softc *sc;
891 	struct tty *tp;
892 
893 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
894 	tp = sc->sc_tty;
895 
896 	return (tp);
897 }
898 
899 int
900 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
901 {
902 	struct scif_softc *sc;
903 	struct tty *tp;
904 	int error;
905 	int s;
906 
907 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
908 	if (!device_is_active(sc->sc_dev))
909 		return (EIO);
910 
911 	tp = sc->sc_tty;
912 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
913 	if (error != EPASSTHROUGH)
914 		return (error);
915 
916 	error = ttioctl(tp, cmd, data, flag, l);
917 	if (error != EPASSTHROUGH)
918 		return (error);
919 
920 	error = 0;
921 
922 	s = splserial();
923 
924 	switch (cmd) {
925 	case TIOCSBRK:
926 		scif_break(sc, 1);
927 		break;
928 
929 	case TIOCCBRK:
930 		scif_break(sc, 0);
931 		break;
932 
933 	case TIOCGFLAGS:
934 		*(int *)data = sc->sc_swflags;
935 		break;
936 
937 	case TIOCSFLAGS:
938 		error = kauth_authorize_device_tty(l->l_cred,
939 		    KAUTH_DEVICE_TTY_PRIVSET, tp);
940 		if (error)
941 			break;
942 		sc->sc_swflags = *(int *)data;
943 		break;
944 
945 	default:
946 		error = EPASSTHROUGH;
947 		break;
948 	}
949 
950 	splx(s);
951 
952 	return (error);
953 }
954 
955 static void
956 scif_schedrx(struct scif_softc *sc)
957 {
958 
959 	sc->sc_rx_ready = 1;
960 
961 	/* Wake up the poller. */
962 	softint_schedule(sc->sc_si);
963 }
964 
965 static void
966 scif_break(struct scif_softc *sc, int onoff)
967 {
968 
969 	if (onoff)
970 		scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
971 	else
972 		scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
973 
974 #if 0	/* XXX */
975 	if (!sc->sc_heldchange) {
976 		if (sc->sc_tx_busy) {
977 			sc->sc_heldtbc = sc->sc_tbc;
978 			sc->sc_tbc = 0;
979 			sc->sc_heldchange = 1;
980 		} else
981 			scif_loadchannelregs(sc);
982 	}
983 #endif
984 }
985 
986 /*
987  * Stop output, e.g., for ^S or output flush.
988  */
989 void
990 scifstop(struct tty *tp, int flag)
991 {
992 	struct scif_softc *sc;
993 	int s;
994 
995 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
996 
997 	s = splserial();
998 	if (ISSET(tp->t_state, TS_BUSY)) {
999 		/* Stop transmitting at the next chunk. */
1000 		sc->sc_tbc = 0;
1001 		sc->sc_heldtbc = 0;
1002 		if (!ISSET(tp->t_state, TS_TTSTOP))
1003 			SET(tp->t_state, TS_FLUSH);
1004 	}
1005 	splx(s);
1006 }
1007 
1008 static void
1009 scifdiag(void *arg)
1010 {
1011 	struct scif_softc *sc = arg;
1012 	int overflows, floods;
1013 	int s;
1014 
1015 	s = splserial();
1016 	overflows = sc->sc_overflows;
1017 	sc->sc_overflows = 0;
1018 	floods = sc->sc_floods;
1019 	sc->sc_floods = 0;
1020 	sc->sc_errors = 0;
1021 	splx(s);
1022 
1023 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1024 	    device_xname(sc->sc_dev),
1025 	    overflows, overflows == 1 ? "" : "s",
1026 	    floods, floods == 1 ? "" : "s");
1027 }
1028 
1029 static void
1030 scif_rxsoft(struct scif_softc *sc, struct tty *tp)
1031 {
1032 	int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1033 	u_char *get, *end;
1034 	u_int cc, scc;
1035 	u_char ssr2;
1036 	int code;
1037 	int s;
1038 
1039 	end = sc->sc_ebuf;
1040 	get = sc->sc_rbget;
1041 	scc = cc = scif_rbuf_size - sc->sc_rbavail;
1042 
1043 	if (cc == scif_rbuf_size) {
1044 		sc->sc_floods++;
1045 		if (sc->sc_errors++ == 0)
1046 			callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
1047 	}
1048 
1049 	while (cc) {
1050 		code = get[0];
1051 		ssr2 = get[1];
1052 		if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
1053 			if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
1054 				SET(code, TTY_FE);
1055 			if (ISSET(ssr2, SCSSR2_PER))
1056 				SET(code, TTY_PE);
1057 		}
1058 		if ((*rint)(code, tp) == -1) {
1059 			/*
1060 			 * The line discipline's buffer is out of space.
1061 			 */
1062 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1063 				/*
1064 				 * We're either not using flow control, or the
1065 				 * line discipline didn't tell us to block for
1066 				 * some reason.  Either way, we have no way to
1067 				 * know when there's more space available, so
1068 				 * just drop the rest of the data.
1069 				 */
1070 				get += cc << 1;
1071 				if (get >= end)
1072 					get -= scif_rbuf_size << 1;
1073 				cc = 0;
1074 			} else {
1075 				/*
1076 				 * Don't schedule any more receive processing
1077 				 * until the line discipline tells us there's
1078 				 * space available (through scifhwiflow()).
1079 				 * Leave the rest of the data in the input
1080 				 * buffer.
1081 				 */
1082 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1083 			}
1084 			break;
1085 		}
1086 		get += 2;
1087 		if (get >= end)
1088 			get = sc->sc_rbuf;
1089 		cc--;
1090 	}
1091 
1092 	if (cc != scc) {
1093 		sc->sc_rbget = get;
1094 		s = splserial();
1095 		cc = sc->sc_rbavail += scc - cc;
1096 		/* Buffers should be ok again, release possible block. */
1097 		if (cc >= sc->sc_r_lowat) {
1098 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1099 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1100 				scif_scr_write(scif_scr_read() | SCSCR2_RIE);
1101 			}
1102 #if 0
1103 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1104 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1105 				scif_hwiflow(sc);
1106 			}
1107 #endif
1108 		}
1109 		splx(s);
1110 	}
1111 }
1112 
1113 static void
1114 scif_txsoft(struct scif_softc *sc, struct tty *tp)
1115 {
1116 
1117 	CLR(tp->t_state, TS_BUSY);
1118 	if (ISSET(tp->t_state, TS_FLUSH))
1119 		CLR(tp->t_state, TS_FLUSH);
1120 	else
1121 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1122 	(*tp->t_linesw->l_start)(tp);
1123 }
1124 
1125 #if 0 /* XXX (msaitoh) */
1126 static void
1127 scif_stsoft(struct scif_softc *sc, struct tty *tp)
1128 {
1129 	u_char msr, delta;
1130 	int s;
1131 
1132 	s = splserial();
1133 	msr = sc->sc_msr;
1134 	delta = sc->sc_msr_delta;
1135 	sc->sc_msr_delta = 0;
1136 	splx(s);
1137 
1138 	if (ISSET(delta, sc->sc_msr_dcd)) {
1139 		/*
1140 		 * Inform the tty layer that carrier detect changed.
1141 		 */
1142 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1143 	}
1144 
1145 	if (ISSET(delta, sc->sc_msr_cts)) {
1146 		/* Block or unblock output according to flow control. */
1147 		if (ISSET(msr, sc->sc_msr_cts)) {
1148 			sc->sc_tx_stopped = 0;
1149 			(*tp->t_linesw->l_start)(tp);
1150 		} else {
1151 			sc->sc_tx_stopped = 1;
1152 		}
1153 	}
1154 
1155 #ifdef SCIF_DEBUG
1156 	if (scif_debug)
1157 		scifstatus(sc, "scif_stsoft");
1158 #endif
1159 }
1160 #endif /* 0 */
1161 
1162 static void
1163 scifsoft(void *arg)
1164 {
1165 	struct scif_softc *sc = arg;
1166 	struct tty *tp;
1167 
1168 	if (!device_is_active(sc->sc_dev))
1169 		return;
1170 
1171 	tp = sc->sc_tty;
1172 
1173 	if (sc->sc_rx_ready) {
1174 		sc->sc_rx_ready = 0;
1175 		scif_rxsoft(sc, tp);
1176 	}
1177 
1178 #if 0
1179 	if (sc->sc_st_check) {
1180 		sc->sc_st_check = 0;
1181 		scif_stsoft(sc, tp);
1182 	}
1183 #endif
1184 
1185 	if (sc->sc_tx_done) {
1186 		sc->sc_tx_done = 0;
1187 		scif_txsoft(sc, tp);
1188 	}
1189 }
1190 
1191 static int
1192 scifintr(void *arg)
1193 {
1194 	struct scif_softc *sc = arg;
1195 	u_char *put, *end;
1196 	u_int cc;
1197 	u_short ssr2;
1198 	int count;
1199 
1200 	if (!device_is_active(sc->sc_dev))
1201 		return (0);
1202 
1203 	end = sc->sc_ebuf;
1204 	put = sc->sc_rbput;
1205 	cc = sc->sc_rbavail;
1206 
1207 	do {
1208 		ssr2 = scif_ssr_read();
1209 		if (ISSET(ssr2, SCSSR2_BRK)) {
1210 			scif_ssr_write(scif_ssr_read()
1211 				& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
1212 #ifdef DDB
1213 			if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
1214 				console_debugger();
1215 			}
1216 #endif /* DDB */
1217 #ifdef KGDB
1218 			if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
1219 				kgdb_connect(1);
1220 			}
1221 #endif /* KGDB */
1222 		}
1223 		count = scif_fdr_read() & SCFDR2_RECVCNT;
1224 		if (count != 0) {
1225 			for (;;) {
1226 				u_char c = scif_frdr_read();
1227 				u_char err = (u_char)(scif_ssr_read() & 0x00ff);
1228 
1229 				scif_ssr_write(scif_ssr_read()
1230 				    & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
1231 #ifdef SH4
1232 				if (CPU_IS_SH4)
1233 					scif_lsr_write(scif_lsr_read()
1234 						       & ~SCLSR2_ORER);
1235 #endif
1236 				if ((cc > 0) && (count > 0)) {
1237 					put[0] = c;
1238 					put[1] = err;
1239 					put += 2;
1240 					if (put >= end)
1241 						put = sc->sc_rbuf;
1242 					cc--;
1243 					count--;
1244 				} else
1245 					break;
1246 			}
1247 
1248 			/*
1249 			 * Current string of incoming characters ended because
1250 			 * no more data was available or we ran out of space.
1251 			 * Schedule a receive event if any data was received.
1252 			 * If we're out of space, turn off receive interrupts.
1253 			 */
1254 			sc->sc_rbput = put;
1255 			sc->sc_rbavail = cc;
1256 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1257 				sc->sc_rx_ready = 1;
1258 
1259 			/*
1260 			 * See if we are in danger of overflowing a buffer. If
1261 			 * so, use hardware flow control to ease the pressure.
1262 			 */
1263 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1264 			    cc < sc->sc_r_hiwat) {
1265 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1266 #if 0
1267 				scif_hwiflow(sc);
1268 #endif
1269 			}
1270 
1271 			/*
1272 			 * If we're out of space, disable receive interrupts
1273 			 * until the queue has drained a bit.
1274 			 */
1275 			if (!cc) {
1276 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1277 				scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
1278 			}
1279 		} else {
1280 			if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
1281 				scif_scr_write(scif_scr_read()
1282 					       & ~(SCSCR2_TIE | SCSCR2_RIE));
1283 				delay(10);
1284 				scif_scr_write(scif_scr_read()
1285 					       | SCSCR2_TIE | SCSCR2_RIE);
1286 				continue;
1287 			}
1288 		}
1289 	} while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
1290 
1291 #if 0
1292 	msr = bus_space_read_1(iot, ioh, scif_msr);
1293 	delta = msr ^ sc->sc_msr;
1294 	sc->sc_msr = msr;
1295 	if (ISSET(delta, sc->sc_msr_mask)) {
1296 		SET(sc->sc_msr_delta, delta);
1297 
1298 		/*
1299 		 * Pulse-per-second clock signal on edge of DCD?
1300 		 */
1301 		if (ISSET(delta, sc->sc_ppsmask)) {
1302 			struct timeval tv;
1303 			if (ISSET(msr, sc->sc_ppsmask) ==
1304 			    sc->sc_ppsassert) {
1305 				/* XXX nanotime() */
1306 				microtime(&tv);
1307 				TIMEVAL_TO_TIMESPEC(&tv,
1308 						    &sc->ppsinfo.assert_timestamp);
1309 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1310 					timespecadd(&sc->ppsinfo.assert_timestamp,
1311 						    &sc->ppsparam.assert_offset,
1312 						    &sc->ppsinfo.assert_timestamp);
1313 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1314 				}
1315 
1316 #ifdef PPS_SYNC
1317 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1318 					hardpps(&tv, tv.tv_usec);
1319 #endif
1320 				sc->ppsinfo.assert_sequence++;
1321 				sc->ppsinfo.current_mode =
1322 					sc->ppsparam.mode;
1323 
1324 			} else if (ISSET(msr, sc->sc_ppsmask) ==
1325 				   sc->sc_ppsclear) {
1326 				/* XXX nanotime() */
1327 				microtime(&tv);
1328 				TIMEVAL_TO_TIMESPEC(&tv,
1329 						    &sc->ppsinfo.clear_timestamp);
1330 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1331 					timespecadd(&sc->ppsinfo.clear_timestamp,
1332 						    &sc->ppsparam.clear_offset,
1333 						    &sc->ppsinfo.clear_timestamp);
1334 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1335 				}
1336 
1337 #ifdef PPS_SYNC
1338 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1339 					hardpps(&tv, tv.tv_usec);
1340 #endif
1341 				sc->ppsinfo.clear_sequence++;
1342 				sc->ppsinfo.current_mode =
1343 					sc->ppsparam.mode;
1344 			}
1345 		}
1346 
1347 		/*
1348 		 * Stop output immediately if we lose the output
1349 		 * flow control signal or carrier detect.
1350 		 */
1351 		if (ISSET(~msr, sc->sc_msr_mask)) {
1352 			sc->sc_tbc = 0;
1353 			sc->sc_heldtbc = 0;
1354 #ifdef SCIF_DEBUG
1355 			if (scif_debug)
1356 				scifstatus(sc, "scifintr  ");
1357 #endif
1358 		}
1359 
1360 		sc->sc_st_check = 1;
1361 	}
1362 #endif
1363 
1364 	/*
1365 	 * Done handling any receive interrupts. See if data can be
1366 	 * transmitted as well. Schedule tx done event if no data left
1367 	 * and tty was marked busy.
1368 	 */
1369 	if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
1370 		/*
1371 		 * If we've delayed a parameter change, do it now, and restart
1372 		 * output.
1373 		 */
1374 		if (sc->sc_heldchange) {
1375 			sc->sc_heldchange = 0;
1376 			sc->sc_tbc = sc->sc_heldtbc;
1377 			sc->sc_heldtbc = 0;
1378 		}
1379 
1380 		/* Output the next chunk of the contiguous buffer, if any. */
1381 		if (sc->sc_tbc > 0) {
1382 			int n;
1383 			int maxchars;
1384 			int i;
1385 
1386 			n = sc->sc_tbc;
1387 			maxchars = sc->sc_fifolen -
1388 				((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
1389 			if (n > maxchars)
1390 				n = maxchars;
1391 
1392 			for (i = 0; i < n; i++) {
1393 				scif_putc(*(sc->sc_tba));
1394 				sc->sc_tba++;
1395 			}
1396 			sc->sc_tbc -= n;
1397 		} else {
1398 			/* Disable transmit completion interrupts if necessary. */
1399 #if 0
1400 			if (ISSET(sc->sc_ier, IER_ETXRDY))
1401 #endif
1402 				scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
1403 
1404 			if (sc->sc_tx_busy) {
1405 				sc->sc_tx_busy = 0;
1406 				sc->sc_tx_done = 1;
1407 			}
1408 		}
1409 	}
1410 
1411 	/* Wake up the poller. */
1412 	softint_schedule(sc->sc_si);
1413 
1414 #ifdef RND_SCIF
1415 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
1416 #endif
1417 
1418 	return (1);
1419 }
1420 
1421 void
1422 scifcnprobe(struct consdev *cp)
1423 {
1424 	int maj;
1425 
1426 	/* locate the major number */
1427 	maj = cdevsw_lookup_major(&scif_cdevsw);
1428 
1429 	/* Initialize required fields. */
1430 	cp->cn_dev = makedev(maj, 0);
1431 	if (scifconsole)
1432 		cp->cn_pri = CN_REMOTE;
1433 	else
1434 		cp->cn_pri = CN_NORMAL;
1435 }
1436 
1437 void
1438 scifcninit(struct consdev *cp)
1439 {
1440 
1441 	InitializeScif(scifcn_speed);
1442 	scifisconsole = 1;
1443 }
1444 
1445 int
1446 scifcngetc(dev_t dev)
1447 {
1448 	int c;
1449 	int s;
1450 
1451 	s = splserial();
1452 	c = scif_getc();
1453 	splx(s);
1454 
1455 	return (c);
1456 }
1457 
1458 void
1459 scifcnputc(dev_t dev, int c)
1460 {
1461 	int s;
1462 
1463 	s = splserial();
1464 	scif_putc((u_char)c);
1465 	splx(s);
1466 }
1467 
1468 #ifdef KGDB
1469 int
1470 scif_kgdb_init(void)
1471 {
1472 
1473 	if (strcmp(kgdb_devname, "scif") != 0)
1474 		return (1);
1475 
1476 	if (scifisconsole)
1477 		return (1);	/* can't share with console */
1478 
1479 	InitializeScif(kgdb_rate);
1480 
1481 	kgdb_attach((int (*)(void *))scifcngetc,
1482 	    (void (*)(void *, int))scifcnputc, NULL);
1483 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1484 	kgdb_attached = 1;
1485 
1486 	return (0);
1487 }
1488 #endif /* KGDB */
1489