xref: /netbsd-src/sys/arch/sh3/dev/scif.c (revision 8ac07aec990b9d2e483062509d0a9fa5b4f57cf2)
1 /*	$NetBSD: scif.c,v 1.56 2008/03/27 01:48:50 uwe Exp $ */
2 
3 /*-
4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 /*-
30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31  * All rights reserved.
32  *
33  * This code is derived from software contributed to The NetBSD Foundation
34  * by Charles M. Hannum.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *        This product includes software developed by the NetBSD
47  *        Foundation, Inc. and its contributors.
48  * 4. Neither the name of The NetBSD Foundation nor the names of its
49  *    contributors may be used to endorse or promote products derived
50  *    from this software without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62  * POSSIBILITY OF SUCH DAMAGE.
63  */
64 
65 /*
66  * Copyright (c) 1991 The Regents of the University of California.
67  * All rights reserved.
68  *
69  * Redistribution and use in source and binary forms, with or without
70  * modification, are permitted provided that the following conditions
71  * are met:
72  * 1. Redistributions of source code must retain the above copyright
73  *    notice, this list of conditions and the following disclaimer.
74  * 2. Redistributions in binary form must reproduce the above copyright
75  *    notice, this list of conditions and the following disclaimer in the
76  *    documentation and/or other materials provided with the distribution.
77  * 3. Neither the name of the University nor the names of its contributors
78  *    may be used to endorse or promote products derived from this software
79  *    without specific prior written permission.
80  *
81  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
82  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
83  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
84  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
85  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
86  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
87  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
88  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
89  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
90  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
91  * SUCH DAMAGE.
92  *
93  *	@(#)com.c	7.5 (Berkeley) 5/16/91
94  */
95 
96 /*
97  * SH internal serial driver
98  *
99  * This code is derived from both z8530tty.c and com.c
100  */
101 
102 #include <sys/cdefs.h>
103 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.56 2008/03/27 01:48:50 uwe Exp $");
104 
105 #include "opt_kgdb.h"
106 #include "opt_scif.h"
107 
108 #include <sys/param.h>
109 #include <sys/systm.h>
110 #include <sys/tty.h>
111 #include <sys/proc.h>
112 #include <sys/conf.h>
113 #include <sys/file.h>
114 #include <sys/syslog.h>
115 #include <sys/kernel.h>
116 #include <sys/device.h>
117 #include <sys/malloc.h>
118 #include <sys/kgdb.h>
119 #include <sys/kauth.h>
120 #include <sys/intr.h>
121 
122 #include <dev/cons.h>
123 
124 #include <sh3/clock.h>
125 #include <sh3/exception.h>
126 #include <sh3/scifreg.h>
127 
128 #include <sh3/dev/scifvar.h>
129 
130 #include "locators.h"
131 
132 
133 struct scif_softc {
134 	device_t sc_dev;
135 
136 	struct tty *sc_tty;
137 	void *sc_si;
138 
139 	callout_t sc_diag_ch;
140 
141 #if 0
142 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
143 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
144 
145 	int sc_drq;
146 
147 	int sc_frequency;
148 #endif
149 
150 	u_int sc_overflows,
151 	      sc_floods,
152 	      sc_errors;		/* number of retries so far */
153 	u_char sc_status[7];		/* copy of registers */
154 
155 	int sc_hwflags;
156 	int sc_swflags;
157 	u_int sc_fifolen;
158 
159 	u_int sc_r_hiwat,
160 	      sc_r_lowat;
161 	u_char *volatile sc_rbget,
162 	       *volatile sc_rbput;
163  	volatile u_int sc_rbavail;
164 	u_char *sc_rbuf,
165 	       *sc_ebuf;
166 
167  	u_char *sc_tba;			/* transmit buffer address */
168  	u_int sc_tbc,			/* transmit byte count */
169 	      sc_heldtbc;
170 
171 	volatile u_char sc_rx_flags,
172 #define	RX_TTY_BLOCKED		0x01
173 #define	RX_TTY_OVERFLOWED	0x02
174 #define	RX_IBUF_BLOCKED		0x04
175 #define	RX_IBUF_OVERFLOWED	0x08
176 #define	RX_ANY_BLOCK		0x0f
177 			sc_tx_busy,	/* working on an output chunk */
178 			sc_tx_done,	/* done with one output chunk */
179 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
180 			sc_st_check,	/* got a status interrupt */
181 			sc_rx_ready;
182 
183 	volatile u_char sc_heldchange;
184 };
185 
186 
187 static int scif_match(device_t, cfdata_t, void *);
188 static void scif_attach(device_t, device_t, void *);
189 
190 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc),
191     scif_match, scif_attach, NULL, NULL);
192 
193 static int scif_attached = 0;	/* XXX: FIXME: don't limit to just one! */
194 
195 extern struct cfdriver scif_cd;
196 
197 #define	SCIFUNIT_MASK		0x7ffff
198 #define	SCIFDIALOUT_MASK	0x80000
199 
200 #define	SCIFUNIT(x)	(minor(x) & SCIFUNIT_MASK)
201 #define	SCIFDIALOUT(x)	(minor(x) & SCIFDIALOUT_MASK)
202 
203 
204 /* console */
205 dev_type_cnprobe(scifcnprobe);
206 dev_type_cninit(scifcninit);
207 dev_type_cngetc(scifcngetc);
208 dev_type_cnputc(scifcnputc);
209 
210 
211 /* cdevsw */
212 dev_type_open(scifopen);
213 dev_type_close(scifclose);
214 dev_type_read(scifread);
215 dev_type_write(scifwrite);
216 dev_type_ioctl(scifioctl);
217 dev_type_stop(scifstop);
218 dev_type_tty(sciftty);
219 dev_type_poll(scifpoll);
220 
221 const struct cdevsw scif_cdevsw = {
222 	scifopen, scifclose, scifread, scifwrite, scifioctl,
223 	scifstop, sciftty, scifpoll, nommap, ttykqfilter, D_TTY
224 };
225 
226 
227 /* struct tty */
228 static void scifstart(struct tty *);
229 static int scifparam(struct tty *, struct termios *);
230 
231 
232 void InitializeScif (unsigned int);
233 int ScifErrCheck(void);
234 void scif_putc(unsigned char);
235 unsigned char scif_getc(void);
236 
237 static int scifintr(void *);
238 static void scifsoft(void *);
239 static void scif_rxsoft(struct scif_softc *, struct tty *);
240 static void scif_txsoft(struct scif_softc *, struct tty *);
241 #if 0
242 static void scif_stsoft(struct scif_softc *, struct tty *);
243 #endif
244 static void scif_schedrx(struct scif_softc *);
245 static void scifdiag(void *);
246 
247 static void scif_break(struct scif_softc *, int);
248 static void scif_iflush(struct scif_softc *);
249 
250 
251 /* Hardware flag masks (sc_hwflags) */
252 #define	SCIF_HW_NOIEN	0x01
253 #define	SCIF_HW_FIFO	0x02
254 #define	SCIF_HW_FLOW	0x08
255 #define	SCIF_HW_DEV_OK	0x20
256 #define	SCIF_HW_CONSOLE	0x40
257 #define	SCIF_HW_KGDB	0x80
258 
259 
260 /* Buffer size for character buffer */
261 #define	SCIF_RING_SIZE	2048
262 static unsigned int scif_rbuf_size = SCIF_RING_SIZE;
263 
264 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
265 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
266 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
267 
268 
269 #ifdef SCIFCN_SPEED
270 unsigned int scifcn_speed = SCIFCN_SPEED;
271 #else
272 unsigned int scifcn_speed = 9600;
273 #endif
274 
275 #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
276 int scifconscflag = CONMODE;
277 
278 static int scifisconsole = 0;
279 
280 #ifdef KGDB
281 static int kgdb_attached = 0;
282 #endif
283 
284 
285 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
286 
287 
288 /* XXX: uwe
289  * Prepare for bus_spacification.  The difference in access widths is
290  * still handled by the magic definitions in scifreg.h
291  */
292 #define scif_smr_read()		SHREG_SCSMR2
293 #define scif_smr_write(v)	(SHREG_SCSMR2 = (v))
294 
295 #define scif_brr_read()		SHREG_SCBRR2
296 #define scif_brr_write(v)	(SHREG_SCBRR2 = (v))
297 
298 #define scif_scr_read()		SHREG_SCSCR2
299 #define scif_scr_write(v)	(SHREG_SCSCR2 = (v))
300 
301 #define scif_ftdr_write(v)	(SHREG_SCFTDR2 = (v))
302 
303 #define scif_ssr_read()		SHREG_SCSSR2
304 #define scif_ssr_write(v)	(SHREG_SCSSR2 = (v))
305 
306 #define scif_frdr_read()	SHREG_SCFRDR2
307 
308 #define scif_fcr_read()		SHREG_SCFCR2
309 #define scif_fcr_write(v)	(SHREG_SCFCR2 = (v))
310 
311 #define scif_fdr_read()		SHREG_SCFDR2
312 
313 #ifdef SH4 /* additional registers in sh4 */
314 
315 #define scif_sptr_read()	SHREG_SCSPTR2
316 #define scif_sptr_write(v)	(SHREG_SCSPTR2 = (v))
317 
318 #define scif_lsr_read()		SHREG_SCLSR2
319 #define scif_lsr_write(v)	(SHREG_SCLSR2 = (v))
320 
321 #endif /* SH4 */
322 
323 
324 void
325 InitializeScif(unsigned int bps)
326 {
327 
328 	/* Initialize SCR */
329 	scif_scr_write(0x00);
330 
331 #if 0
332 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
333 #else
334 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
335 #endif
336 	/* Serial Mode Register */
337 	scif_smr_write(0x00);	/* 8bit,NonParity,Even,1Stop */
338 
339 	/* Bit Rate Register */
340 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
341 
342 	/*
343 	 * wait 2m Sec, because Send/Recv must begin 1 bit period after
344 	 * BRR is set.
345 	 */
346 	delay(2000);
347 
348 #if 0
349 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
350 #else
351 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
352 #endif
353 
354 	/* Send permission, Receive permission ON */
355 	scif_scr_write(SCSCR2_TE | SCSCR2_RE);
356 
357 	/* Serial Status Register */
358 	scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
359 }
360 
361 int
362 ScifErrCheck(void)
363 {
364 
365 	return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
366 }
367 
368 void
369 scif_putc(unsigned char c)
370 {
371 
372 	/* wait for ready */
373 	while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
374 		continue;
375 
376 	/* write send data to send register */
377 	scif_ftdr_write(c);
378 
379 	/* clear ready flag */
380 	scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
381 }
382 
383 unsigned char
384 scif_getc(void)
385 {
386 	unsigned char c, err_c;
387 #ifdef SH4
388 	unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
389 #endif
390 
391 	for (;;) {
392 		/* wait for ready */
393 		while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
394 			continue;
395 
396 		c = scif_frdr_read();
397 		err_c = scif_ssr_read();
398 		scif_ssr_write(scif_ssr_read()
399 			& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
400 #ifdef SH4
401 		if (CPU_IS_SH4) {
402 			err_c2 = scif_lsr_read();
403 			scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
404 		}
405 #endif
406 		if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
407 		    | SCSSR2_PER)) == 0)
408 		{
409 #ifdef SH4
410 			if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
411 #endif
412 			return(c);
413 		}
414 	}
415 
416 }
417 
418 static int
419 scif_match(device_t parent, cfdata_t cfp, void *aux)
420 {
421 
422 	if (scif_attached)
423 		return 0;
424 
425 	if (strcmp(cfp->cf_name, "scif") != 0)
426 		return 0;
427 
428 	return 1;
429 }
430 
431 static void
432 scif_attach(device_t parent, device_t self, void *aux)
433 {
434 	struct scif_softc *sc;
435 	struct tty *tp;
436 
437 	sc = device_private(self);
438 	sc->sc_dev = self;
439 
440 	scif_attached = 1;
441 
442 	sc->sc_hwflags = 0;	/* XXX */
443 	sc->sc_swflags = 0;	/* XXX */
444 	sc->sc_fifolen = 16;
445 
446 	aprint_normal("\n");
447 	if (scifisconsole) {
448 		aprint_naive(" (console)\n");
449 		aprint_normal_dev(self, "console\n");
450 		SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
451 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
452 	}
453 #ifdef KGDB
454 	else if (kgdb_attached) {
455 		aprint_naive(" (kgdb)\n");
456 		aprint_normal_dev(self, "kgdb\n");
457 		SET(sc->sc_hwflags, SCIF_HW_KGDB);
458 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
459 	}
460 #endif
461 	else {
462 		aprint_naive("\n");
463 		InitializeScif(9600); /* XXX */
464 	}
465 
466 	callout_init(&sc->sc_diag_ch, 0);
467 #ifdef SH4
468 	intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
469 	    scifintr, sc);
470 	intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
471 	    scifintr, sc);
472 	intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
473 	    scifintr, sc);
474 	intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
475 	    scifintr, sc);
476 #else
477 	intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
478 	    scifintr, sc);
479 	intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
480 	    scifintr, sc);
481 	intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
482 	    scifintr, sc);
483 	intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
484 	    scifintr, sc);
485 #endif
486 
487 	sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc);
488 	SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
489 
490 	tp = ttymalloc();
491 	tp->t_oproc = scifstart;
492 	tp->t_param = scifparam;
493 	tp->t_hwiflow = NULL;
494 
495 	sc->sc_tty = tp;
496 	sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
497 	if (sc->sc_rbuf == NULL) {
498 		aprint_error_dev(self, "unable to allocate ring buffer\n");
499 		return;
500 	}
501 	sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
502 
503 	tty_attach(tp);
504 }
505 
506 /*
507  * Start or restart transmission.
508  */
509 static void
510 scifstart(struct tty *tp)
511 {
512 	struct scif_softc *sc;
513 	int s;
514 
515 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
516 
517 	s = spltty();
518 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
519 		goto out;
520 	if (sc->sc_tx_stopped)
521 		goto out;
522 	if (!ttypull(tp))
523 		goto out;
524 
525 	/* Grab the first contiguous region of buffer space. */
526 	{
527 		u_char *tba;
528 		int tbc;
529 
530 		tba = tp->t_outq.c_cf;
531 		tbc = ndqb(&tp->t_outq, 0);
532 
533 		(void)splserial();
534 
535 		sc->sc_tba = tba;
536 		sc->sc_tbc = tbc;
537 	}
538 
539 	SET(tp->t_state, TS_BUSY);
540 	sc->sc_tx_busy = 1;
541 
542 	/* Enable transmit completion interrupts if necessary. */
543 	scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
544 
545 	/* Output the first chunk of the contiguous buffer. */
546 	{
547 		int n;
548 		int maxchars;
549 		int i;
550 
551 		n = sc->sc_tbc;
552 		maxchars = sc->sc_fifolen
553 			- ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
554 		if (n > maxchars)
555 			n = maxchars;
556 
557 		for (i = 0; i < n; i++) {
558 			scif_putc(*(sc->sc_tba));
559 			sc->sc_tba++;
560 		}
561 		sc->sc_tbc -= n;
562 	}
563 out:
564 	splx(s);
565 	return;
566 }
567 
568 /*
569  * Set SCIF tty parameters from termios.
570  * XXX - Should just copy the whole termios after
571  * making sure all the changes could be done.
572  */
573 static int
574 scifparam(struct tty *tp, struct termios *t)
575 {
576 	struct scif_softc *sc;
577 	int ospeed = t->c_ospeed;
578 	int s;
579 
580 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
581 	if (!device_is_active(sc->sc_dev))
582 		return (EIO);
583 
584 	/* Check requested parameters. */
585 	if (ospeed < 0)
586 		return (EINVAL);
587 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
588 		return (EINVAL);
589 
590 	/*
591 	 * For the console, always force CLOCAL and !HUPCL, so that the port
592 	 * is always active.
593 	 */
594 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
595 	    ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
596 		SET(t->c_cflag, CLOCAL);
597 		CLR(t->c_cflag, HUPCL);
598 	}
599 
600 	/*
601 	 * If there were no changes, don't do anything.  This avoids dropping
602 	 * input and improves performance when all we did was frob things like
603 	 * VMIN and VTIME.
604 	 */
605 	if (tp->t_ospeed == t->c_ospeed &&
606 	    tp->t_cflag == t->c_cflag)
607 		return (0);
608 
609 #if 0
610 /* XXX (msaitoh) */
611 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
612 #endif
613 
614 	s = splserial();
615 
616 	/*
617 	 * Set the flow control pins depending on the current flow control
618 	 * mode.
619 	 */
620 	if (ISSET(t->c_cflag, CRTSCTS)) {
621 		scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
622 	} else {
623 		scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
624 	}
625 
626 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
627 
628 	/*
629 	 * Set the FIFO threshold based on the receive speed.
630 	 *
631 	 *  * If it's a low speed, it's probably a mouse or some other
632 	 *    interactive device, so set the threshold low.
633 	 *  * If it's a high speed, trim the trigger level down to prevent
634 	 *    overflows.
635 	 *  * Otherwise set it a bit higher.
636 	 */
637 #if 0
638 /* XXX (msaitoh) */
639 	if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
640 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
641 	else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
642 		sc->sc_fifo = FIFO_ENABLE |
643 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
644 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
645 	else
646 		sc->sc_fifo = 0;
647 #endif
648 
649 	/* And copy to tty. */
650 	tp->t_ispeed = 0;
651 	tp->t_ospeed = t->c_ospeed;
652 	tp->t_cflag = t->c_cflag;
653 
654 	if (!sc->sc_heldchange) {
655 		if (sc->sc_tx_busy) {
656 			sc->sc_heldtbc = sc->sc_tbc;
657 			sc->sc_tbc = 0;
658 			sc->sc_heldchange = 1;
659 		}
660 #if 0
661 /* XXX (msaitoh) */
662 		else
663 			scif_loadchannelregs(sc);
664 #endif
665 	}
666 
667 	if (!ISSET(t->c_cflag, CHWFLOW)) {
668 		/* Disable the high water mark. */
669 		sc->sc_r_hiwat = 0;
670 		sc->sc_r_lowat = 0;
671 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
672 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
673 			scif_schedrx(sc);
674 		}
675 	} else {
676 		sc->sc_r_hiwat = scif_rbuf_hiwat;
677 		sc->sc_r_lowat = scif_rbuf_lowat;
678 	}
679 
680 	splx(s);
681 
682 #ifdef SCIF_DEBUG
683 	if (scif_debug)
684 		scifstatus(sc, "scifparam ");
685 #endif
686 
687 	if (!ISSET(t->c_cflag, CHWFLOW)) {
688 		if (sc->sc_tx_stopped) {
689 			sc->sc_tx_stopped = 0;
690 			scifstart(tp);
691 		}
692 	}
693 
694 	return (0);
695 }
696 
697 static void
698 scif_iflush(struct scif_softc *sc)
699 {
700 	int i;
701 	unsigned char c;
702 
703 	i = scif_fdr_read() & SCFDR2_RECVCNT;
704 
705 	while (i > 0) {
706 		c = scif_frdr_read();
707 		scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
708 		i--;
709 	}
710 }
711 
712 int
713 scifopen(dev_t dev, int flag, int mode, struct lwp *l)
714 {
715 	struct scif_softc *sc;
716 	struct tty *tp;
717 	int s, s2;
718 	int error;
719 
720 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
721 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
722 	    sc->sc_rbuf == NULL)
723 		return (ENXIO);
724 
725 	if (!device_is_active(sc->sc_dev))
726 		return (ENXIO);
727 
728 #ifdef KGDB
729 	/*
730 	 * If this is the kgdb port, no other use is permitted.
731 	 */
732 	if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
733 		return (EBUSY);
734 #endif /* KGDB */
735 
736 	tp = sc->sc_tty;
737 
738 	if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
739 		return (EBUSY);
740 
741 	s = spltty();
742 
743 	/*
744 	 * Do the following iff this is a first open.
745 	 */
746 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
747 		struct termios t;
748 
749 		tp->t_dev = dev;
750 
751 		s2 = splserial();
752 
753 		/* Turn on interrupts. */
754 		scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
755 
756 		splx(s2);
757 
758 		/*
759 		 * Initialize the termios status to the defaults.  Add in the
760 		 * sticky bits from TIOCSFLAGS.
761 		 */
762 		t.c_ispeed = 0;
763 		if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
764 			t.c_ospeed = scifcn_speed;	/* XXX (msaitoh) */
765 			t.c_cflag = scifconscflag;
766 		} else {
767 			t.c_ospeed = TTYDEF_SPEED;
768 			t.c_cflag = TTYDEF_CFLAG;
769 		}
770 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
771 			SET(t.c_cflag, CLOCAL);
772 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
773 			SET(t.c_cflag, CRTSCTS);
774 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
775 			SET(t.c_cflag, MDMBUF);
776 		/* Make sure scifparam() will do something. */
777 		tp->t_ospeed = 0;
778 		(void) scifparam(tp, &t);
779 		tp->t_iflag = TTYDEF_IFLAG;
780 		tp->t_oflag = TTYDEF_OFLAG;
781 		tp->t_lflag = TTYDEF_LFLAG;
782 		ttychars(tp);
783 		ttsetwater(tp);
784 
785 		s2 = splserial();
786 
787 		/* Clear the input ring, and unblock. */
788 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
789 		sc->sc_rbavail = scif_rbuf_size;
790 		scif_iflush(sc);
791 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
792 #if 0
793 /* XXX (msaitoh) */
794 		scif_hwiflow(sc);
795 #endif
796 
797 #ifdef SCIF_DEBUG
798 		if (scif_debug)
799 			scifstatus(sc, "scifopen  ");
800 #endif
801 
802 		splx(s2);
803 	}
804 
805 	splx(s);
806 
807 	error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
808 	if (error)
809 		goto bad;
810 
811 	error = (*tp->t_linesw->l_open)(dev, tp);
812 	if (error)
813 		goto bad;
814 
815 	return (0);
816 
817 bad:
818 
819 	return (error);
820 }
821 
822 int
823 scifclose(dev_t dev, int flag, int mode, struct lwp *l)
824 {
825 	struct scif_softc *sc;
826 	struct tty *tp;
827 
828 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
829 	tp = sc->sc_tty;
830 
831 	/* XXX This is for cons.c. */
832 	if (!ISSET(tp->t_state, TS_ISOPEN))
833 		return (0);
834 
835 	(*tp->t_linesw->l_close)(tp, flag);
836 	ttyclose(tp);
837 
838 	if (!device_is_active(sc->sc_dev))
839 		return (0);
840 
841 	return (0);
842 }
843 
844 int
845 scifread(dev_t dev, struct uio *uio, int flag)
846 {
847 	struct scif_softc *sc;
848 	struct tty *tp;
849 
850 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
851 	tp = sc->sc_tty;
852 
853 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
854 }
855 
856 int
857 scifwrite(dev_t dev, struct uio *uio, int flag)
858 {
859 	struct scif_softc *sc;
860 	struct tty *tp;
861 
862 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
863 	tp = sc->sc_tty;
864 
865 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
866 }
867 
868 int
869 scifpoll(dev_t dev, int events, struct lwp *l)
870 {
871 	struct scif_softc *sc;
872 	struct tty *tp;
873 
874 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
875 	tp = sc->sc_tty;
876 
877 	return ((*tp->t_linesw->l_poll)(tp, events, l));
878 }
879 
880 struct tty *
881 sciftty(dev_t dev)
882 {
883 	struct scif_softc *sc;
884 	struct tty *tp;
885 
886 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
887 	tp = sc->sc_tty;
888 
889 	return (tp);
890 }
891 
892 int
893 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
894 {
895 	struct scif_softc *sc;
896 	struct tty *tp;
897 	int error;
898 	int s;
899 
900 	sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
901 	if (!device_is_active(sc->sc_dev))
902 		return (EIO);
903 
904 	tp = sc->sc_tty;
905 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
906 	if (error != EPASSTHROUGH)
907 		return (error);
908 
909 	error = ttioctl(tp, cmd, data, flag, l);
910 	if (error != EPASSTHROUGH)
911 		return (error);
912 
913 	error = 0;
914 
915 	s = splserial();
916 
917 	switch (cmd) {
918 	case TIOCSBRK:
919 		scif_break(sc, 1);
920 		break;
921 
922 	case TIOCCBRK:
923 		scif_break(sc, 0);
924 		break;
925 
926 	case TIOCGFLAGS:
927 		*(int *)data = sc->sc_swflags;
928 		break;
929 
930 	case TIOCSFLAGS:
931 		error = kauth_authorize_device_tty(l->l_cred,
932 		    KAUTH_DEVICE_TTY_PRIVSET, tp);
933 		if (error)
934 			break;
935 		sc->sc_swflags = *(int *)data;
936 		break;
937 
938 	default:
939 		error = EPASSTHROUGH;
940 		break;
941 	}
942 
943 	splx(s);
944 
945 	return (error);
946 }
947 
948 static void
949 scif_schedrx(struct scif_softc *sc)
950 {
951 
952 	sc->sc_rx_ready = 1;
953 
954 	/* Wake up the poller. */
955 	softint_schedule(sc->sc_si);
956 }
957 
958 static void
959 scif_break(struct scif_softc *sc, int onoff)
960 {
961 
962 	if (onoff)
963 		scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
964 	else
965 		scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
966 
967 #if 0	/* XXX */
968 	if (!sc->sc_heldchange) {
969 		if (sc->sc_tx_busy) {
970 			sc->sc_heldtbc = sc->sc_tbc;
971 			sc->sc_tbc = 0;
972 			sc->sc_heldchange = 1;
973 		} else
974 			scif_loadchannelregs(sc);
975 	}
976 #endif
977 }
978 
979 /*
980  * Stop output, e.g., for ^S or output flush.
981  */
982 void
983 scifstop(struct tty *tp, int flag)
984 {
985 	struct scif_softc *sc;
986 	int s;
987 
988 	sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
989 
990 	s = splserial();
991 	if (ISSET(tp->t_state, TS_BUSY)) {
992 		/* Stop transmitting at the next chunk. */
993 		sc->sc_tbc = 0;
994 		sc->sc_heldtbc = 0;
995 		if (!ISSET(tp->t_state, TS_TTSTOP))
996 			SET(tp->t_state, TS_FLUSH);
997 	}
998 	splx(s);
999 }
1000 
1001 static void
1002 scifdiag(void *arg)
1003 {
1004 	struct scif_softc *sc = arg;
1005 	int overflows, floods;
1006 	int s;
1007 
1008 	s = splserial();
1009 	overflows = sc->sc_overflows;
1010 	sc->sc_overflows = 0;
1011 	floods = sc->sc_floods;
1012 	sc->sc_floods = 0;
1013 	sc->sc_errors = 0;
1014 	splx(s);
1015 
1016 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1017 	    device_xname(sc->sc_dev),
1018 	    overflows, overflows == 1 ? "" : "s",
1019 	    floods, floods == 1 ? "" : "s");
1020 }
1021 
1022 static void
1023 scif_rxsoft(struct scif_softc *sc, struct tty *tp)
1024 {
1025 	int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1026 	u_char *get, *end;
1027 	u_int cc, scc;
1028 	u_char ssr2;
1029 	int code;
1030 	int s;
1031 
1032 	end = sc->sc_ebuf;
1033 	get = sc->sc_rbget;
1034 	scc = cc = scif_rbuf_size - sc->sc_rbavail;
1035 
1036 	if (cc == scif_rbuf_size) {
1037 		sc->sc_floods++;
1038 		if (sc->sc_errors++ == 0)
1039 			callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
1040 	}
1041 
1042 	while (cc) {
1043 		code = get[0];
1044 		ssr2 = get[1];
1045 		if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
1046 			if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
1047 				SET(code, TTY_FE);
1048 			if (ISSET(ssr2, SCSSR2_PER))
1049 				SET(code, TTY_PE);
1050 		}
1051 		if ((*rint)(code, tp) == -1) {
1052 			/*
1053 			 * The line discipline's buffer is out of space.
1054 			 */
1055 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1056 				/*
1057 				 * We're either not using flow control, or the
1058 				 * line discipline didn't tell us to block for
1059 				 * some reason.  Either way, we have no way to
1060 				 * know when there's more space available, so
1061 				 * just drop the rest of the data.
1062 				 */
1063 				get += cc << 1;
1064 				if (get >= end)
1065 					get -= scif_rbuf_size << 1;
1066 				cc = 0;
1067 			} else {
1068 				/*
1069 				 * Don't schedule any more receive processing
1070 				 * until the line discipline tells us there's
1071 				 * space available (through scifhwiflow()).
1072 				 * Leave the rest of the data in the input
1073 				 * buffer.
1074 				 */
1075 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1076 			}
1077 			break;
1078 		}
1079 		get += 2;
1080 		if (get >= end)
1081 			get = sc->sc_rbuf;
1082 		cc--;
1083 	}
1084 
1085 	if (cc != scc) {
1086 		sc->sc_rbget = get;
1087 		s = splserial();
1088 		cc = sc->sc_rbavail += scc - cc;
1089 		/* Buffers should be ok again, release possible block. */
1090 		if (cc >= sc->sc_r_lowat) {
1091 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1092 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1093 				scif_scr_write(scif_scr_read() | SCSCR2_RIE);
1094 			}
1095 #if 0
1096 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1097 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1098 				scif_hwiflow(sc);
1099 			}
1100 #endif
1101 		}
1102 		splx(s);
1103 	}
1104 }
1105 
1106 static void
1107 scif_txsoft(struct scif_softc *sc, struct tty *tp)
1108 {
1109 
1110 	CLR(tp->t_state, TS_BUSY);
1111 	if (ISSET(tp->t_state, TS_FLUSH))
1112 		CLR(tp->t_state, TS_FLUSH);
1113 	else
1114 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1115 	(*tp->t_linesw->l_start)(tp);
1116 }
1117 
1118 #if 0 /* XXX (msaitoh) */
1119 static void
1120 scif_stsoft(struct scif_softc *sc, struct tty *tp)
1121 {
1122 	u_char msr, delta;
1123 	int s;
1124 
1125 	s = splserial();
1126 	msr = sc->sc_msr;
1127 	delta = sc->sc_msr_delta;
1128 	sc->sc_msr_delta = 0;
1129 	splx(s);
1130 
1131 	if (ISSET(delta, sc->sc_msr_dcd)) {
1132 		/*
1133 		 * Inform the tty layer that carrier detect changed.
1134 		 */
1135 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1136 	}
1137 
1138 	if (ISSET(delta, sc->sc_msr_cts)) {
1139 		/* Block or unblock output according to flow control. */
1140 		if (ISSET(msr, sc->sc_msr_cts)) {
1141 			sc->sc_tx_stopped = 0;
1142 			(*tp->t_linesw->l_start)(tp);
1143 		} else {
1144 			sc->sc_tx_stopped = 1;
1145 		}
1146 	}
1147 
1148 #ifdef SCIF_DEBUG
1149 	if (scif_debug)
1150 		scifstatus(sc, "scif_stsoft");
1151 #endif
1152 }
1153 #endif /* 0 */
1154 
1155 static void
1156 scifsoft(void *arg)
1157 {
1158 	struct scif_softc *sc = arg;
1159 	struct tty *tp;
1160 
1161 	if (!device_is_active(sc->sc_dev))
1162 		return;
1163 
1164 	tp = sc->sc_tty;
1165 
1166 	if (sc->sc_rx_ready) {
1167 		sc->sc_rx_ready = 0;
1168 		scif_rxsoft(sc, tp);
1169 	}
1170 
1171 #if 0
1172 	if (sc->sc_st_check) {
1173 		sc->sc_st_check = 0;
1174 		scif_stsoft(sc, tp);
1175 	}
1176 #endif
1177 
1178 	if (sc->sc_tx_done) {
1179 		sc->sc_tx_done = 0;
1180 		scif_txsoft(sc, tp);
1181 	}
1182 }
1183 
1184 static int
1185 scifintr(void *arg)
1186 {
1187 	struct scif_softc *sc = arg;
1188 	u_char *put, *end;
1189 	u_int cc;
1190 	u_short ssr2;
1191 	int count;
1192 
1193 	if (!device_is_active(sc->sc_dev))
1194 		return (0);
1195 
1196 	end = sc->sc_ebuf;
1197 	put = sc->sc_rbput;
1198 	cc = sc->sc_rbavail;
1199 
1200 	do {
1201 		ssr2 = scif_ssr_read();
1202 		if (ISSET(ssr2, SCSSR2_BRK)) {
1203 			scif_ssr_write(scif_ssr_read()
1204 				& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
1205 #ifdef DDB
1206 			if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
1207 				console_debugger();
1208 			}
1209 #endif /* DDB */
1210 #ifdef KGDB
1211 			if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
1212 				kgdb_connect(1);
1213 			}
1214 #endif /* KGDB */
1215 		}
1216 		count = scif_fdr_read() & SCFDR2_RECVCNT;
1217 		if (count != 0) {
1218 			for (;;) {
1219 				u_char c = scif_frdr_read();
1220 				u_char err = (u_char)(scif_ssr_read() & 0x00ff);
1221 
1222 				scif_ssr_write(scif_ssr_read()
1223 				    & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
1224 #ifdef SH4
1225 				if (CPU_IS_SH4)
1226 					scif_lsr_write(scif_lsr_read()
1227 						       & ~SCLSR2_ORER);
1228 #endif
1229 				if ((cc > 0) && (count > 0)) {
1230 					put[0] = c;
1231 					put[1] = err;
1232 					put += 2;
1233 					if (put >= end)
1234 						put = sc->sc_rbuf;
1235 					cc--;
1236 					count--;
1237 				} else
1238 					break;
1239 			}
1240 
1241 			/*
1242 			 * Current string of incoming characters ended because
1243 			 * no more data was available or we ran out of space.
1244 			 * Schedule a receive event if any data was received.
1245 			 * If we're out of space, turn off receive interrupts.
1246 			 */
1247 			sc->sc_rbput = put;
1248 			sc->sc_rbavail = cc;
1249 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1250 				sc->sc_rx_ready = 1;
1251 
1252 			/*
1253 			 * See if we are in danger of overflowing a buffer. If
1254 			 * so, use hardware flow control to ease the pressure.
1255 			 */
1256 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1257 			    cc < sc->sc_r_hiwat) {
1258 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1259 #if 0
1260 				scif_hwiflow(sc);
1261 #endif
1262 			}
1263 
1264 			/*
1265 			 * If we're out of space, disable receive interrupts
1266 			 * until the queue has drained a bit.
1267 			 */
1268 			if (!cc) {
1269 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1270 				scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
1271 			}
1272 		} else {
1273 			if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
1274 				scif_scr_write(scif_scr_read()
1275 					       & ~(SCSCR2_TIE | SCSCR2_RIE));
1276 				delay(10);
1277 				scif_scr_write(scif_scr_read()
1278 					       | SCSCR2_TIE | SCSCR2_RIE);
1279 				continue;
1280 			}
1281 		}
1282 	} while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
1283 
1284 #if 0
1285 	msr = bus_space_read_1(iot, ioh, scif_msr);
1286 	delta = msr ^ sc->sc_msr;
1287 	sc->sc_msr = msr;
1288 	if (ISSET(delta, sc->sc_msr_mask)) {
1289 		SET(sc->sc_msr_delta, delta);
1290 
1291 		/*
1292 		 * Pulse-per-second clock signal on edge of DCD?
1293 		 */
1294 		if (ISSET(delta, sc->sc_ppsmask)) {
1295 			struct timeval tv;
1296 			if (ISSET(msr, sc->sc_ppsmask) ==
1297 			    sc->sc_ppsassert) {
1298 				/* XXX nanotime() */
1299 				microtime(&tv);
1300 				TIMEVAL_TO_TIMESPEC(&tv,
1301 						    &sc->ppsinfo.assert_timestamp);
1302 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1303 					timespecadd(&sc->ppsinfo.assert_timestamp,
1304 						    &sc->ppsparam.assert_offset,
1305 						    &sc->ppsinfo.assert_timestamp);
1306 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1307 				}
1308 
1309 #ifdef PPS_SYNC
1310 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1311 					hardpps(&tv, tv.tv_usec);
1312 #endif
1313 				sc->ppsinfo.assert_sequence++;
1314 				sc->ppsinfo.current_mode =
1315 					sc->ppsparam.mode;
1316 
1317 			} else if (ISSET(msr, sc->sc_ppsmask) ==
1318 				   sc->sc_ppsclear) {
1319 				/* XXX nanotime() */
1320 				microtime(&tv);
1321 				TIMEVAL_TO_TIMESPEC(&tv,
1322 						    &sc->ppsinfo.clear_timestamp);
1323 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1324 					timespecadd(&sc->ppsinfo.clear_timestamp,
1325 						    &sc->ppsparam.clear_offset,
1326 						    &sc->ppsinfo.clear_timestamp);
1327 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1328 				}
1329 
1330 #ifdef PPS_SYNC
1331 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1332 					hardpps(&tv, tv.tv_usec);
1333 #endif
1334 				sc->ppsinfo.clear_sequence++;
1335 				sc->ppsinfo.current_mode =
1336 					sc->ppsparam.mode;
1337 			}
1338 		}
1339 
1340 		/*
1341 		 * Stop output immediately if we lose the output
1342 		 * flow control signal or carrier detect.
1343 		 */
1344 		if (ISSET(~msr, sc->sc_msr_mask)) {
1345 			sc->sc_tbc = 0;
1346 			sc->sc_heldtbc = 0;
1347 #ifdef SCIF_DEBUG
1348 			if (scif_debug)
1349 				scifstatus(sc, "scifintr  ");
1350 #endif
1351 		}
1352 
1353 		sc->sc_st_check = 1;
1354 	}
1355 #endif
1356 
1357 	/*
1358 	 * Done handling any receive interrupts. See if data can be
1359 	 * transmitted as well. Schedule tx done event if no data left
1360 	 * and tty was marked busy.
1361 	 */
1362 	if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
1363 		/*
1364 		 * If we've delayed a parameter change, do it now, and restart
1365 		 * output.
1366 		 */
1367 		if (sc->sc_heldchange) {
1368 			sc->sc_heldchange = 0;
1369 			sc->sc_tbc = sc->sc_heldtbc;
1370 			sc->sc_heldtbc = 0;
1371 		}
1372 
1373 		/* Output the next chunk of the contiguous buffer, if any. */
1374 		if (sc->sc_tbc > 0) {
1375 			int n;
1376 			int maxchars;
1377 			int i;
1378 
1379 			n = sc->sc_tbc;
1380 			maxchars = sc->sc_fifolen -
1381 				((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
1382 			if (n > maxchars)
1383 				n = maxchars;
1384 
1385 			for (i = 0; i < n; i++) {
1386 				scif_putc(*(sc->sc_tba));
1387 				sc->sc_tba++;
1388 			}
1389 			sc->sc_tbc -= n;
1390 		} else {
1391 			/* Disable transmit completion interrupts if necessary. */
1392 #if 0
1393 			if (ISSET(sc->sc_ier, IER_ETXRDY))
1394 #endif
1395 				scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
1396 
1397 			if (sc->sc_tx_busy) {
1398 				sc->sc_tx_busy = 0;
1399 				sc->sc_tx_done = 1;
1400 			}
1401 		}
1402 	}
1403 
1404 	/* Wake up the poller. */
1405 	softint_schedule(sc->sc_si);
1406 
1407 #if NRND > 0 && defined(RND_SCIF)
1408 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
1409 #endif
1410 
1411 	return (1);
1412 }
1413 
1414 void
1415 scifcnprobe(struct consdev *cp)
1416 {
1417 	int maj;
1418 
1419 	/* locate the major number */
1420 	maj = cdevsw_lookup_major(&scif_cdevsw);
1421 
1422 	/* Initialize required fields. */
1423 	cp->cn_dev = makedev(maj, 0);
1424 #ifdef SCIFCONSOLE
1425 	cp->cn_pri = CN_REMOTE;
1426 #else
1427 	cp->cn_pri = CN_NORMAL;
1428 #endif
1429 }
1430 
1431 void
1432 scifcninit(struct consdev *cp)
1433 {
1434 
1435 	InitializeScif(scifcn_speed);
1436 	scifisconsole = 1;
1437 }
1438 
1439 int
1440 scifcngetc(dev_t dev)
1441 {
1442 	int c;
1443 	int s;
1444 
1445 	s = splserial();
1446 	c = scif_getc();
1447 	splx(s);
1448 
1449 	return (c);
1450 }
1451 
1452 void
1453 scifcnputc(dev_t dev, int c)
1454 {
1455 	int s;
1456 
1457 	s = splserial();
1458 	scif_putc((u_char)c);
1459 	splx(s);
1460 }
1461 
1462 #ifdef KGDB
1463 int
1464 scif_kgdb_init()
1465 {
1466 
1467 	if (strcmp(kgdb_devname, "scif") != 0)
1468 		return (1);
1469 
1470 	if (scifisconsole)
1471 		return (1);	/* can't share with console */
1472 
1473 	InitializeScif(kgdb_rate);
1474 
1475 	kgdb_attach((int (*)(void *))scifcngetc,
1476 	    (void (*)(void *, int))scifcnputc, NULL);
1477 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1478 	kgdb_attached = 1;
1479 
1480 	return (0);
1481 }
1482 #endif /* KGDB */
1483