1 /* $NetBSD: scif.c,v 1.7 2000/02/22 01:37:11 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_pclock.h" 107 #include "opt_scif.h" 108 109 #include <sys/param.h> 110 #include <sys/systm.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/conf.h> 114 #include <sys/file.h> 115 #include <sys/syslog.h> 116 #include <sys/kernel.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 120 #include <dev/cons.h> 121 122 #include <machine/cpu.h> 123 #include <sh3/scifreg.h> 124 #include <sh3/tmureg.h> 125 126 #include <machine/shbvar.h> 127 128 static void scifstart __P((struct tty *)); 129 static int scifparam __P((struct tty *, struct termios *)); 130 131 void scifcnprobe __P((struct consdev *)); 132 void scifcninit __P((struct consdev *)); 133 void scifcnputc __P((dev_t, int)); 134 int scifcngetc __P((dev_t)); 135 void scifcnpoolc __P((dev_t, int)); 136 void scif_intr_init __P((void)); 137 int scifintr __P((void *)); 138 139 struct scif_softc { 140 struct device sc_dev; /* boilerplate */ 141 struct tty *sc_tty; 142 void *sc_ih; 143 144 #if 0 145 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 146 bus_space_handle_t sc_ioh; /* ISA io handle */ 147 148 int sc_drq; 149 150 int sc_frequency; 151 #endif 152 153 u_int sc_overflows, 154 sc_floods, 155 sc_errors; /* number of retries so far */ 156 u_char sc_status[7]; /* copy of registers */ 157 158 int sc_hwflags; 159 int sc_swflags; 160 u_int sc_fifolen; 161 162 u_int sc_r_hiwat, 163 sc_r_lowat; 164 u_char *volatile sc_rbget, 165 *volatile sc_rbput; 166 volatile u_int sc_rbavail; 167 u_char *sc_rbuf, 168 *sc_ebuf; 169 170 u_char *sc_tba; /* transmit buffer address */ 171 u_int sc_tbc, /* transmit byte count */ 172 sc_heldtbc; 173 174 volatile u_char sc_rx_flags, 175 #define RX_TTY_BLOCKED 0x01 176 #define RX_TTY_OVERFLOWED 0x02 177 #define RX_IBUF_BLOCKED 0x04 178 #define RX_IBUF_OVERFLOWED 0x08 179 #define RX_ANY_BLOCK 0x0f 180 sc_tx_busy, /* working on an output chunk */ 181 sc_tx_done, /* done with one output chunk */ 182 sc_tx_stopped, /* H/W level stop (lost CTS) */ 183 sc_st_check, /* got a status interrupt */ 184 sc_rx_ready; 185 186 volatile u_char sc_heldchange; 187 }; 188 189 /* controller driver configuration */ 190 static int scif_match __P((struct device *, struct cfdata *, void *)); 191 static void scif_attach __P((struct device *, struct device *, void *)); 192 193 void scif_break __P((struct scif_softc *, int)); 194 void scif_iflush __P((struct scif_softc *)); 195 196 #define integrate static inline 197 #ifdef __GENERIC_SOFT_INTERRUPTS 198 void scifsoft __P((void *)); 199 #else 200 #ifndef __NO_SOFT_SERIAL_INTERRUPT 201 void scifsoft __P((void)); 202 #else 203 void scifsoft __P((void *)); 204 #endif 205 #endif 206 integrate void scif_rxsoft __P((struct scif_softc *, struct tty *)); 207 integrate void scif_txsoft __P((struct scif_softc *, struct tty *)); 208 integrate void scif_stsoft __P((struct scif_softc *, struct tty *)); 209 integrate void scif_schedrx __P((struct scif_softc *)); 210 void scifdiag __P((void *)); 211 212 213 #define SCIFUNIT_MASK 0x7ffff 214 #define SCIFDIALOUT_MASK 0x80000 215 216 #define SCIFUNIT(x) (minor(x) & SCIFUNIT_MASK) 217 #define SCIFDIALOUT(x) (minor(x) & SCIFDIALOUT_MASK) 218 219 /* Macros to clear/set/test flags. */ 220 #define SET(t, f) (t) |= (f) 221 #define CLR(t, f) (t) &= ~(f) 222 #define ISSET(t, f) ((t) & (f)) 223 224 /* Hardware flag masks */ 225 #define SCIF_HW_NOIEN 0x01 226 #define SCIF_HW_FIFO 0x02 227 #define SCIF_HW_FLOW 0x08 228 #define SCIF_HW_DEV_OK 0x20 229 #define SCIF_HW_CONSOLE 0x40 230 #define SCIF_HW_KGDB 0x80 231 232 /* Buffer size for character buffer */ 233 #define SCIF_RING_SIZE 2048 234 235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 236 u_int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4; 237 u_int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4; 238 239 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 240 int scifconscflag = CONMODE; 241 242 #ifdef SCIFCN_SPEED 243 unsigned int scifcn_speed = SCIFCN_SPEED; 244 #else 245 unsigned int scifcn_speed = 9600; 246 #endif 247 248 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 249 250 #ifndef __GENERIC_SOFT_INTERRUPTS 251 #ifdef __NO_SOFT_SERIAL_INTERRUPT 252 volatile int scif_softintr_scheduled; 253 #endif 254 #endif 255 256 u_int scif_rbuf_size = SCIF_RING_SIZE; 257 258 struct cfattach scif_ca = { 259 sizeof(struct scif_softc), scif_match, scif_attach 260 }; 261 262 extern struct cfdriver scif_cd; 263 264 cdev_decl(scif); 265 266 void InitializeScif __P((unsigned int)); 267 268 /* 269 * following functions are debugging prupose only 270 */ 271 #define CR 0x0D 272 #define USART_ON (unsigned int)~0x08 273 274 static void WaitFor __P((int)); 275 void PutcScif __P((unsigned char)); 276 void PutStrScif __P((unsigned char *)); 277 int ScifErrCheck __P((void)); 278 unsigned char GetcScif __P((void)); 279 int GetStrScif __P((unsigned char *, int)); 280 281 /* 282 * WaitFor 283 * : int mSec; 284 */ 285 static void 286 WaitFor(mSec) 287 int mSec; 288 { 289 290 /* Disable Under Flow interrupt, rising edge, 1/4 */ 291 SHREG_TCR2 = 0x0000; 292 293 /* Set counter value (count down with 4 KHz) */ 294 SHREG_TCNT2 = mSec * 4; 295 296 /* start Channel2 */ 297 SHREG_TSTR |= TSTR_STR2; 298 299 /* wait for under flag ON of channel2 */ 300 while ((SHREG_TCR2 & TCR_UNF) == 0) 301 ; 302 303 /* stop channel2 */ 304 SHREG_TSTR &= ~TSTR_STR2; 305 } 306 307 /* 308 * InitializeScif 309 * : unsigned int bps; 310 * : SCIF(Serial Communication Interface) 311 */ 312 313 void 314 InitializeScif(bps) 315 unsigned int bps; 316 { 317 318 /* Initialize SCR */ 319 SHREG_SCSCR2 = 0x00; 320 321 #if 0 322 SHREG_SCFCR2 = SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE; 323 #else 324 SHREG_SCFCR2 = SCFCR2_TFRST | SCFCR2_RFRST; 325 #endif 326 /* Serial Mode Register */ 327 SHREG_SCSMR2 = 0x00; /* 8bit,NonParity,Even,1Stop */ 328 329 /* Bit Rate Register */ 330 SHREG_SCBRR2 = divrnd(PCLOCK, 32 * bps) - 1; 331 332 /* 333 * wait 1mSec, because Send/Recv must begin 1 bit period after 334 * BRR is set. 335 */ 336 WaitFor(1); 337 338 #if 0 339 SHREG_SCFCR2 = FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE; 340 #else 341 SHREG_SCFCR2 = FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1; 342 #endif 343 344 /* Send permission, Recieve permission ON */ 345 SHREG_SCSCR2 = SCSCR2_TE | SCSCR2_RE; 346 347 /* Serial Status Register */ 348 SHREG_SCSSR2 &= SCSSR2_TDFE; /* Clear Status */ 349 } 350 351 352 /* 353 * PutcScif 354 * : unsigned char c; 355 */ 356 357 void 358 PutcScif(c) 359 unsigned char c; 360 { 361 362 /* wait for ready */ 363 while ((SHREG_SCFDR2 & SCFDR2_TXCNT) == SCFDR2_TXF_FULL) 364 ; 365 366 /* write send data to send register */ 367 SHREG_SCFTDR2 = c; 368 369 /* clear ready flag */ 370 SHREG_SCSSR2 &= ~(SCSSR2_TDFE | SCSSR2_TEND); 371 372 if (c == '\n') { 373 while ((SHREG_SCFDR2 & SCFDR2_TXCNT) == SCFDR2_TXF_FULL) 374 ; 375 376 SHREG_SCFTDR2 = '\r'; 377 378 SHREG_SCSSR2 &= ~(SCSSR2_TDFE | SCSSR2_TEND); 379 } 380 } 381 382 /* 383 * PutStrScif 384 * : unsigned char *s; 385 */ 386 void 387 PutStrScif(s) 388 unsigned char *s; 389 { 390 391 while (*s) 392 PutcScif(*s++); 393 } 394 395 /* 396 * : ScifErrCheck 397 * 0x80 = error 398 * 0x08 = frame error 399 * 0x04 = parity error 400 */ 401 int 402 ScifErrCheck(void) 403 { 404 405 return(SHREG_SCSSR2 & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)); 406 } 407 408 /* 409 * GetcScif 410 */ 411 #if 0 412 /* Old code */ 413 unsigned char 414 GetcScif(void) 415 { 416 unsigned char c, err_c; 417 418 while (((err_c = SHREG_SCSSR2) 419 & (SCSSR2_RDF | SCSSR2_ER | SCSSR2_FER | SCSSR2_PER | SCSSR2_DR)) == 0) 420 ; 421 if ((err_c & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)) != 0) 422 return(err_c |= 0x80); 423 424 c = SHREG_SCFRDR2; 425 426 SHREG_SCSSR2 &= ~(SCSSR2_RDF | SCSSR2_DR); 427 428 return(c); 429 } 430 #else 431 unsigned char 432 GetcScif(void) 433 { 434 unsigned char c, err_c; 435 436 /* wait for ready */ 437 while ((SHREG_SCFDR2 & SCFDR2_RECVCNT) == 0) 438 ; 439 err_c = SHREG_SCSSR2; 440 if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) != 0) 441 return(err_c |= 0x80); 442 443 c = SHREG_SCFRDR2; 444 445 SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR); 446 447 return(c); 448 } 449 #endif 450 451 /* 452 * GetStrScif 453 * : unsigned char *s; 454 * : int size; 455 */ 456 int 457 GetStrScif(s, size) 458 unsigned char *s; 459 int size; 460 { 461 462 for (; size ; size--) { 463 *s = GetcScif(); 464 if (*s & 0x80) 465 return -1; 466 if (*s == CR) { 467 *s = 0; 468 break; 469 } 470 s++; 471 } 472 if (size == 0) 473 *s = 0; 474 return 0; 475 } 476 477 #if 0 478 #define SCIF_MAX_UNITS 2 479 #else 480 #define SCIF_MAX_UNITS 1 481 #endif 482 483 484 static int 485 scif_match(parent, cfp, aux) 486 struct device *parent; 487 struct cfdata *cfp; 488 void *aux; 489 { 490 struct shb_attach_args *sa = aux; 491 492 if (strcmp(cfp->cf_driver->cd_name, "scif") 493 || cfp->cf_unit >= SCIF_MAX_UNITS) 494 return 0; 495 496 sa->ia_iosize = 0x10; 497 return 1; 498 } 499 500 static void 501 scif_attach(parent, self, aux) 502 struct device *parent, *self; 503 void *aux; 504 { 505 struct scif_softc *sc = (struct scif_softc *)self; 506 struct tty *tp; 507 int irq; 508 struct shb_attach_args *ia = aux; 509 510 sc->sc_hwflags = 0; /* XXX */ 511 sc->sc_swflags = 0; /* XXX */ 512 sc->sc_fifolen = 16; 513 514 irq = ia->ia_irq; 515 516 SET(sc->sc_hwflags, SCIF_HW_DEV_OK); 517 SET(sc->sc_hwflags, SCIF_HW_CONSOLE); 518 519 #if 0 520 if (irq != IRQUNK) { 521 sc->sc_ih = shb_intr_establish(irq, 522 IST_EDGE, IPL_SERIAL, scifintr, sc); 523 } 524 #else 525 if (irq != IRQUNK) { 526 sc->sc_ih = shb_intr_establish(SCIF_IRQ, 527 IST_EDGE, IPL_SERIAL, scifintr, sc); 528 } 529 #endif 530 531 printf("\n"); 532 533 printf("%s: console\n", sc->sc_dev.dv_xname); 534 535 tp = ttymalloc(); 536 tp->t_oproc = scifstart; 537 tp->t_param = scifparam; 538 tp->t_hwiflow = NULL; 539 540 sc->sc_tty = tp; 541 sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 542 if (sc->sc_rbuf == NULL) { 543 printf("%s: unable to allocate ring buffer\n", 544 sc->sc_dev.dv_xname); 545 return; 546 } 547 sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1); 548 549 tty_attach(tp); 550 } 551 552 /* 553 * Start or restart transmission. 554 */ 555 static void 556 scifstart(tp) 557 struct tty *tp; 558 { 559 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)]; 560 int s; 561 562 s = spltty(); 563 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 564 goto out; 565 if (sc->sc_tx_stopped) 566 goto out; 567 568 if (tp->t_outq.c_cc <= tp->t_lowat) { 569 if (ISSET(tp->t_state, TS_ASLEEP)) { 570 CLR(tp->t_state, TS_ASLEEP); 571 wakeup(&tp->t_outq); 572 } 573 selwakeup(&tp->t_wsel); 574 if (tp->t_outq.c_cc == 0) 575 goto out; 576 } 577 578 /* Grab the first contiguous region of buffer space. */ 579 { 580 u_char *tba; 581 int tbc; 582 583 tba = tp->t_outq.c_cf; 584 tbc = ndqb(&tp->t_outq, 0); 585 586 (void)splserial(); 587 588 sc->sc_tba = tba; 589 sc->sc_tbc = tbc; 590 } 591 592 SET(tp->t_state, TS_BUSY); 593 sc->sc_tx_busy = 1; 594 595 /* Enable transmit completion interrupts if necessary. */ 596 SHREG_SCSCR2 |= SCSCR2_TIE | SCSCR2_RIE; 597 598 /* Output the first chunk of the contiguous buffer. */ 599 { 600 int n; 601 int max; 602 int i; 603 604 n = sc->sc_tbc; 605 max = sc->sc_fifolen - ((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8); 606 if (n > max) 607 n = max; 608 609 for (i = 0; i < n; i++) { 610 PutcScif(*(sc->sc_tba)); 611 sc->sc_tba++; 612 } 613 sc->sc_tbc -= n; 614 } 615 out: 616 splx(s); 617 return; 618 } 619 620 /* 621 * Set SCIF tty parameters from termios. 622 * XXX - Should just copy the whole termios after 623 * making sure all the changes could be done. 624 */ 625 static int 626 scifparam(tp, t) 627 struct tty *tp; 628 struct termios *t; 629 { 630 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)]; 631 int ospeed = t->c_ospeed; 632 int s; 633 634 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 635 return (EIO); 636 637 /* Check requested parameters. */ 638 if (ospeed < 0) 639 return (EINVAL); 640 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 641 return (EINVAL); 642 643 /* 644 * For the console, always force CLOCAL and !HUPCL, so that the port 645 * is always active. 646 */ 647 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 648 ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 649 SET(t->c_cflag, CLOCAL); 650 CLR(t->c_cflag, HUPCL); 651 } 652 653 /* 654 * If there were no changes, don't do anything. This avoids dropping 655 * input and improves performance when all we did was frob things like 656 * VMIN and VTIME. 657 */ 658 if (tp->t_ospeed == t->c_ospeed && 659 tp->t_cflag == t->c_cflag) 660 return (0); 661 662 #if 0 663 /* XXX (msaitoh) */ 664 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 665 #endif 666 667 s = splserial(); 668 669 /* 670 * Set the flow control pins depending on the current flow control 671 * mode. 672 */ 673 if (ISSET(t->c_cflag, CRTSCTS)) { 674 SHREG_SCFCR2 |= SCFCR2_MCE; 675 } else { 676 SHREG_SCFCR2 &= ~SCFCR2_MCE; 677 } 678 679 SHREG_SCBRR2 = divrnd(PCLOCK, 32 * ospeed) -1; 680 681 /* 682 * Set the FIFO threshold based on the receive speed. 683 * 684 * * If it's a low speed, it's probably a mouse or some other 685 * interactive device, so set the threshold low. 686 * * If it's a high speed, trim the trigger level down to prevent 687 * overflows. 688 * * Otherwise set it a bit higher. 689 */ 690 #if 0 691 /* XXX (msaitoh) */ 692 if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP)) 693 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 694 else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO)) 695 sc->sc_fifo = FIFO_ENABLE | 696 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 697 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 698 else 699 sc->sc_fifo = 0; 700 #endif 701 702 /* And copy to tty. */ 703 tp->t_ispeed = 0; 704 tp->t_ospeed = t->c_ospeed; 705 tp->t_cflag = t->c_cflag; 706 707 if (!sc->sc_heldchange) { 708 if (sc->sc_tx_busy) { 709 sc->sc_heldtbc = sc->sc_tbc; 710 sc->sc_tbc = 0; 711 sc->sc_heldchange = 1; 712 } 713 #if 0 714 /* XXX (msaitoh) */ 715 else 716 scif_loadchannelregs(sc); 717 #endif 718 } 719 720 if (!ISSET(t->c_cflag, CHWFLOW)) { 721 /* Disable the high water mark. */ 722 sc->sc_r_hiwat = 0; 723 sc->sc_r_lowat = 0; 724 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 725 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 726 scif_schedrx(sc); 727 } 728 } else { 729 sc->sc_r_hiwat = scif_rbuf_hiwat; 730 sc->sc_r_lowat = scif_rbuf_lowat; 731 } 732 733 splx(s); 734 735 #ifdef SCIF_DEBUG 736 if (scif_debug) 737 scifstatus(sc, "scifparam "); 738 #endif 739 740 if (!ISSET(t->c_cflag, CHWFLOW)) { 741 if (sc->sc_tx_stopped) { 742 sc->sc_tx_stopped = 0; 743 scifstart(tp); 744 } 745 } 746 747 return (0); 748 } 749 750 void 751 scif_iflush(sc) 752 struct scif_softc *sc; 753 { 754 int i; 755 unsigned char c; 756 757 i = SHREG_SCFDR2 & SCFDR2_RECVCNT; 758 759 while (i > 0) { 760 c = SHREG_SCFRDR2; 761 SHREG_SCSSR2 &= ~(SCSSR2_RDF | SCSSR2_DR); 762 i--; 763 } 764 } 765 766 int scif_getc __P((void)); 767 void scif_putc __P((int)); 768 769 int 770 scif_getc() 771 { 772 773 return (GetcScif()); 774 } 775 776 void 777 scif_putc(int c) 778 { 779 780 PutcScif(c); 781 } 782 783 int 784 scifopen(dev, flag, mode, p) 785 dev_t dev; 786 int flag, mode; 787 struct proc *p; 788 { 789 int unit = SCIFUNIT(dev); 790 struct scif_softc *sc; 791 struct tty *tp; 792 int s, s2; 793 int error; 794 795 if (unit >= scif_cd.cd_ndevs) 796 return (ENXIO); 797 sc = scif_cd.cd_devs[unit]; 798 if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) || 799 sc->sc_rbuf == NULL) 800 return (ENXIO); 801 802 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 803 return (ENXIO); 804 805 #ifdef KGDB 806 /* 807 * If this is the kgdb port, no other use is permitted. 808 */ 809 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) 810 return (EBUSY); 811 #endif 812 813 tp = sc->sc_tty; 814 815 if (ISSET(tp->t_state, TS_ISOPEN) && 816 ISSET(tp->t_state, TS_XCLUDE) && 817 p->p_ucred->cr_uid != 0) 818 return (EBUSY); 819 820 s = spltty(); 821 822 /* 823 * Do the following iff this is a first open. 824 */ 825 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 826 struct termios t; 827 828 tp->t_dev = dev; 829 830 s2 = splserial(); 831 832 /* Turn on interrupts. */ 833 SHREG_SCSCR2 |= SCSCR2_TIE | SCSCR2_RIE; 834 835 splx(s2); 836 837 /* 838 * Initialize the termios status to the defaults. Add in the 839 * sticky bits from TIOCSFLAGS. 840 */ 841 t.c_ispeed = 0; 842 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 843 t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */ 844 t.c_cflag = scifconscflag; 845 } else { 846 t.c_ospeed = TTYDEF_SPEED; 847 t.c_cflag = TTYDEF_CFLAG; 848 } 849 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 850 SET(t.c_cflag, CLOCAL); 851 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 852 SET(t.c_cflag, CRTSCTS); 853 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 854 SET(t.c_cflag, MDMBUF); 855 /* Make sure scifparam() will do something. */ 856 tp->t_ospeed = 0; 857 (void) scifparam(tp, &t); 858 tp->t_iflag = TTYDEF_IFLAG; 859 tp->t_oflag = TTYDEF_OFLAG; 860 tp->t_lflag = TTYDEF_LFLAG; 861 ttychars(tp); 862 ttsetwater(tp); 863 864 s2 = splserial(); 865 866 /* Clear the input ring, and unblock. */ 867 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 868 sc->sc_rbavail = scif_rbuf_size; 869 scif_iflush(sc); 870 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 871 #if 0 872 /* XXX (msaitoh) */ 873 scif_hwiflow(sc); 874 #endif 875 876 #ifdef SCIF_DEBUG 877 if (scif_debug) 878 scifstatus(sc, "scifopen "); 879 #endif 880 881 splx(s2); 882 } 883 884 splx(s); 885 886 error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 887 if (error) 888 goto bad; 889 890 error = (*linesw[tp->t_line].l_open)(dev, tp); 891 if (error) 892 goto bad; 893 894 return (0); 895 896 bad: 897 898 return (error); 899 } 900 901 int 902 scifclose(dev, flag, mode, p) 903 dev_t dev; 904 int flag, mode; 905 struct proc *p; 906 { 907 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)]; 908 struct tty *tp = sc->sc_tty; 909 910 /* XXX This is for cons.c. */ 911 if (!ISSET(tp->t_state, TS_ISOPEN)) 912 return (0); 913 914 (*linesw[tp->t_line].l_close)(tp, flag); 915 ttyclose(tp); 916 917 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 918 return (0); 919 920 return (0); 921 } 922 923 int 924 scifread(dev, uio, flag) 925 dev_t dev; 926 struct uio *uio; 927 int flag; 928 { 929 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)]; 930 struct tty *tp = sc->sc_tty; 931 932 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 933 } 934 935 int 936 scifwrite(dev, uio, flag) 937 dev_t dev; 938 struct uio *uio; 939 int flag; 940 { 941 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)]; 942 struct tty *tp = sc->sc_tty; 943 944 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 945 } 946 947 struct tty * 948 sciftty(dev) 949 dev_t dev; 950 { 951 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)]; 952 struct tty *tp = sc->sc_tty; 953 954 return (tp); 955 } 956 957 int 958 scifioctl(dev, cmd, data, flag, p) 959 dev_t dev; 960 u_long cmd; 961 caddr_t data; 962 int flag; 963 struct proc *p; 964 { 965 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)]; 966 struct tty *tp = sc->sc_tty; 967 int error; 968 int s; 969 970 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 971 return (EIO); 972 973 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 974 if (error >= 0) 975 return (error); 976 977 error = ttioctl(tp, cmd, data, flag, p); 978 if (error >= 0) 979 return (error); 980 981 error = 0; 982 983 s = splserial(); 984 985 switch (cmd) { 986 case TIOCSBRK: 987 scif_break(sc, 1); 988 break; 989 990 case TIOCCBRK: 991 scif_break(sc, 0); 992 break; 993 994 case TIOCGFLAGS: 995 *(int *)data = sc->sc_swflags; 996 break; 997 998 case TIOCSFLAGS: 999 error = suser(p->p_ucred, &p->p_acflag); 1000 if (error) 1001 break; 1002 sc->sc_swflags = *(int *)data; 1003 break; 1004 1005 default: 1006 error = ENOTTY; 1007 break; 1008 } 1009 1010 splx(s); 1011 1012 return (error); 1013 } 1014 1015 integrate void 1016 scif_schedrx(sc) 1017 struct scif_softc *sc; 1018 { 1019 1020 sc->sc_rx_ready = 1; 1021 1022 /* Wake up the poller. */ 1023 #ifdef __GENERIC_SOFT_INTERRUPTS 1024 softintr_schedule(sc->sc_si); 1025 #else 1026 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1027 setsoftserial(); 1028 #else 1029 if (!scif_softintr_scheduled) { 1030 scif_softintr_scheduled = 1; 1031 timeout(scifsoft, NULL, 1); 1032 } 1033 #endif 1034 #endif 1035 } 1036 1037 void 1038 scif_break(sc, onoff) 1039 struct scif_softc *sc; 1040 int onoff; 1041 { 1042 1043 if (onoff) 1044 SHREG_SCSSR2 &= ~SCSSR2_TDFE; 1045 else 1046 SHREG_SCSSR2 |= SCSSR2_TDFE; 1047 1048 #if 0 /* XXX */ 1049 if (!sc->sc_heldchange) { 1050 if (sc->sc_tx_busy) { 1051 sc->sc_heldtbc = sc->sc_tbc; 1052 sc->sc_tbc = 0; 1053 sc->sc_heldchange = 1; 1054 } else 1055 scif_loadchannelregs(sc); 1056 } 1057 #endif 1058 } 1059 1060 /* 1061 * Stop output, e.g., for ^S or output flush. 1062 */ 1063 void 1064 scifstop(tp, flag) 1065 struct tty *tp; 1066 int flag; 1067 { 1068 struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)]; 1069 int s; 1070 1071 s = splserial(); 1072 if (ISSET(tp->t_state, TS_BUSY)) { 1073 /* Stop transmitting at the next chunk. */ 1074 sc->sc_tbc = 0; 1075 sc->sc_heldtbc = 0; 1076 if (!ISSET(tp->t_state, TS_TTSTOP)) 1077 SET(tp->t_state, TS_FLUSH); 1078 } 1079 splx(s); 1080 } 1081 1082 void 1083 scif_intr_init() 1084 { 1085 /* XXX */ 1086 } 1087 1088 void 1089 scifdiag(arg) 1090 void *arg; 1091 { 1092 struct scif_softc *sc = arg; 1093 int overflows, floods; 1094 int s; 1095 1096 s = splserial(); 1097 overflows = sc->sc_overflows; 1098 sc->sc_overflows = 0; 1099 floods = sc->sc_floods; 1100 sc->sc_floods = 0; 1101 sc->sc_errors = 0; 1102 splx(s); 1103 1104 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1105 sc->sc_dev.dv_xname, 1106 overflows, overflows == 1 ? "" : "s", 1107 floods, floods == 1 ? "" : "s"); 1108 } 1109 1110 integrate void 1111 scif_rxsoft(sc, tp) 1112 struct scif_softc *sc; 1113 struct tty *tp; 1114 { 1115 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1116 u_char *get, *end; 1117 u_int cc, scc; 1118 u_char ssr2; 1119 int code; 1120 int s; 1121 1122 end = sc->sc_ebuf; 1123 get = sc->sc_rbget; 1124 scc = cc = scif_rbuf_size - sc->sc_rbavail; 1125 1126 if (cc == scif_rbuf_size) { 1127 sc->sc_floods++; 1128 if (sc->sc_errors++ == 0) 1129 timeout(scifdiag, sc, 60 * hz); 1130 } 1131 1132 while (cc) { 1133 code = get[0]; 1134 ssr2 = get[1]; 1135 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) { 1136 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER)) 1137 SET(code, TTY_FE); 1138 if (ISSET(ssr2, SCSSR2_PER)) 1139 SET(code, TTY_PE); 1140 } 1141 if ((*rint)(code, tp) == -1) { 1142 /* 1143 * The line discipline's buffer is out of space. 1144 */ 1145 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1146 /* 1147 * We're either not using flow control, or the 1148 * line discipline didn't tell us to block for 1149 * some reason. Either way, we have no way to 1150 * know when there's more space available, so 1151 * just drop the rest of the data. 1152 */ 1153 get += cc << 1; 1154 if (get >= end) 1155 get -= scif_rbuf_size << 1; 1156 cc = 0; 1157 } else { 1158 /* 1159 * Don't schedule any more receive processing 1160 * until the line discipline tells us there's 1161 * space available (through scifhwiflow()). 1162 * Leave the rest of the data in the input 1163 * buffer. 1164 */ 1165 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1166 } 1167 break; 1168 } 1169 get += 2; 1170 if (get >= end) 1171 get = sc->sc_rbuf; 1172 cc--; 1173 } 1174 1175 if (cc != scc) { 1176 sc->sc_rbget = get; 1177 s = splserial(); 1178 cc = sc->sc_rbavail += scc - cc; 1179 /* Buffers should be ok again, release possible block. */ 1180 if (cc >= sc->sc_r_lowat) { 1181 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1182 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1183 SHREG_SCSCR2 |= SCSCR2_RIE; 1184 } 1185 #if 0 1186 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1187 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1188 scif_hwiflow(sc); 1189 } 1190 #endif 1191 } 1192 splx(s); 1193 } 1194 } 1195 1196 integrate void 1197 scif_txsoft(sc, tp) 1198 struct scif_softc *sc; 1199 struct tty *tp; 1200 { 1201 1202 CLR(tp->t_state, TS_BUSY); 1203 if (ISSET(tp->t_state, TS_FLUSH)) 1204 CLR(tp->t_state, TS_FLUSH); 1205 else 1206 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1207 (*linesw[tp->t_line].l_start)(tp); 1208 } 1209 1210 integrate void 1211 scif_stsoft(sc, tp) 1212 struct scif_softc *sc; 1213 struct tty *tp; 1214 { 1215 #if 0 1216 /* XXX (msaitoh) */ 1217 u_char msr, delta; 1218 int s; 1219 1220 s = splserial(); 1221 msr = sc->sc_msr; 1222 delta = sc->sc_msr_delta; 1223 sc->sc_msr_delta = 0; 1224 splx(s); 1225 1226 if (ISSET(delta, sc->sc_msr_dcd)) { 1227 /* 1228 * Inform the tty layer that carrier detect changed. 1229 */ 1230 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1231 } 1232 1233 if (ISSET(delta, sc->sc_msr_cts)) { 1234 /* Block or unblock output according to flow control. */ 1235 if (ISSET(msr, sc->sc_msr_cts)) { 1236 sc->sc_tx_stopped = 0; 1237 (*linesw[tp->t_line].l_start)(tp); 1238 } else { 1239 sc->sc_tx_stopped = 1; 1240 } 1241 } 1242 1243 #ifdef SCIF_DEBUG 1244 if (scif_debug) 1245 scifstatus(sc, "scif_stsoft"); 1246 #endif 1247 #endif 1248 } 1249 1250 #ifdef __GENERIC_SOFT_INTERRUPTS 1251 void 1252 scifsoft(arg) 1253 void *arg; 1254 { 1255 struct scif_softc *sc = arg; 1256 struct tty *tp; 1257 1258 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1259 return; 1260 1261 { 1262 #else 1263 void 1264 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1265 scifsoft() 1266 #else 1267 scifsoft(arg) 1268 void *arg; 1269 #endif 1270 { 1271 struct scif_softc *sc; 1272 struct tty *tp; 1273 int unit; 1274 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1275 int s; 1276 1277 s = splsoftserial(); 1278 scif_softintr_scheduled = 0; 1279 #endif 1280 1281 for (unit = 0; unit < scif_cd.cd_ndevs; unit++) { 1282 sc = scif_cd.cd_devs[unit]; 1283 if (sc == NULL || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK)) 1284 continue; 1285 1286 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1287 continue; 1288 1289 tp = sc->sc_tty; 1290 if (tp == NULL) 1291 continue; 1292 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1293 continue; 1294 #endif 1295 tp = sc->sc_tty; 1296 1297 if (sc->sc_rx_ready) { 1298 sc->sc_rx_ready = 0; 1299 scif_rxsoft(sc, tp); 1300 } 1301 1302 #if 0 1303 if (sc->sc_st_check) { 1304 sc->sc_st_check = 0; 1305 scif_stsoft(sc, tp); 1306 } 1307 #endif 1308 1309 if (sc->sc_tx_done) { 1310 sc->sc_tx_done = 0; 1311 scif_txsoft(sc, tp); 1312 } 1313 } 1314 1315 #ifndef __GENERIC_SOFT_INTERRUPTS 1316 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1317 splx(s); 1318 #endif 1319 #endif 1320 } 1321 1322 int 1323 scifintr(arg) 1324 void *arg; 1325 { 1326 struct scif_softc *sc = arg; 1327 u_char *put, *end; 1328 u_int cc; 1329 u_short ssr2; 1330 int count; 1331 1332 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1333 return (0); 1334 1335 end = sc->sc_ebuf; 1336 put = sc->sc_rbput; 1337 cc = sc->sc_rbavail; 1338 1339 ssr2 = SHREG_SCSSR2; 1340 if (ISSET(ssr2, SCSSR2_BRK)) { 1341 SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR); 1342 #if defined(DDB) || defined(KGDB) 1343 #ifdef DDB 1344 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 1345 console_debugger(); 1346 } 1347 #endif 1348 #ifdef KGDB 1349 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) { 1350 kgdb_connect(1); 1351 } 1352 #endif 1353 #endif /* DDB || KGDB */ 1354 } 1355 count = SHREG_SCFDR2 & SCFDR2_RECVCNT; 1356 if (count != 0) { 1357 while ((cc > 0) && (count > 0)) { 1358 put[0] = SHREG_SCFRDR2; 1359 put[1] = (u_char)(SHREG_SCSSR2 & 0x00ff); 1360 1361 SHREG_SCSSR2 &= ~(SCSSR2_RDF | SCSSR2_DR); 1362 1363 put += 2; 1364 if (put >= end) 1365 put = sc->sc_rbuf; 1366 cc--; 1367 count--; 1368 } 1369 1370 /* 1371 * Current string of incoming characters ended because 1372 * no more data was available or we ran out of space. 1373 * Schedule a receive event if any data was received. 1374 * If we're out of space, turn off receive interrupts. 1375 */ 1376 sc->sc_rbput = put; 1377 sc->sc_rbavail = cc; 1378 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1379 sc->sc_rx_ready = 1; 1380 1381 /* 1382 * See if we are in danger of overflowing a buffer. If 1383 * so, use hardware flow control to ease the pressure. 1384 */ 1385 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1386 cc < sc->sc_r_hiwat) { 1387 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1388 #if 0 1389 scif_hwiflow(sc); 1390 #endif 1391 } 1392 1393 /* 1394 * If we're out of space, disable receive interrupts 1395 * until the queue has drained a bit. 1396 */ 1397 if (!cc) { 1398 SHREG_SCSCR2 &= ~SCSCR2_RIE; 1399 } 1400 } else { 1401 if (SHREG_SCSSR2 & (SCSSR2_RDF | SCSSR2_DR)) { 1402 SHREG_SCSCR2 &= ~(SCSCR2_TIE | SCSCR2_RIE); 1403 } 1404 } 1405 1406 #if 0 1407 msr = bus_space_read_1(iot, ioh, scif_msr); 1408 delta = msr ^ sc->sc_msr; 1409 sc->sc_msr = msr; 1410 if (ISSET(delta, sc->sc_msr_mask)) { 1411 SET(sc->sc_msr_delta, delta); 1412 1413 /* 1414 * Pulse-per-second clock signal on edge of DCD? 1415 */ 1416 if (ISSET(delta, sc->sc_ppsmask)) { 1417 struct timeval tv; 1418 if (ISSET(msr, sc->sc_ppsmask) == 1419 sc->sc_ppsassert) { 1420 /* XXX nanotime() */ 1421 microtime(&tv); 1422 TIMEVAL_TO_TIMESPEC(&tv, 1423 &sc->ppsinfo.assert_timestamp); 1424 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1425 timespecadd(&sc->ppsinfo.assert_timestamp, 1426 &sc->ppsparam.assert_offset, 1427 &sc->ppsinfo.assert_timestamp); 1428 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1429 } 1430 1431 #ifdef PPS_SYNC 1432 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1433 hardpps(&tv, tv.tv_usec); 1434 #endif 1435 sc->ppsinfo.assert_sequence++; 1436 sc->ppsinfo.current_mode = 1437 sc->ppsparam.mode; 1438 1439 } else if (ISSET(msr, sc->sc_ppsmask) == 1440 sc->sc_ppsclear) { 1441 /* XXX nanotime() */ 1442 microtime(&tv); 1443 TIMEVAL_TO_TIMESPEC(&tv, 1444 &sc->ppsinfo.clear_timestamp); 1445 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1446 timespecadd(&sc->ppsinfo.clear_timestamp, 1447 &sc->ppsparam.clear_offset, 1448 &sc->ppsinfo.clear_timestamp); 1449 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1450 } 1451 1452 #ifdef PPS_SYNC 1453 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1454 hardpps(&tv, tv.tv_usec); 1455 #endif 1456 sc->ppsinfo.clear_sequence++; 1457 sc->ppsinfo.current_mode = 1458 sc->ppsparam.mode; 1459 } 1460 } 1461 1462 /* 1463 * Stop output immediately if we lose the output 1464 * flow control signal or carrier detect. 1465 */ 1466 if (ISSET(~msr, sc->sc_msr_mask)) { 1467 sc->sc_tbc = 0; 1468 sc->sc_heldtbc = 0; 1469 #ifdef SCIF_DEBUG 1470 if (scif_debug) 1471 scifstatus(sc, "scifintr "); 1472 #endif 1473 } 1474 1475 sc->sc_st_check = 1; 1476 } 1477 #endif 1478 1479 /* 1480 * Done handling any receive interrupts. See if data can be 1481 * transmitted as well. Schedule tx done event if no data left 1482 * and tty was marked busy. 1483 */ 1484 if (((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */ 1485 /* 1486 * If we've delayed a parameter change, do it now, and restart 1487 * output. 1488 */ 1489 if (sc->sc_heldchange) { 1490 sc->sc_heldchange = 0; 1491 sc->sc_tbc = sc->sc_heldtbc; 1492 sc->sc_heldtbc = 0; 1493 } 1494 1495 /* Output the next chunk of the contiguous buffer, if any. */ 1496 if (sc->sc_tbc > 0) { 1497 int n; 1498 int max; 1499 int i; 1500 1501 n = sc->sc_tbc; 1502 max = sc->sc_fifolen - 1503 ((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8); 1504 if (n > max) 1505 n = max; 1506 1507 for (i = 0; i < n; i++) { 1508 PutcScif(*(sc->sc_tba)); 1509 sc->sc_tba++; 1510 } 1511 sc->sc_tbc -= n; 1512 } else { 1513 /* Disable transmit completion interrupts if necessary. */ 1514 #if 0 1515 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1516 #endif 1517 SHREG_SCSCR2 &= ~SCSCR2_TIE; 1518 1519 if (sc->sc_tx_busy) { 1520 sc->sc_tx_busy = 0; 1521 sc->sc_tx_done = 1; 1522 } 1523 } 1524 } 1525 1526 /* Wake up the poller. */ 1527 #ifdef __GENERIC_SOFT_INTERRUPTS 1528 softintr_schedule(sc->sc_si); 1529 #else 1530 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1531 setsoftserial(); 1532 #else 1533 if (!scif_softintr_scheduled) { 1534 scif_softintr_scheduled = 1; 1535 timeout(scifsoft, NULL, 1); 1536 } 1537 #endif 1538 #endif 1539 1540 #if NRND > 0 && defined(RND_SCIF) 1541 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1542 #endif 1543 1544 return (1); 1545 } 1546 1547 void 1548 scifcnprobe(cp) 1549 struct consdev *cp; 1550 { 1551 int maj; 1552 1553 /* locate the major number */ 1554 for (maj = 0; maj < nchrdev; maj++) 1555 if (cdevsw[maj].d_open == scifopen) 1556 break; 1557 1558 /* Initialize required fields. */ 1559 cp->cn_dev = makedev(maj, 0); 1560 #ifdef SCIFCONSOLE 1561 cp->cn_pri = CN_REMOTE; 1562 #else 1563 cp->cn_pri = CN_NORMAL; 1564 #endif 1565 } 1566 1567 #define scif_gets GetStrScif 1568 #define scif_puts PutStrScif 1569 1570 void 1571 scifcninit(cp) 1572 struct consdev *cp; 1573 { 1574 1575 InitializeScif(scifcn_speed); 1576 } 1577 1578 #define scif_getc GetcScif 1579 #define scif_putc PutcScif 1580 1581 int 1582 scifcngetc(dev) 1583 dev_t dev; 1584 { 1585 int c; 1586 int s; 1587 1588 s = splserial(); 1589 c = scif_getc(); 1590 splx(s); 1591 1592 return (c); 1593 } 1594 1595 void 1596 scifcnputc(dev, c) 1597 dev_t dev; 1598 int c; 1599 { 1600 int s; 1601 1602 s = splserial(); 1603 scif_putc(c); 1604 splx(s); 1605 } 1606