xref: /netbsd-src/sys/arch/sgimips/pci/pci_machdep.c (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: pci_machdep.c,v 1.6 2003/01/06 06:19:41 rafal Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Soren S. Jorvang
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *          This product includes software developed for the
18  *          NetBSD Project.  See http://www.netbsd.org/ for
19  *          information about NetBSD.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/time.h>
38 #include <sys/systm.h>
39 #include <sys/errno.h>
40 #include <sys/device.h>
41 
42 #include <uvm/uvm_extern.h>
43 
44 #define _SGIMIPS_BUS_DMA_PRIVATE
45 #include <machine/bus.h>
46 #include <machine/intr.h>
47 
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcidevs.h>
51 
52 /*
53  * PCI doesn't have any special needs; just use
54  * the generic versions of these functions.
55  */
56 struct sgimips_bus_dma_tag pci_bus_dma_tag = {
57 	_bus_dmamap_create,
58 	_bus_dmamap_destroy,
59 	_bus_dmamap_load,
60 	_bus_dmamap_load_mbuf,
61 	_bus_dmamap_load_uio,
62 	_bus_dmamap_load_raw,
63 	_bus_dmamap_unload,
64 	_bus_dmamap_sync,
65 	_bus_dmamem_alloc,
66 	_bus_dmamem_free,
67 	_bus_dmamem_map,
68 	_bus_dmamem_unmap,
69 	_bus_dmamem_mmap,
70 };
71 
72 void
73 pci_attach_hook(parent, self, pba)
74 	struct device *parent, *self;
75 	struct pcibus_attach_args *pba;
76 {
77 	/* XXX */
78 
79 	return;
80 }
81 
82 int
83 pci_bus_maxdevs(pc, busno)
84 	pci_chipset_tag_t pc;
85 	int busno;
86 {
87 	return 5;	/* 2 on-board SCSI chips, slots 0, 1 and 2 */
88 }
89 
90 pcitag_t
91 pci_make_tag(pc, bus, device, function)
92 	pci_chipset_tag_t pc;
93 	int bus, device, function;
94 {
95 	return (bus << 16) | (device << 11) | (function << 8);
96 }
97 
98 void
99 pci_decompose_tag(pc, tag, bp, dp, fp)
100 	pci_chipset_tag_t pc;
101 	pcitag_t tag;
102 	int *bp, *dp, *fp;
103 {
104 	if (bp != NULL)
105 		*bp = (tag >> 16) & 0xff;
106 	if (dp != NULL)
107 		*dp = (tag >> 11) & 0x1f;
108 	if (fp != NULL)
109 		*fp = (tag >> 8) & 0x07;
110 }
111 
112 pcireg_t
113 pci_conf_read(pc, tag, reg)
114 	pci_chipset_tag_t pc;
115 	pcitag_t tag;
116 	int reg;
117 {
118 	return (*pc->pc_conf_read)(pc, tag, reg);
119 }
120 
121 void
122 pci_conf_write(pc, tag, reg, data)
123 	pci_chipset_tag_t pc;
124 	pcitag_t tag;
125 	int reg;
126 	pcireg_t data;
127 {
128 	(*pc->pc_conf_write)(pc, tag, reg, data);
129 }
130 
131 int
132 pci_intr_map(pa, ihp)
133 	struct pci_attach_args *pa;
134 	pci_intr_handle_t *ihp;
135 {
136 	pci_chipset_tag_t pc = pa->pa_pc;
137 	pcitag_t intrtag = pa->pa_intrtag;
138 	int pin = pa->pa_intrpin;
139 	int bus, dev, func, start;
140 
141 	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
142 
143 	if (dev < 3 && pin != PCI_INTERRUPT_PIN_A)
144 		panic("SCSI0 and SCSI1 must be hardwired!");
145 
146 	switch (pin) {
147 	case PCI_INTERRUPT_PIN_NONE:
148 		return -1;
149 
150 	case PCI_INTERRUPT_PIN_A:
151 		/*
152 		 * Each of SCSI{0,1}, & slots 0 - 2 has dedicated interrupt
153 		 * for pin A?
154 		 */
155 		*ihp = dev + 7;
156 		return 0;
157 
158 	case PCI_INTERRUPT_PIN_B:
159 		start = 0;
160 		break;
161 	case PCI_INTERRUPT_PIN_C:
162 		start = 1;
163 		break;
164 	case PCI_INTERRUPT_PIN_D:
165 		start = 2;
166 		break;
167 	}
168 
169 	/* Pins B,C,D are mapped to PCI_SHARED0 - PCI_SHARED2 interrupts */
170 	*ihp = 13 /* PCI_SHARED0 */ + (start + dev - 3) % 3;
171 	return 0;
172 }
173 
174 const char *
175 pci_intr_string(pc, ih)
176 	pci_chipset_tag_t pc;
177 	pci_intr_handle_t ih;
178 {
179 	static char irqstr[32];
180 
181 	sprintf(irqstr, "crime interrupt %d", ih);
182 	return irqstr;
183 }
184 
185 const struct evcnt *
186 pci_intr_evcnt(pc, ih)
187 	pci_chipset_tag_t pc;
188 	pci_intr_handle_t ih;
189 {
190 
191 	/* XXX for now, no evcnt parent reported */
192 	return NULL;
193 }
194 
195 extern void *	crime_intr_establish(int, int, int, int (*)(void *), void *);
196 
197 void *
198 pci_intr_establish(pc, ih, level, func, arg)
199 	pci_chipset_tag_t pc;
200 	pci_intr_handle_t ih;
201 	int level, (*func)(void *);
202 	void *arg;
203 {
204 	return crime_intr_establish(ih, 0, 0, func, arg);
205 }
206 
207 void
208 pci_intr_disestablish(pc, cookie)
209 	pci_chipset_tag_t pc;
210 	void *cookie;
211 {
212 	panic("pci_intr_disestablish: not implemented");
213 
214 	return;
215 }
216