1 /* $NetBSD: oioc.c,v 1.3 2012/10/27 17:18:10 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2009 Stephen M. Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* 28 * IOC1/IOC2 chips on IP4 and IP6/IP10 machines. This interfaces the SCSI 29 * and Ethernet controllers, performs DMA for the former, and does address 30 * space translation for the latter (maps the lance memory space to physical 31 * pages). 32 * 33 * 'I/O Controller' is a sufficiently generic name that SGI created another 34 * one for IP24, which basically stuffed a bunch of miscellany on an ASIC. 35 * So, we'll call ourselves 'Old IOC' and hope that there wasn't an even older 36 * one. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: oioc.c,v 1.3 2012/10/27 17:18:10 chs Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/device.h> 44 45 #define _SGIMIPS_BUS_DMA_PRIVATE 46 #include <machine/cpu.h> 47 #include <machine/locore.h> 48 #include <machine/autoconf.h> 49 #include <sys/bus.h> 50 #include <machine/machtype.h> 51 #include <machine/sysconf.h> 52 53 #include <sgimips/ioc/oiocreg.h> 54 #include <sgimips/ioc/oiocvar.h> 55 56 #include "locators.h" 57 58 struct oioc_softc { 59 int sc_burst_dma; 60 61 bus_space_tag_t sc_iot; 62 bus_space_handle_t sc_ioh; 63 }; 64 65 static int oioc_match(device_t, cfdata_t, void *); 66 static void oioc_attach(device_t, device_t, void *); 67 static int oioc_print(void *, const char *); 68 69 CFATTACH_DECL_NEW(oioc, sizeof(struct oioc_softc), 70 oioc_match, oioc_attach, NULL, NULL); 71 72 struct oioc_device { 73 const char *od_name; 74 int od_irq; 75 } oioc_devices[] = { 76 { "oiocsc", 4 }, 77 { "le", 5 }, 78 { NULL, 0 } 79 }; 80 81 static int 82 oioc_match(device_t parent, cfdata_t match, void *aux) 83 { 84 85 switch(mach_type) { 86 case MACH_SGI_IP4: 87 case MACH_SGI_IP6 | MACH_SGI_IP10: 88 return (1); 89 } 90 91 return (0); 92 } 93 94 static void 95 oioc_attach(device_t parent, device_t self, void *aux) 96 { 97 struct oioc_softc *sc = device_private(self); 98 struct mainbus_attach_args *ma = aux; 99 uint32_t reg1, reg2; 100 int oiocrev, i; 101 102 sc->sc_iot = SGIMIPS_BUS_SPACE_NORMAL; 103 if (bus_space_map(sc->sc_iot, ma->ma_addr, 0, 104 BUS_SPACE_MAP_LINEAR, &sc->sc_ioh)) 105 panic("oioc_attach: could not allocate memory\n"); 106 107 if (platform.badaddr((void *)MIPS_PHYS_TO_KSEG1(ma->ma_addr + 108 OIOC2_CONFIG), 4)) 109 oiocrev = 1; 110 else 111 oiocrev = 2; 112 113 printf("\noioc0: Old SGI IOC%d\n", oiocrev); 114 115 if (oiocrev == 2) { 116 char buf[64]; 117 118 /* Try to enable burst mode. If we can't, we can't... */ 119 reg1 = 12 << OIOC2_CONFIG_HIWAT_SHFT; 120 reg1 |= OIOC2_CONFIG_BURST_MASK; 121 bus_space_write_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG, reg1); 122 DELAY(1000); 123 reg2 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG); 124 if ((reg2 & (reg1 | OIOC2_CONFIG_NOSYNC_MASK)) == reg1) 125 sc->sc_burst_dma = 1; 126 127 snprintb(buf, sizeof(buf), 128 "\177\020" 129 "f\0\4HIWAT\0" 130 "f\4\2ID\0" 131 "b\6NOSYNC\0" 132 "b\7BURST\0" 133 "f\x8\7COUNT\0" 134 "f\x10\6SCP\0" 135 "f\x1c\4IOP\0\0", 136 (u_quad_t)reg2 & 0xffffffff); 137 printf("oioc0: %s\n", buf); 138 } 139 140 printf("oioc0: Burst DMA %ssupported\n", 141 (sc->sc_burst_dma) ? "" : "not "); 142 143 for (i = 0; oioc_devices[i].od_name != NULL; i++) { 144 struct oioc_attach_args oa; 145 146 oa.oa_name = oioc_devices[i].od_name; 147 oa.oa_irq = oioc_devices[i].od_irq; 148 oa.oa_burst_dma = sc->sc_burst_dma; 149 oa.oa_st = SGIMIPS_BUS_SPACE_NORMAL; 150 oa.oa_sh = sc->sc_ioh; 151 oa.oa_dmat = &sgimips_default_bus_dma_tag; 152 config_found_ia(self, "oioc", &oa, oioc_print); 153 } 154 } 155 156 static int 157 oioc_print(void *aux, const char *pnp) 158 { 159 struct oioc_attach_args *oa = aux; 160 161 if (pnp) 162 printf("%s at %s", oa->oa_name, pnp); 163 164 return (UNCONF); 165 } 166