xref: /netbsd-src/sys/arch/sgimips/ioc/ioc.c (revision 53b02e147d4ed531c0d2a5ca9b3e8026ba3e99b5)
1 /* $NetBSD: ioc.c,v 1.13 2021/08/07 16:19:04 thorpej Exp $	 */
2 
3 /*
4  * Copyright (c) 2003 Christopher Sekiya
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *          This product includes software developed for the
18  *          NetBSD Project.  See http://www.NetBSD.org/ for
19  *          information about NetBSD.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /*
36  * ip20/22/24 I/O Controller (IOC)
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: ioc.c,v 1.13 2021/08/07 16:19:04 thorpej Exp $");
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 #include <sys/callout.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/ioctl.h>
50 #include <sys/errno.h>
51 #include <sys/syslog.h>
52 
53 #include <uvm/uvm_extern.h>
54 
55 #include <sys/bus.h>
56 #include <machine/cpu.h>
57 #include <machine/locore.h>
58 #include <machine/autoconf.h>
59 #include <machine/machtype.h>
60 
61 #include <sgimips/ioc/iocreg.h>
62 #include <sgimips/ioc/iocvar.h>
63 
64 #include "locators.h"
65 
66 struct ioc_softc {
67 	bus_space_tag_t sc_iot;
68 	bus_space_handle_t sc_ioh;
69 };
70 
71 static int      ioc_match(device_t, cfdata_t, void *);
72 static void     ioc_attach(device_t, device_t, void *);
73 #if defined(notyet)
74 static int      ioc_print(void *, const char *);
75 static int      ioc_search(device_t, cfdata_t, const int *, void *);
76 #endif
77 
78 CFATTACH_DECL_NEW(ioc, sizeof(struct ioc_softc),
79 	      ioc_match, ioc_attach, NULL, NULL);
80 
81 #if defined(BLINK)
82 static callout_t ioc_blink_ch;
83 static void     ioc_blink(void *);
84 #endif
85 
86 static int
87 ioc_match(device_t parent, cfdata_t match, void *aux)
88 {
89 	if (mach_type == MACH_SGI_IP22)
90 		return 1;
91 
92 	return 0;
93 }
94 
95 static void
96 ioc_attach(device_t parent, device_t self, void *aux)
97 {
98 	struct ioc_softc *sc = device_private(self);
99 	struct mainbus_attach_args *maa = aux;
100 	u_int32_t       sysid;
101 
102 #ifdef BLINK
103 	callout_init(&ioc_blink_ch, 0);
104 #endif
105 
106 	sc->sc_iot = normal_memt;
107 
108 	if (bus_space_map(sc->sc_iot, maa->ma_addr, 0x100,
109 			  BUS_SPACE_MAP_LINEAR, &sc->sc_ioh))
110 		panic("ioc_attach: could not allocate memory\n");
111 
112 	sysid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOC_SYSID) & 0x01;
113 
114 	if (sysid)
115 		mach_subtype = MACH_SGI_IP22_FULLHOUSE;
116 	else
117 		mach_subtype = MACH_SGI_IP22_GUINNESS;
118 
119 	aprint_normal(": rev %d, machine %s, board rev %d\n",
120 		   ((sysid & IOC_SYSID_CHIPREV) >> IOC_SYSID_CHIPREV_SHIFT),
121 		    (sysid & IOC_SYSID_SYSTYPE) ? "Indigo2 (Fullhouse)" :
122 		    "Indy (Guinness)",
123 		   ((sysid & IOC_SYSID_BOARDREV) >> IOC_SYSID_BOARDREV_SHIFT));
124 
125 	/* Reset IOC */
126 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_RESET,
127 			  IOC_RESET_PARALLEL | IOC_RESET_PCKBC |
128 			  IOC_RESET_EISA | IOC_RESET_ISDN |
129 			  IOC_RESET_LED_GREEN );
130 
131 	/*
132          * Set the 10BaseT port to use UTP cable, set autoselect mode for
133          * the ethernet interface (AUI vs. TP), set the two serial ports
134          * to PC mode.
135          */
136 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_WRITE,
137 			  IOC_WRITE_ENET_AUTO | IOC_WRITE_ENET_UTP |
138 			  IOC_WRITE_PC_UART2 | IOC_WRITE_PC_UART1);
139 
140 /* XXX: the firmware should have taken care of this already */
141 #if 0
142 	if (mach_subtype == MACH_SGI_IP22_GUINNESS) {
143 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_GCSEL, 0xff);
144 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_GCREG, 0xff);
145 	}
146 #endif
147 
148 #if defined(BLINK)
149 	ioc_blink(sc);
150 #endif
151 
152 #if defined(notyet)
153 	/*
154 	 * pckbc, zstty, and lpt should attach under the IOC.  This begs the
155 	 * question of how we sort things out with ip20, which has no IOC.
156 	 * For now, we pretend that everything attaches at HPC and ignore
157 	 * the IOC.
158 	 */
159 
160 	config_search(self, NULL,
161 	    CFARGS(.search = ioc_search));
162 #endif
163 }
164 
165 #if defined(notyet)
166 static int
167 ioc_print(void *aux, const char *pnp)
168 {
169 	struct ioc_attach_args *iaa = aux;
170 
171 	if (pnp != 0)
172 		return QUIET;
173 
174 	if (iaa->iaa_offset != IOCCF_OFFSET_DEFAULT)
175 		aprint_normal(" offset 0x%lx", iaa->iaa_offset);
176 	if (iaa->iaa_intr != IOCCF_INTR_DEFAULT)
177 		aprint_normal(" intr %d", iaa->iaa_intr);
178 
179 	return UNCONF;
180 }
181 
182 static int
183 ioc_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
184 {
185 	struct ioc_softc *sc = device_private(parent);
186 	struct ioc_attach_args iaa;
187 	int             tryagain;
188 
189 	do {
190 		iaa.iaa_offset = cf->cf_loc[IOCCF_OFFSET];
191 		iaa.iaa_intr = cf->cf_loc[IOCCF_INTR];
192 		iaa.iaa_st = normal_memt;
193 		iaa.iaa_sh = sc->sc_ioh;	/* XXX */
194 
195 		tryagain = 0;
196 		if (config_probe(parent, cf, &iaa)) {
197 			config_attach(parent, cf, &iaa, ioc_print, CFARGS_NONE);
198 			tryagain = (cf->cf_fstate == FSTATE_STAR);
199 		}
200 	} while (tryagain);
201 
202 	return 0;
203 }
204 #endif
205 
206 #if defined(BLINK)
207 static void
208 ioc_blink(void *self)
209 {
210 	struct ioc_softc *sc = device_private(self);
211 	register int    s;
212 	int             value;
213 
214 	s = splhigh();
215 
216 	/* This is a bit odd.  To strobe the green LED, we have to toggle the
217 	   red control bit. */
218 
219 	value = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOC_RESET) & 0xff;
220 	value ^= IOC_RESET_LED_RED;
221 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_RESET, value);
222 	splx(s);
223 	/*
224 	 * Blink rate is:
225 	 *      full cycle every second if completely idle (loadav = 0)
226 	 *      full cycle every 2 seconds if loadav = 1
227 	 *      full cycle every 3 seconds if loadav = 2
228 	 * etc.
229 	 */
230 	s = (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1));
231 	callout_reset(&ioc_blink_ch, s, ioc_blink, sc);
232 
233 }
234 #endif
235