xref: /netbsd-src/sys/arch/sgimips/ioc/ioc.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /* $NetBSD: ioc.c,v 1.1 2003/12/15 10:23:52 sekiya Exp $	 */
2 
3 /*
4  * Copyright (c) 2003 Christopher Sekiya
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *          This product includes software developed for the
18  *          NetBSD Project.  See http://www.NetBSD.org/ for
19  *          information about NetBSD.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /*
36  * ip20/22/24 I/O Controller (IOC)
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: ioc.c,v 1.1 2003/12/15 10:23:52 sekiya Exp $");
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 #include <sys/callout.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/ioctl.h>
50 #include <sys/errno.h>
51 #include <sys/syslog.h>
52 
53 #include <uvm/uvm_extern.h>
54 
55 #include <machine/bus.h>
56 #include <machine/cpu.h>
57 #include <machine/locore.h>
58 #include <machine/autoconf.h>
59 #include <machine/machtype.h>
60 
61 #include <sgimips/ioc/iocreg.h>
62 #include <sgimips/ioc/iocvar.h>
63 
64 #include "locators.h"
65 
66 struct ioc_softc {
67 	struct device   sc_dev;
68 
69 	bus_space_tag_t sc_iot;
70 	bus_space_handle_t sc_ioh;
71 };
72 
73 static int      ioc_match(struct device *, struct cfdata *, void *);
74 static void     ioc_attach(struct device *, struct device *, void *);
75 #if defined(notyet)
76 static int      ioc_print(void *, const char *);
77 static int      ioc_search(struct device *, struct cfdata *, void *);
78 #endif
79 
80 CFATTACH_DECL(ioc, sizeof(struct ioc_softc),
81 	      ioc_match, ioc_attach, NULL, NULL);
82 
83 #if defined(BLINK)
84 static struct callout ioc_blink_ch = CALLOUT_INITIALIZER;
85 static void     ioc_blink(void *);
86 #endif
87 
88 static int
89 ioc_match(struct device * parent, struct cfdata * match, void *aux)
90 {
91 	if (mach_type == MACH_SGI_IP22)
92 		return 1;
93 
94 	return 0;
95 }
96 
97 static void
98 ioc_attach(struct device * parent, struct device * self, void *aux)
99 {
100 	struct ioc_softc *sc = (struct ioc_softc *) self;
101 	struct mainbus_attach_args *maa = aux;
102 	u_int32_t       sysid;
103 
104 	sc->sc_iot = SGIMIPS_BUS_SPACE_HPC;
105 
106 	if (bus_space_map(sc->sc_iot, maa->ma_addr, 0,
107 			  BUS_SPACE_MAP_LINEAR, &sc->sc_ioh))
108 		panic("ioc_attach: could not allocate memory\n");
109 
110 	sysid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOC_SYSID) & 0x01;
111 
112 	if (sysid)
113 		mach_subtype = MACH_SGI_IP22_FULLHOUSE;
114 	else
115 		mach_subtype = MACH_SGI_IP22_GUINESS;
116 
117 	aprint_normal(": rev %d, machine %s, board rev %d\n",
118 		   ((sysid & IOC_SYSID_CHIPREV) >> IOC_SYSID_CHIPREV_SHIFT),
119 		    (sysid & IOC_SYSID_SYSTYPE) ? "Indigo2 (Fullhouse)" : "Indy (Guiness)",
120 		   ((sysid & IOC_SYSID_BOARDREV) >> IOC_SYSID_BOARDREV_SHIFT));
121 
122 	/* Reset IOC */
123 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_RESET,
124 			  IOC_RESET_PARALLEL | IOC_RESET_PCKBC |
125 			  IOC_RESET_EISA | IOC_RESET_ISDN |
126 			  IOC_RESET_LED_GREEN );
127 
128 	/*
129          * Set the 10BaseT port to use UTP cable, set autoselect mode for
130          * the ethernet interface (AUI vs. TP), set the two serial ports
131          * to PC mode.
132          */
133 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_WRITE,
134 			  IOC_WRITE_ENET_AUTO | IOC_WRITE_ENET_UTP |
135 			  IOC_WRITE_PC_UART2 | IOC_WRITE_PC_UART1);
136 
137 	if (mach_subtype == MACH_SGI_IP22_GUINESS) {
138 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_GCSEL, 0xff);
139 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_GCREG, 0xff);
140 	}
141 
142 #if defined(BLINK)
143 	ioc_blink(sc);
144 #endif
145 
146 #if defined(notyet)
147 	/*
148 	 * pckbc, zstty, and lpt should attach under the IOC.  This begs the
149 	 * question of how we sort things out with ip20, which has no IOC.
150 	 * For now, we pretend that everything attaches at HPC and ignore
151 	 * the IOC.
152 	 */
153 
154 	config_search(ioc_search, self, NULL);
155 #endif
156 }
157 
158 #if defined(notyet)
159 static int
160 ioc_print(void *aux, const char *pnp)
161 {
162 	struct ioc_attach_args *iaa = aux;
163 
164 	if (pnp != 0)
165 		return QUIET;
166 
167 	if (iaa->iaa_offset != IOCCF_OFFSET_DEFAULT)
168 		aprint_normal(" offset 0x%lx", iaa->iaa_offset);
169 	if (iaa->iaa_intr != IOCCF_INTR_DEFAULT)
170 		aprint_normal(" intr %d", iaa->iaa_intr);
171 
172 	return UNCONF;
173 }
174 
175 static int
176 ioc_search(struct device * parent, struct cfdata * cf, void *aux)
177 {
178 	struct ioc_softc *sc = (struct ioc_softc *) parent;
179 	struct ioc_attach_args iaa;
180 	int             tryagain;
181 
182 	do {
183 		iaa.iaa_offset = cf->cf_loc[IOCCF_OFFSET];
184 		iaa.iaa_intr = cf->cf_loc[IOCCF_INTR];
185 		iaa.iaa_st = SGIMIPS_BUS_SPACE_HPC;
186 		iaa.iaa_sh = sc->sc_ioh;	/* XXX */
187 
188 		tryagain = 0;
189 		if (config_match(parent, cf, &iaa) > 0) {
190 			config_attach(parent, cf, &iaa, ioc_print);
191 			tryagain = (cf->cf_fstate == FSTATE_STAR);
192 		}
193 	} while (tryagain);
194 
195 	return 0;
196 }
197 #endif
198 
199 #if defined(BLINK)
200 static void
201 ioc_blink(void *self)
202 {
203 	struct ioc_softc *sc = (struct ioc_softc *) self;
204 	register int    s;
205 	int             value;
206 
207 	s = splhigh();
208 
209 	/* This is a bit odd.  To strobe the green LED, we have to toggle the
210 	   red control bit. */
211 
212 	value = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOC_RESET) & 0xff;
213 	value ^= IOC_RESET_LED_RED;
214 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOC_RESET, value);
215 	splx(s);
216 	/*
217 	 * Blink rate is:
218 	 *      full cycle every second if completely idle (loadav = 0)
219 	 *      full cycle every 2 seconds if loadav = 1
220 	 *      full cycle every 3 seconds if loadav = 2
221 	 * etc.
222 	 */
223 	s = (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1));
224 	callout_reset(&ioc_blink_ch, s, ioc_blink, sc);
225 
226 }
227 #endif
228