xref: /netbsd-src/sys/arch/sgimips/include/intr.h (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: intr.h,v 1.17 2004/07/07 00:08:43 sekiya Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Soren S. Jorvang
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *          This product includes software developed for the
18  *          NetBSD Project.  See http://www.NetBSD.org/ for
19  *          information about NetBSD.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #ifndef	_SGIMIPS_INTR_H_
36 #define	_SGIMIPS_INTR_H_
37 
38 #define	IPL_NONE	0	/* Disable only this interrupt. */
39 #define	IPL_BIO		1	/* Disable block I/O interrupts. */
40 #define	IPL_NET		2	/* Disable network interrupts. */
41 #define	IPL_TTY		3	/* Disable terminal interrupts. */
42 #define	IPL_CLOCK	4	/* Disable clock interrupts. */
43 #define	IPL_STATCLOCK	5	/* Disable profiling interrupts. */
44 #ifndef __NO_SOFT_SERIAL_INTERRUPT
45 #define	IPL_SERIAL	6	/* Disable serial hardware interrupts. */
46 #endif
47 #define	IPL_HIGH	7	/* Disable all interrupts. */
48 #define NIPL		8
49 
50 /* Interrupt sharing types. */
51 #define IST_NONE	0	/* none */
52 #define IST_PULSE	1	/* pulsed */
53 #define IST_EDGE	2	/* edge-triggered */
54 #define IST_LEVEL	3	/* level-triggered */
55 
56 /* Soft interrupt numbers */
57 #define	IPL_SOFT	0	/* generic software interrupts */
58 #define	IPL_SOFTSERIAL	1	/* serial software interrupts */
59 #define	IPL_SOFTNET	2	/* network software interrupts */
60 #define	IPL_SOFTCLOCK	3	/* clock software interrupts */
61 #define	_IPL_NSOFT	4
62 
63 #define	IPL_SOFTNAMES {							\
64 	"misc",								\
65 	"serial",							\
66 	"net",								\
67 	"clock",							\
68 }
69 
70 #ifdef _KERNEL
71 #ifndef _LOCORE
72 
73 #include <sys/queue.h>
74 #include <sys/types.h>
75 #include <sys/device.h>
76 #include <mips/cpuregs.h>
77 
78 #define NINTR	32
79 
80 struct sgimips_intrhand {
81 	LIST_ENTRY(sgimips_intrhand)
82 		ih_q;
83 	int	(*ih_fun) (void *);
84 	void	 *ih_arg;
85 	struct	sgimips_intr *ih_intrhead;
86 	struct	sgimips_intrhand *ih_next;
87 	int	ih_pending;
88 };
89 
90 struct sgimips_intr {
91 	LIST_HEAD(,sgimips_intrhand)
92 		intr_q;
93 	struct	evcnt ih_evcnt;
94 	unsigned long intr_ipl;
95 };
96 
97 extern struct sgimips_intrhand intrtab[];
98 
99 extern int		_splraise(int);
100 extern int		_spllower(int);
101 extern int		_splset(int);
102 extern int		_splget(void);
103 extern void		_splnone(void);
104 extern void		_setsoftintr(int);
105 extern void		_clrsoftintr(int);
106 
107 extern u_int32_t 	biomask;
108 extern u_int32_t 	netmask;
109 extern u_int32_t 	ttymask;
110 extern u_int32_t 	clockmask;
111 
112 #define splhigh()	_splraise(MIPS_INT_MASK)
113 #define spl0()		(void)_spllower(0)
114 #define splx(s)		(void)_splset(s)
115 #define splbio()	_splraise(biomask)
116 #define splnet()	_splraise(netmask)
117 #define spltty()	_splraise(ttymask)
118 #define splvm()		spltty()
119 #define splclock()	_splraise(clockmask)
120 #define splstatclock()	splclock()
121 
122 #define	splsched()	splhigh()
123 #define	spllock()	splhigh()
124 #define splserial()	spltty()
125 #define spllpt()	spltty()
126 
127 #define splsoft()	_splraise(MIPS_SOFT_INT_MASK_1)
128 #define splsoftclock()	splsoft()
129 #define splsoftnet()	splsoft()
130 
131 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_1)
132 
133 extern void *		cpu_intr_establish(int, int, int (*)(void *), void *);
134 
135 #include <mips/softintr.h>
136 
137 #endif /* _LOCORE */
138 #endif /* !_KERNEL */
139 
140 #endif	/* !_SGIMIPS_INTR_H_ */
141