1 /* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:10:01 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _SGIMIPS_BUS_DEFS_H_ 34 #define _SGIMIPS_BUS_DEFS_H_ 35 36 #include <mips/locore.h> 37 38 #define __BUS_SPACE_HAS_STREAM_METHODS 39 40 /* 41 * Utility macros; do not use outside this file. 42 */ 43 #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS) 44 #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 45 46 /* 47 * Bus address and size types 48 */ 49 typedef uint64_t bus_addr_t; 50 typedef uint64_t bus_size_t; 51 52 /* 53 * Access methods for bus resources and address space. 54 */ 55 typedef int bus_space_tag_t; 56 typedef u_long bus_space_handle_t; 57 58 /* 59 * Values for sgimips bus space tag, not to be used directly by MI code. 60 */ 61 #define SGIMIPS_BUS_SPACE_NORMAL 0 62 #define SGIMIPS_BUS_SPACE_IP6_DPCLOCK 1 63 #define SGIMIPS_BUS_SPACE_HPC 2 64 #define SGIMIPS_BUS_SPACE_MEM 3 65 #define SGIMIPS_BUS_SPACE_MACE 4 66 #define SGIMIPS_BUS_SPACE_IO 5 67 #define SGIMIPS_BUS_SPACE_CRIME 6 68 69 /* 70 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 71 * bus_size_t size, int flags, bus_space_handle_t *bshp); 72 * 73 * Map a region of bus space. 74 */ 75 76 #define BUS_SPACE_MAP_CACHEABLE 0x01 77 #define BUS_SPACE_MAP_LINEAR 0x02 78 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 79 80 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 81 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 82 83 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 84 85 /* 86 * Flags used in various bus DMA methods. 87 */ 88 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 89 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 90 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 91 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 92 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 93 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 94 #define BUS_DMA_BUS2 0x020 95 #define BUS_DMA_BUS3 0x040 96 #define BUS_DMA_BUS4 0x080 97 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 98 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 99 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 100 101 #define SGIMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 102 103 /* Forwards needed by prototypes below. */ 104 struct mbuf; 105 struct uio; 106 107 /* 108 * Operations performed by bus_dmamap_sync(). 109 */ 110 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 111 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 112 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 113 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 114 115 typedef struct sgimips_bus_dma_tag *bus_dma_tag_t; 116 typedef struct sgimips_bus_dmamap *bus_dmamap_t; 117 118 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 119 120 /* 121 * bus_dma_segment_t 122 * 123 * Describes a single contiguous DMA transaction. Values 124 * are suitable for programming into DMA registers. 125 */ 126 struct sgimips_bus_dma_segment { 127 bus_addr_t ds_addr; /* DMA address */ 128 bus_size_t ds_len; /* length of transfer */ 129 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */ 130 }; 131 typedef struct sgimips_bus_dma_segment bus_dma_segment_t; 132 133 /* 134 * bus_dma_tag_t 135 * 136 * A machine-dependent opaque type describing the implementation of 137 * DMA for a given bus. 138 */ 139 140 struct sgimips_bus_dma_tag { 141 /* 142 * XXX soren O2: 0x40000000 143 * ikke endnu (bus.c) 144 */ 145 #if 0 146 bus_addr_t _wbase; /* DMA window base */ 147 bus_addr_t _wbase_swap; /* DMA window base (byteswapped) */ 148 #endif 149 150 /* 151 * DMA mapping methods. 152 */ 153 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 154 bus_size_t, bus_size_t, int, bus_dmamap_t *); 155 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 156 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 157 bus_size_t, struct proc *, int); 158 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 159 struct mbuf *, int); 160 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 161 struct uio *, int); 162 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 163 bus_dma_segment_t *, int, bus_size_t, int); 164 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 165 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 166 bus_addr_t, bus_size_t, int); 167 168 /* 169 * DMA memory utility functions. 170 */ 171 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 172 bus_size_t, bus_dma_segment_t *, int, int *, int); 173 void (*_dmamem_free)(bus_dma_tag_t, 174 bus_dma_segment_t *, int); 175 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 176 int, size_t, void **, int); 177 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 178 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 179 int, off_t, int, int); 180 }; 181 182 /* 183 * bus_dmamap_t 184 * 185 * Describes a DMA mapping. 186 */ 187 struct sgimips_bus_dmamap { 188 /* 189 * PRIVATE MEMBERS: not for use my machine-independent code. 190 */ 191 bus_size_t _dm_size; /* largest DMA transfer mappable */ 192 int _dm_segcnt; /* number of segs this map can map */ 193 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 194 bus_size_t _dm_boundary; /* don't cross this */ 195 int _dm_flags; /* misc. flags */ 196 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 197 198 /* 199 * PUBLIC MEMBERS: these are used by machine-independent code. 200 */ 201 bus_size_t dm_maxsegsz; /* largest possible segment */ 202 bus_size_t dm_mapsize; /* size of the mapping */ 203 int dm_nsegs; /* # valid segments in mapping */ 204 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 205 }; 206 207 #endif /* _SGIMIPS_BUS_DEFS_H_ */ 208