1 /* $NetBSD: wdsc.c,v 1.24 2008/04/28 20:23:34 martin Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Wayne Knowles 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Wayne Knowles 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: wdsc.c,v 1.24 2008/04/28 20:23:34 martin Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 #include <sys/buf.h> 40 41 #include <dev/scsipi/scsi_all.h> 42 #include <dev/scsipi/scsipi_all.h> 43 #include <dev/scsipi/scsiconf.h> 44 45 #include <machine/cpu.h> 46 #include <machine/bus.h> 47 #include <machine/autoconf.h> 48 #include <machine/machtype.h> 49 #include <machine/sysconf.h> 50 51 #include <sgimips/hpc/hpcvar.h> 52 #include <sgimips/hpc/hpcreg.h> 53 #include <sgimips/hpc/hpcdma.h> 54 55 #include <dev/ic/wd33c93reg.h> 56 #include <dev/ic/wd33c93var.h> 57 58 #include <opt_kgdb.h> 59 #include <sys/kgdb.h> 60 61 struct wdsc_softc { 62 struct wd33c93_softc sc_wd33c93; /* Must be first */ 63 struct evcnt sc_intrcnt; /* Interrupt counter */ 64 bus_dma_tag_t sc_dmat; 65 bus_dmamap_t sc_dmamap; 66 int sc_flags; 67 #define WDSC_DMA_ACTIVE 0x1 68 #define WDSC_DMA_MAPLOADED 0x2 69 struct hpc_dma_softc sc_hpcdma; 70 }; 71 72 73 void wdsc_attach (struct device *, struct device *, void *); 74 int wdsc_match (struct device *, struct cfdata *, void *); 75 76 CFATTACH_DECL(wdsc, sizeof(struct wdsc_softc), 77 wdsc_match, wdsc_attach, NULL, NULL); 78 79 int wdsc_dmasetup (struct wd33c93_softc *, void **,size_t *, 80 int, size_t *); 81 int wdsc_dmago (struct wd33c93_softc *); 82 void wdsc_dmastop (struct wd33c93_softc *); 83 void wdsc_reset (struct wd33c93_softc *); 84 int wdsc_dmaintr (void *); 85 int wdsc_scsiintr (void *); 86 87 /* 88 * Match for SCSI devices on the onboard and GIO32 adapter WD33C93 chips 89 */ 90 int 91 wdsc_match(struct device *pdp, struct cfdata *cf, void *auxp) 92 { 93 struct hpc_attach_args *haa = auxp; 94 95 if (strcmp(haa->ha_name, cf->cf_name) == 0) { 96 uint32_t reset, asr, reg; 97 98 reset = MIPS_PHYS_TO_KSEG1(haa->ha_sh + haa->ha_dmaoff + 99 haa->hpc_regs->scsi0_ctl); 100 asr = MIPS_PHYS_TO_KSEG1(haa->ha_sh + haa->ha_devoff); 101 102 /* XXX: hpc1 offset due to SGIMIPS_BUS_SPACE_HPC brain damage */ 103 asr = (asr + 3) & ~0x3; 104 105 if (platform.badaddr((void *)reset, sizeof(reset))) 106 return (0); 107 108 *(volatile uint32_t *)reset = haa->hpc_regs->scsi_dmactl_reset; 109 delay(1000); 110 *(volatile uint32_t *)reset = 0x0; 111 112 if (platform.badaddr((void *)asr, sizeof(asr))) 113 return (0); 114 115 reg = *(volatile uint32_t *)asr; 116 if (haa->hpc_regs->revision == 3) { 117 if ((reg & 0xff) == SBIC_ASR_INT) 118 return (1); 119 } else { 120 if (((reg >> 8) & 0xff) == SBIC_ASR_INT) 121 return (1); 122 } 123 } 124 125 return (0); 126 } 127 128 /* 129 * Attach the wdsc driver 130 */ 131 void 132 wdsc_attach(struct device *pdp, struct device *dp, void *auxp) 133 { 134 struct wd33c93_softc *sc = (void *)dp; 135 struct wdsc_softc *wsc = (void *)dp; 136 struct hpc_attach_args *haa = auxp; 137 int err; 138 139 sc->sc_regt = haa->ha_st; 140 wsc->sc_dmat = haa->ha_dmat; 141 142 wsc->sc_hpcdma.hpc = haa->hpc_regs; 143 144 if ((err = bus_space_subregion(haa->ha_st, haa->ha_sh, 145 haa->ha_devoff, 146 wsc->sc_hpcdma.hpc->scsi0_devregs_size, 147 &sc->sc_regh)) != 0) { 148 printf(": unable to map regs, err=%d\n", err); 149 return; 150 } 151 152 if (bus_dmamap_create(wsc->sc_dmat, 153 wsc->sc_hpcdma.hpc->scsi_max_xfer, 154 wsc->sc_hpcdma.hpc->scsi_dma_segs, 155 wsc->sc_hpcdma.hpc->scsi_dma_segs_size, 156 wsc->sc_hpcdma.hpc->scsi_dma_segs_size, 157 BUS_DMA_WAITOK, 158 &wsc->sc_dmamap) != 0) { 159 printf(": failed to create dmamap\n"); 160 return; 161 } 162 163 sc->sc_dmasetup = wdsc_dmasetup; 164 sc->sc_dmago = wdsc_dmago; 165 sc->sc_dmastop = wdsc_dmastop; 166 sc->sc_reset = wdsc_reset; 167 168 sc->sc_adapter.adapt_request = wd33c93_scsi_request; 169 sc->sc_adapter.adapt_minphys = minphys; 170 171 sc->sc_id = 0; /* Host ID = 0 */ 172 sc->sc_clkfreq = 200; /* 20MHz */ 173 sc->sc_dmamode = SBIC_CTL_BURST_DMA; 174 175 evcnt_attach_dynamic(&wsc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 176 sc->sc_dev.dv_xname, "intr"); 177 178 if ((cpu_intr_establish(haa->ha_irq, IPL_BIO, 179 wdsc_scsiintr, sc)) == NULL) { 180 printf(": unable to establish interrupt!\n"); 181 return; 182 } 183 184 hpcdma_init(haa, &wsc->sc_hpcdma, wsc->sc_hpcdma.hpc->scsi_dma_segs); 185 wd33c93_attach(sc); 186 return; 187 } 188 189 /* 190 * Prime the hardware for a DMA transfer 191 * 192 * Requires splbio() interrupts to be disabled by the caller 193 */ 194 int 195 wdsc_dmasetup(struct wd33c93_softc *dev, void **addr, size_t *len, int datain, size_t *dmasize) 196 { 197 struct wdsc_softc *wsc = (void *)dev; 198 struct hpc_dma_softc *dsc = &wsc->sc_hpcdma; 199 int count, err; 200 void *vaddr; 201 202 KASSERT((wsc->sc_flags & WDSC_DMA_ACTIVE) == 0); 203 204 vaddr = *addr; 205 count = dsc->sc_dlen = *len; 206 if (count) { 207 KASSERT((wsc->sc_flags & WDSC_DMA_MAPLOADED) == 0); 208 209 /* Build list of physical addresses for this transfer */ 210 if ((err=bus_dmamap_load(wsc->sc_dmat, wsc->sc_dmamap, 211 vaddr, count, 212 NULL /* kernel address */, 213 BUS_DMA_NOWAIT)) != 0) 214 panic("%s: bus_dmamap_load err=%d", 215 dev->sc_dev.dv_xname, err); 216 217 hpcdma_sglist_create(dsc, wsc->sc_dmamap); 218 wsc->sc_flags |= WDSC_DMA_MAPLOADED; 219 220 if (datain) { 221 dsc->sc_dmacmd = 222 wsc->sc_hpcdma.hpc->scsi_dma_datain_cmd; 223 dsc->sc_flags |= HPCDMA_READ; 224 } else { 225 dsc->sc_dmacmd = 226 wsc->sc_hpcdma.hpc->scsi_dma_dataout_cmd; 227 dsc->sc_flags &= ~HPCDMA_READ; 228 } 229 } 230 return(count); 231 } 232 233 /* 234 * Prime the hardware for the next DMA transfer 235 */ 236 int 237 wdsc_dmago(struct wd33c93_softc *dev) 238 { 239 struct wdsc_softc *wsc = (void *)dev; 240 struct hpc_dma_softc *dsc = &wsc->sc_hpcdma; 241 242 if (dsc->sc_dlen == 0) 243 return(0); 244 245 KASSERT((wsc->sc_flags & WDSC_DMA_ACTIVE) == 0); 246 KASSERT((wsc->sc_flags & WDSC_DMA_MAPLOADED)); 247 248 wsc->sc_flags |= WDSC_DMA_ACTIVE; 249 250 bus_dmamap_sync(wsc->sc_dmat, wsc->sc_dmamap, 0, 251 wsc->sc_dmamap->dm_mapsize, 252 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 253 254 hpcdma_cntl(dsc, dsc->sc_dmacmd); /* Thunderbirds are go! */ 255 256 return(wsc->sc_dmamap->dm_mapsize); 257 } 258 259 /* 260 * Stop DMA and unload active DMA maps 261 */ 262 void 263 wdsc_dmastop(struct wd33c93_softc *dev) 264 { 265 struct wdsc_softc *wsc = (void *)dev; 266 struct hpc_dma_softc *dsc = &wsc->sc_hpcdma; 267 268 if (wsc->sc_flags & WDSC_DMA_ACTIVE) { 269 if (dsc->sc_flags & HPCDMA_READ) 270 hpcdma_flush(dsc); 271 hpcdma_cntl(dsc, 0); /* Stop DMA */ 272 bus_dmamap_sync(wsc->sc_dmat, wsc->sc_dmamap, 0, 273 wsc->sc_dmamap->dm_mapsize, 274 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 275 } 276 if (wsc->sc_flags & WDSC_DMA_MAPLOADED) 277 bus_dmamap_unload(wsc->sc_dmat, wsc->sc_dmamap); 278 wsc->sc_flags &= ~(WDSC_DMA_ACTIVE | WDSC_DMA_MAPLOADED); 279 } 280 281 /* 282 * Reset the controller. 283 */ 284 void 285 wdsc_reset(struct wd33c93_softc *dev) 286 { 287 struct wdsc_softc *wsc = (void *)dev; 288 struct hpc_dma_softc *dsc = &wsc->sc_hpcdma; 289 290 hpcdma_reset(dsc); 291 } 292 293 /* 294 * WD33c93 SCSI controller interrupt 295 */ 296 int 297 wdsc_scsiintr(void *arg) 298 { 299 struct wd33c93_softc *dev = arg; 300 struct wdsc_softc *wsc = arg; 301 int found; 302 303 found = wd33c93_intr(dev); 304 if (found) 305 wsc->sc_intrcnt.ev_count++; 306 return(found); 307 } 308