1 /* $NetBSD: scn.c,v 1.8 2015/04/04 14:12:40 macallan Exp $ */ 2 3 /* 4 * Resurrected from the old pc532 port 1/18/2009. 5 * 6 * XXX- The locking in this is probably totally broken. I haven't attempted 7 * to get it right, but it seems to work okay anyhow. 8 */ 9 10 /* 11 * Copyright (c) 1991, 1992, 1993 12 * The Regents of the University of California. All rights reserved. 13 * 14 * Portions of this software were developed by the Computer Systems 15 * Engineering group at Lawrence Berkeley Laboratory under DARPA 16 * contract BG 91-66 and contributed to Berkeley. 17 * 18 * All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Lawrence Berkeley Laboratory. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. Neither the name of the University nor the names of its contributors 32 * may be used to endorse or promote products derived from this software 33 * without specific prior written permission. 34 * 35 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 36 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 37 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 38 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 39 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 40 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 41 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 42 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 43 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 44 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 45 * SUCH DAMAGE. 46 * 47 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 48 */ 49 50 /* 51 * Copyright (c) 1996, 1997 Philip L. Budne. 52 * Copyright (c) 1993 Philip A. Nelson. 53 * 54 * Portions of this software were developed by the Computer Systems 55 * Engineering group at Lawrence Berkeley Laboratory under DARPA 56 * contract BG 91-66 and contributed to Berkeley. 57 * 58 * All advertising materials mentioning features or use of this software 59 * must display the following acknowledgement: 60 * This product includes software developed by the University of 61 * California, Lawrence Berkeley Laboratory. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. All advertising materials mentioning features or use of this software 72 * must display the following acknowledgement: 73 * This product includes software developed by the University of 74 * California, Berkeley and its contributors. 75 * 4. Neither the name of the University nor the names of its contributors 76 * may be used to endorse or promote products derived from this software 77 * without specific prior written permission. 78 * 79 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 80 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 82 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 85 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 86 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 87 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 88 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 89 * SUCH DAMAGE. 90 * 91 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 92 */ 93 94 #include <sys/cdefs.h> 95 __KERNEL_RCSID(0, "$NetBSD: scn.c,v 1.8 2015/04/04 14:12:40 macallan Exp $"); 96 97 #include "opt_ddb.h" 98 #include "opt_kgdb.h" 99 #include "scn.h" 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/file.h> 108 #include <sys/uio.h> 109 #include <sys/kernel.h> 110 #include <sys/syslog.h> 111 #include <sys/types.h> 112 #include <sys/device.h> 113 #include <sys/malloc.h> 114 #include <sys/conf.h> 115 #include <sys/intr.h> 116 #ifdef KGDB 117 #include <sys/kgdb.h> 118 #endif 119 #include <sys/kauth.h> 120 121 #include <dev/cons.h> 122 123 #include <machine/autoconf.h> 124 #include <machine/machtype.h> 125 126 #include <sgimips/dev/scnreg.h> 127 #include <sgimips/dev/scnvar.h> 128 129 int scn_match(device_t, struct cfdata *, void *); 130 void scn_attach(device_t, device_t, void *); 131 int scnparam(struct tty *, struct termios *); 132 void scnstart(struct tty *); 133 int scnhwiflow(struct tty *, int); 134 135 void scncnprobe(struct consdev *); 136 void scncninit(struct consdev *); 137 int scncngetc(dev_t); 138 void scncnputc(dev_t, int); 139 void scncnpollc(dev_t, int); 140 int scninit(dev_t, int); 141 void scncnreinit(void *); 142 143 CFATTACH_DECL_NEW(scn, sizeof(struct scn_softc), 144 scn_match, scn_attach, NULL, NULL); 145 146 extern struct cfdriver scn_cd; 147 148 dev_type_open(scnopen); 149 dev_type_close(scnclose); 150 dev_type_read(scnread); 151 dev_type_write(scnwrite); 152 dev_type_ioctl(scnioctl); 153 dev_type_stop(scnstop); 154 dev_type_tty(scntty); 155 dev_type_poll(scnpoll); 156 157 const struct cdevsw scn_cdevsw = { 158 .d_open = scnopen, 159 .d_close = scnclose, 160 .d_read = scnread, 161 .d_write = scnwrite, 162 .d_ioctl = scnioctl, 163 .d_stop = scnstop, 164 .d_tty = scntty, 165 .d_poll = scnpoll, 166 .d_mmap = nommap, 167 .d_kqfilter = ttykqfilter, 168 .d_discard = nodiscard, 169 .d_flag = D_TTY 170 }; 171 172 struct consdev scn_cn = { 173 scncnprobe, 174 scncninit, 175 scncngetc, 176 scncnputc, 177 scncnpollc, 178 NULL, 179 NULL, 180 NULL, 181 NODEV, 182 CN_NORMAL 183 }; 184 185 #ifndef CONSOLE_SPEED 186 #define CONSOLE_SPEED TTYDEF_SPEED 187 #endif 188 189 #ifndef SCNDEF_CFLAG 190 #define SCNDEF_CFLAG TTYDEF_CFLAG 191 #endif 192 193 #ifdef CPU30MHZ 194 #define RECOVER() __asm volatile("bispsrw 0x800" : : : "cc") 195 #else 196 #define RECOVER() 197 #endif 198 199 int scndefaultrate = TTYDEF_SPEED; 200 int scnconsrate = CONSOLE_SPEED; 201 202 static inline struct scn_softc * 203 SOFTC(int unit) 204 { 205 if (unit < 0 || unit >= scn_cd.cd_ndevs) 206 return (NULL); 207 return device_private(scn_cd.cd_devs[unit]); 208 } 209 210 static int scnintr(void *); 211 static void scnrxintr(void *); 212 static int scn_rxintr(struct scn_softc *); 213 static void scnsoft(void *); 214 static void scn_setchip(struct scn_softc *sc); 215 static int scniter(int *, int, int*, int*, struct chan *, int); 216 static int scn_config(int, int, int, int, u_char, u_char); 217 static void scn_rxenable(struct scn_softc *); 218 static void scn_rxdisable(struct scn_softc *); 219 static void dcd_int(struct scn_softc *, struct tty *, u_char); 220 static void scnoverrun(int, long *, const char *); 221 static u_char opbits(struct scn_softc *, int); 222 223 static void *scnsir = NULL; /* s/w intr cookie */ 224 #define setsoftscn() softint_schedule(scnsir) 225 226 #ifdef SCN_TIMING 227 /* 228 * Keep timing info on latency of software interrupt used by 229 * the ringbuf code to empty ring buffer. 230 * "getinfo" program reads data from /dev/kmem. 231 */ 232 static struct timeval tstart; 233 #define NJITTER 100 234 int scn_njitter = NJITTER; 235 int scn_jitter[NJITTER]; 236 #endif 237 238 #define SCN_CLOCK 3686400 /* input clock */ 239 240 /* speed table groups ACR[7] */ 241 #define GRP_A 0 242 #define GRP_B ACR_BRG 243 244 /* combo of MR0[2:0] and ACR[7] */ 245 #define MODE0A MR0_MODE_0 246 #define MODE0B (MR0_MODE_0|ACR_BRG) 247 #define MODE1A MR0_MODE_1 248 #define MODE1B (MR0_MODE_1|ACR_BRG) 249 #define MODE2A MR0_MODE_2 250 #define MODE2B (MR0_MODE_2|ACR_BRG) 251 252 #define ANYMODE -1 253 #define DEFMODE(C92) MODE0A /* use MODE4A if 26c92? */ 254 255 /* speed code for Counter/Timer (all modes, groups) */ 256 #define USE_CT 0xd 257 258 /* 259 * Rate table, ordered by speed, then mode. 260 * NOTE: ordering of modes must be done carefully! 261 */ 262 struct tabent { 263 int32_t speed; 264 int16_t code; 265 int16_t mode; 266 } table[] = { 267 { 50, 0x0, MODE0A }, 268 { 75, 0x0, MODE0B }, 269 { 110, 0x1, MODE0A }, 270 { 110, 0x1, MODE0B }, 271 { 110, 0x1, MODE1A }, 272 { 110, 0x1, MODE1B }, 273 { 134, 0x2, MODE0A }, /* 134.5 */ 274 { 134, 0x2, MODE0B }, /* 134.5 */ 275 { 134, 0x2, MODE1A }, /* 134.5 */ 276 { 134, 0x2, MODE1B }, /* 134.5 */ 277 { 150, 0x3, MODE0A }, 278 { 150, 0x3, MODE0A }, 279 { 200, 0x3, MODE0A }, 280 { 300, 0x4, MODE0A }, 281 { 300, 0x4, MODE0B }, 282 { 300, 0x0, MODE1A }, 283 { 450, 0x0, MODE1B }, 284 { 600, 0x5, MODE0A }, 285 { 600, 0x5, MODE0B }, 286 { 880, 0x1, MODE2A }, 287 { 880, 0x1, MODE2B }, 288 { 900, 0x3, MODE1B }, 289 { 1050, 0x7, MODE0A }, 290 { 1050, 0x7, MODE1A }, 291 { 1076, 0x2, MODE2A }, 292 { 1076, 0x2, MODE2B }, 293 { 1200, 0x6, MODE0A }, 294 { 1200, 0x6, MODE0B }, 295 { 1200, 0x3, MODE1A }, 296 { 1800, 0xa, MODE0B }, 297 { 1800, 0x4, MODE1A }, 298 { 1800, 0x4, MODE1B }, 299 { 2000, 0x7, MODE0B }, 300 { 2000, 0x7, MODE1B }, 301 { 2400, 0x8, MODE0A }, 302 { 2400, 0x8, MODE0B }, 303 { 3600, 0x5, MODE1A }, 304 { 3600, 0x5, MODE1B }, 305 { 4800, 0x9, MODE2A }, 306 { 4800, 0x9, MODE2B }, 307 { 4800, 0x9, MODE0A }, 308 { 4800, 0x9, MODE0B }, 309 { 7200, 0xa, MODE0A }, 310 { 7200, 0x0, MODE2B }, 311 { 7200, 0x6, MODE1A }, 312 { 7200, 0x6, MODE1B }, 313 { 9600, 0xb, MODE2A }, 314 { 9600, 0xb, MODE2B }, 315 { 9600, 0xb, MODE0A }, 316 { 9600, 0xb, MODE0B }, 317 { 9600, 0xd, MODE1A }, /* use C/T as entre' to mode1 */ 318 { 9600, 0xd, MODE1B }, /* use C/T as entre' to mode1 */ 319 { 14400, 0x3, MODE2B }, 320 { 14400, 0x8, MODE1A }, 321 { 14400, 0x8, MODE1B }, 322 { 19200, 0x3, MODE2A }, 323 { 19200, 0xc, MODE2B }, 324 { 19200, 0xc, MODE0B }, 325 { 19200, 0xd, MODE1A }, /* use C/T as entre' to mode1 */ 326 { 19200, 0xd, MODE1B }, /* use C/T as entre' to mode1 */ 327 { 28800, 0x4, MODE2A }, 328 { 28800, 0x4, MODE2B }, 329 { 28800, 0x9, MODE1A }, 330 { 28800, 0x9, MODE1B }, 331 { 38400, 0xc, MODE2A }, 332 { 38400, 0xc, MODE0A }, 333 { 57600, 0x5, MODE2A }, 334 { 57600, 0x5, MODE2B }, 335 { 57600, 0xb, MODE1A }, 336 { 57600, 0xb, MODE1B }, 337 { 115200, 0x6, MODE2A }, 338 { 115200, 0x6, MODE2B }, 339 { 115200, 0xc, MODE1B }, 340 { 230400, 0xc, MODE1A } 341 }; 342 #define TABENTRIES (sizeof(table)/sizeof(table[0])) 343 344 /* 345 * boolean for speed codes which are identical in both A/B BRG groups 346 * in all modes 347 */ 348 static u_char bothgroups[16] = { 349 0, 1, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1, 1 350 }; 351 352 /* 353 * Manually constructed divisors table 354 * for minimum error (from some of Dave Rand's code) 355 */ 356 const struct { 357 uint16_t speed; 358 uint16_t div; 359 } divs[] = { 360 { 50, 2303 }, /* 2304 is exact?? */ 361 { 110, 1047 }, /* Should be 1047.27 */ 362 { 134, 857 }, /* Should be 856.505576 */ 363 { 1050, 110 }, /* Should be 109.7142857 */ 364 { 2000, 57 } /* Should be 57.6 */ 365 }; 366 #define DIVS (sizeof(divs)/sizeof(divs[0])) 367 368 /* 369 * minor unit bit decode: 370 * CxxxUUU 371 * 372 * C - carrier 373 * 0 - delay open until carrier high 374 * 1 - allow open with carrier low 375 * UUU - unit 0-7 376 */ 377 378 #define DEV_UNIT(x) (minor(x) & 0x7) 379 #define DEV_DIALOUT(x) (minor(x) & 0x80) 380 381 extern struct tty *constty; 382 383 #define SCN_MAXDUART 4 384 static struct duart scn_duart[SCN_MAXDUART]; 385 386 #ifdef KGDB 387 extern int kgdb_dev; 388 extern int kgdb_rate; 389 extern int kgdb_debug_init; 390 #endif 391 392 /* XXXXX - fix this */ 393 #define splrtty() spltty() 394 395 /* RS-232 configuration routines */ 396 397 /* 398 * set chip parameters, or mark for delayed change. 399 * called at spltty() or on TxEMPTY interrupt. 400 * 401 * Reads current values to avoid glitches from redundant sets. 402 * Perhaps should save last value set to avoid read/write? NOTE: 403 * Would still need to do read if write not needed to advance MR 404 * pointer. 405 * 406 * new 2/97 -plb 407 */ 408 409 static void 410 scn_setchip(struct scn_softc *sc) 411 { 412 struct duart *dp; 413 u_char acr, csr, mr1, mr2; 414 int chan; 415 416 if (sc->sc_tty && (sc->sc_tty->t_state & TS_BUSY)) { 417 sc->sc_heldchanges = 1; 418 return; 419 } 420 421 chan = sc->sc_channel; 422 dp = sc->sc_duart; 423 if (dp->type == SC26C92) { 424 u_char nmr0a, mr0a; 425 426 /* input rate high enough so 64 bit time watchdog not 427 * onerous? */ 428 if (dp->chan[chan].ispeed >= 1200) { 429 /* set FIFO threshold at 6 for other 430 * thresholds we could have to set MR1_FFULL 431 */ 432 dp->chan[chan].mr0 |= MR0_RXWD | MR0_RXINT; 433 } else { 434 dp->chan[chan].mr0 &= ~(MR0_RXWD | MR0_RXINT); 435 } 436 437 /* select BRG mode (MR0A only) */ 438 nmr0a = dp->chan[0].mr0 | (dp->mode & MR0_MODE); 439 440 dp->base[CH_CR] = CR_CMD_MR0; 441 RECOVER(); 442 443 mr0a = dp->base[CH_MR]; 444 if (mr0a != nmr0a) { 445 dp->base[CH_CR] = CR_CMD_MR0; 446 RECOVER(); 447 dp->base[CH_MR] = nmr0a; 448 } 449 450 if (chan) { /* channel B? */ 451 u_char mr0b; 452 453 sc->sc_chbase[CH_CR] = CR_CMD_MR0; 454 RECOVER(); 455 mr0b = dp->base[CH_MR]; 456 457 if (dp->chan[chan].mr0 != mr0b) { 458 sc->sc_chbase[CH_CR] = CR_CMD_MR0; 459 RECOVER(); 460 sc->sc_chbase[CH_MR] = dp->chan[chan].mr0; 461 } 462 } 463 } else { 464 sc->sc_chbase[CH_CR] = CR_CMD_MR1; 465 RECOVER(); 466 } 467 468 mr1 = sc->sc_chbase[CH_MR]; 469 mr2 = sc->sc_chbase[CH_MR]; 470 if (mr1 != dp->chan[chan].new_mr1 || 471 mr2 != dp->chan[chan].new_mr2) { 472 sc->sc_chbase[CH_CR] = CR_CMD_MR1; 473 RECOVER(); 474 sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr1; 475 sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr2; 476 } 477 478 acr = dp->acr | (dp->mode & ACR_BRG); 479 dp->base[DU_ACR] = acr; /* write-only reg! */ 480 481 /* set speed codes */ 482 csr = (dp->chan[chan].icode<<4) | dp->chan[chan].ocode; 483 if (sc->sc_chbase[CH_CSR] != csr) { 484 sc->sc_chbase[CH_CSR] = csr; 485 } 486 487 /* see if counter/timer in use */ 488 if (dp->counter && 489 (dp->chan[0].icode == USE_CT || dp->chan[0].ocode == USE_CT || 490 dp->chan[1].icode == USE_CT || dp->chan[1].ocode == USE_CT)) { 491 492 /* program counter/timer only if necessary */ 493 if (dp->counter != dp->ocounter) { 494 uint16_t div; 495 #ifdef DIVS 496 int i; 497 498 /* look for precalculated rate, for minimum error */ 499 for (i = 0; i < DIVS && divs[i].speed <= dp->counter; i++) { 500 if (divs[i].speed == dp->counter) { 501 div = divs[i].div; 502 goto found; 503 } 504 } 505 #endif 506 507 /* not found in table; calculate a value (rounding up) */ 508 div = ((long)SCN_CLOCK/16/2 + dp->counter/2) / dp->counter; 509 510 found: 511 /* halt before loading? may ALWAYS glitch? 512 * reload race may only sometimes glitch?? 513 */ 514 dp->base[DU_CTUR] = div >> 8; 515 dp->base[DU_CTLR] = div & 255; 516 if (dp->ocounter == 0) { 517 /* not previously used? */ 518 u_char temp; 519 /* start C/T running */ 520 temp = dp->base[DU_CSTRT]; 521 __USE(temp); 522 } 523 dp->ocounter = dp->counter; 524 } 525 } else { 526 /* counter not in use; mark as free */ 527 dp->counter = 0; 528 } 529 sc->sc_heldchanges = 0; 530 531 /* 532 * delay a tiny bit to try and avoid tx glitching. 533 * I know we're at spltty(), but this is much better than the 534 * old version used DELAY((96000 / out_speed) * 10000) 535 * -plb 536 */ 537 DELAY(10); 538 } 539 540 /* 541 * iterator function for speeds. 542 * (could be called "findnextcode") 543 * Returns sequence of possible speed codes for a given rate. 544 * should set index to zero before first call. 545 * 546 * Could be implemented as a "checkspeed()" function called 547 * to evaluate table entries, BUT this allows more variety in 548 * use of C/T with fewer table entries. 549 */ 550 551 static int 552 scniter(int *index, int wanted, int *counter, int *mode, struct chan *other, 553 int c92) 554 { 555 556 while (*index < TABENTRIES) { 557 struct tabent *tp; 558 559 tp = table + (*index)++; 560 if (tp->speed != wanted) 561 continue; 562 563 /* if not a 26C92 only look at MODE0 entries */ 564 if (!c92 && (tp->mode & MR0_MODE) != MR0_MODE_0) 565 continue; 566 567 /* 568 * check mode; 569 * OK if this table entry for current mode, or mode not 570 * yet set, or other channel's rates are available in both 571 * A and B groups. 572 */ 573 574 if (tp->mode == *mode || *mode == ANYMODE || 575 (other != NULL && (tp->mode & MR0_MODE) == (*mode & MR0_MODE) && 576 bothgroups[other->icode] && bothgroups[other->ocode])) { 577 /* 578 * for future table entries specifying 579 * use of counter/timer 580 */ 581 if (tp->code == USE_CT) { 582 if (*counter != wanted && *counter != 0) 583 continue; /* counter busy */ 584 *counter = wanted; 585 } 586 *mode = tp->mode; 587 return tp->code; 588 } 589 } 590 591 /* here after returning all applicable table entries */ 592 /* XXX return sequence of USE_CT with all possible modes?? */ 593 if ((*index)++ == TABENTRIES) { 594 /* Max C/T rate (even on 26C92?) is 57600 */ 595 if (wanted <= 57600 && (*counter == wanted || *counter == 0)) { 596 *counter = wanted; 597 return USE_CT; 598 } 599 } 600 601 return -1; /* FAIL */ 602 } 603 604 /* 605 * calculate configuration 606 * rewritten 2/97 -plb 607 */ 608 static int 609 scn_config(int unit, int chan, int ispeed, int ospeed, u_char mr1, u_char mr2) 610 { 611 struct scn_softc *sc; 612 struct duart *dp; 613 int other; /* opposite of chan */ 614 int mode; 615 int counter; 616 int i, o; /* input, output iterator indexes */ 617 int ic, oc; /* input, output codes */ 618 struct chan *ocp; /* other duart channel */ 619 struct tty *otp; /* other channel tty struct */ 620 int c92; /* true if duart is sc26c92 */ 621 int s; 622 623 /* Set up softc pointer. */ 624 if (unit >= scn_cd.cd_ndevs) 625 return ENXIO; 626 sc = SOFTC(unit); 627 chan = sc->sc_channel; 628 other = chan ^ 1; 629 dp = sc->sc_duart; 630 ocp = &dp->chan[other]; 631 otp = ocp->tty; 632 c92 = (dp->type == SC26C92); 633 634 /* 635 * Right now the first combination that works is used. 636 * Perhaps it should search entire solution space for "best" 637 * combination. For example, use heuristic weighting of mode 638 * preferences, and use of counter timer? 639 * 640 * For example right now with 2681/2692 when default rate is 641 * 9600 and other channel is closed setting 19200 will pick 642 * mode 0a and use counter/timer. Better solution might be 643 * mode 0b, leaving counter/timer free! 644 * 645 * When other channel is open might want to prefer 646 * leaving counter timer free, or not flipping A/B group? 647 */ 648 if (otp && (otp->t_state & TS_ISOPEN)) { 649 650 /* 651 * Other channel open; 652 * Find speed codes compatible with current mode/counter. 653 */ 654 655 i = 0; 656 for (;;) { 657 mode = dp->mode; 658 counter = dp->counter; 659 660 /* NOTE: pass other chan pointer to allow group flipping */ 661 ic = scniter(&i, ispeed, &counter, &mode, ocp, c92); 662 if (ic == -1) 663 break; 664 665 o = 0; 666 if ((oc = scniter(&o, ospeed, &counter, 667 &mode, NULL, c92)) != -1) { 668 /* 669 * take first match 670 * 671 * Perhaps calculate heuristic "score", 672 * save score,codes,mode,counter if score 673 * better than previous best? 674 */ 675 goto gotit; 676 } 677 } 678 /* XXX try looping for ospeed? */ 679 } else { 680 /* other channel closed */ 681 int oo, oi; /* other input, output iterators */ 682 int oic, ooc; /* other input, output codes */ 683 684 /* 685 * Here when other channel closed. Finds first 686 * combination that will allow other channel to be opened 687 * (with defaults) and fits our needs. 688 */ 689 oi = 0; 690 for (;;) { 691 mode = ANYMODE; 692 counter = 0; 693 694 oic = scniter(&oi, ocp->ispeed, &counter, &mode, NULL, c92); 695 if (oic == -1) 696 break; 697 698 oo = 0; 699 while ((ooc = scniter(&oo, ocp->ospeed, &counter, 700 &mode, NULL, c92)) != -1) { 701 i = 0; 702 while ((ic = scniter(&i, ispeed, &counter, 703 &mode, NULL, c92)) != -1) { 704 o = 0; 705 if ((oc = scniter(&o, ospeed, &counter, 706 &mode, NULL, c92)) != -1) { 707 /* 708 * take first match 709 * 710 * Perhaps calculate heuristic 711 * "score", save 712 * score,codes,mode,counter 713 * if score better than 714 * previous best? 715 */ 716 s = spltty(); 717 dp->chan[other].icode = oic; 718 dp->chan[other].ocode = ooc; 719 goto gotit2; 720 } 721 } 722 } 723 } 724 } 725 return EINVAL; 726 727 gotit: 728 s = spltty(); 729 gotit2: 730 dp->chan[chan].new_mr1 = mr1; 731 dp->chan[chan].new_mr2 = mr2; 732 dp->chan[chan].ispeed = ispeed; 733 dp->chan[chan].ospeed = ospeed; 734 dp->chan[chan].icode = ic; 735 dp->chan[chan].ocode = oc; 736 if (mode == ANYMODE) /* no mode selected?? */ 737 mode = DEFMODE(c92); 738 dp->mode = mode; 739 dp->counter = counter; 740 741 scn_setchip(sc); /* set chip now, if possible */ 742 splx(s); 743 return (0); 744 } 745 746 int 747 scn_match(device_t parent, struct cfdata *cf, void *aux) 748 { 749 struct mainbus_attach_args *ma = aux; 750 751 if ((mach_type == MACH_SGI_IP6 || mach_type == MACH_SGI_IP10) && 752 ma->ma_addr == 0x1fb80004) 753 return (1); 754 755 return (0); 756 } 757 758 /* 759 * No need to make scn_rx{en,dis}able too efficient, 760 * they're only called on setup, open & close! 761 */ 762 static inline void 763 scn_rxenable(struct scn_softc *sc) 764 { 765 struct duart *dp; 766 int channel; 767 768 dp = sc->sc_duart; 769 channel = sc->sc_channel; 770 771 /* Outputs wire-ored and connected to ICU input for fast rx interrupt. */ 772 if (channel == 0) 773 dp->opcr |= OPCR_OP4_RXRDYA; 774 else 775 dp->opcr |= OPCR_OP5_RXRDYB; 776 dp->base[DU_OPCR] = dp->opcr; 777 dp->imr |= sc->sc_rx_int; 778 dp->base[DU_IMR] = dp->imr; 779 } 780 781 static inline void 782 scn_rxdisable(struct scn_softc *sc) 783 { 784 struct duart *dp; 785 int channel; 786 787 dp = sc->sc_duart; 788 channel = sc->sc_channel; 789 790 /* Outputs wire-ored and connected to ICU input for fast rx interrupt. */ 791 if (channel == 0) 792 dp->opcr &= ~OPCR_OP4_RXRDYA; 793 else 794 dp->opcr &= ~OPCR_OP5_RXRDYB; 795 dp->base[DU_OPCR] = dp->opcr; 796 dp->imr &= ~sc->sc_rx_int; 797 dp->base[DU_IMR] = dp->imr; 798 } 799 800 void 801 scn_attach(device_t parent, device_t self, void *aux) 802 { 803 struct mainbus_attach_args *ma = aux; 804 struct scn_softc *sc; 805 struct duart *duart; 806 volatile u_char *ch_base; 807 volatile u_char *duart_base; 808 int channel; 809 int speed; 810 int s; 811 int maj __diagused; 812 u_char unit; 813 u_char duartno; 814 u_char delim = ':'; 815 u_char mr1, mr2; 816 enum scntype scntype = SCNUNK; 817 const char *duart_type = "Unknown"; 818 bool console, first; 819 devmajor_t major; 820 821 (void)major; 822 823 sc = device_private(self); 824 unit = device_unit(self); 825 826 /* XXX - hard-coded */ 827 if (ma->ma_addr == 0x1fb80004) 828 duartno = 1; 829 else 830 duartno = 0; 831 channel = 0; 832 console = 1; 833 834 duart = sc->sc_duart = &scn_duart[duartno]; 835 duart->chan[channel].sc = sc; 836 first = (duart->base == NULL); 837 838 if (console) { 839 sc->sc_isconsole = 1; 840 sc->sc_swflags |= SCN_SW_SOFTCAR; /* ignore carrier */ 841 } 842 843 duart_base = (volatile u_char *)MIPS_PHYS_TO_KSEG1(ma->ma_addr); 844 ch_base = duart_base; /* XXX */ 845 846 if (first) { 847 /* Probe DUART type */ 848 s = spltty(); 849 if (console) { 850 ch_base[CH_CR] = CR_DIS_TX; 851 delay(5 * 10000); 852 } 853 ch_base[CH_CR] = CR_CMD_MR1; 854 RECOVER(); 855 mr1 = ch_base[CH_MR]; 856 mr2 = ch_base[CH_MR]; 857 ch_base[CH_CR] = CR_CMD_MR1; 858 RECOVER(); 859 ch_base[CH_MR] = 1; 860 ch_base[CH_MR] = 0; 861 ch_base[CH_CR] = CR_CMD_MR1; 862 RECOVER(); 863 if (ch_base[CH_MR] == 1) { 864 /* MR 2 selected */ 865 ch_base[CH_CR] = CR_CMD_MR0; 866 RECOVER(); 867 /* if 2681, MR2 still selected */ 868 ch_base[CH_MR] = 1; 869 ch_base[CH_CR] = CR_CMD_MR1; 870 RECOVER(); 871 ch_base[CH_MR] = 0; /* MR1 */ 872 ch_base[CH_MR] = 0; /* MR2 */ 873 ch_base[CH_CR] = CR_CMD_MR0; 874 RECOVER(); 875 /* if 2681, MR2 still selected */ 876 if((ch_base[CH_MR] & 1) == 1) { 877 duart_type = "sc26c92"; 878 scntype = SC26C92; 879 } else { 880 /* 2681 treats as MR1 Select */ 881 ch_base[CH_CR] = CR_CMD_RTS_OFF; 882 RECOVER(); 883 ch_base[CH_MR] = 1; 884 ch_base[CH_MR] = 0; 885 ch_base[CH_CR] = CR_CMD_RTS_OFF; 886 RECOVER(); 887 if (ch_base[CH_MR] == 1) { 888 duart_type = "scn2681"; 889 scntype = SCN2681; 890 } else { 891 duart_type = "scn2692"; 892 scntype = SCN2692; 893 } 894 } 895 } 896 897 /* If a 2681, the CR_CMD_MR0 is interpreted as a TX_RESET */ 898 if (console) { 899 ch_base[CH_CR] = CR_ENA_TX; 900 RECOVER(); 901 } 902 ch_base[CH_CR] = CR_CMD_MR1; 903 RECOVER(); 904 ch_base[CH_MR] = mr1; 905 ch_base[CH_MR] = mr2; 906 splx(s); 907 908 /* 909 * On IP6 the console chip is duart1. The keyboard/mouse 910 * is duart0. Each chip has two channels and the channels 911 * share an interrupt. Duart0 is interrupt 0, duart1 is 912 * interrupt 1. 913 */ 914 if (duartno != 0 && duartno != 1) 915 panic("scn_attach: bad duartno: %d", duartno); 916 cpu_intr_establish(duartno, IPL_TTY, scnintr, duart); 917 918 printf("%c %s", delim, duart_type); 919 delim = ','; 920 921 duart->base = duart_base; 922 duart->type = scntype; 923 } 924 /* Record channel, uart */ 925 sc->sc_channel = channel; 926 sc->sc_chbase = ch_base; 927 928 /* Initialize modem/interrupt bit masks */ 929 if (channel == 0) { 930 sc->sc_op_rts = OP_RTSA; 931 sc->sc_op_dtr = OP_DTRA; 932 sc->sc_ip_cts = IP_CTSA; 933 sc->sc_ip_dcd = IP_DCDA; 934 935 sc->sc_tx_int = INT_TXA; 936 sc->sc_rx_int = INT_RXA; 937 } else { 938 sc->sc_op_rts = OP_RTSB; 939 sc->sc_op_dtr = OP_DTRB; 940 sc->sc_ip_cts = IP_CTSB; 941 sc->sc_ip_dcd = IP_DCDB; 942 943 sc->sc_tx_int = INT_TXB; 944 sc->sc_rx_int = INT_RXB; 945 } 946 947 /* Initialize counters */ 948 sc->sc_framing_errors = 0; 949 sc->sc_fifo_overruns = 0; 950 sc->sc_parity_errors = 0; 951 sc->sc_breaks = 0; 952 953 if (console) { 954 DELAY(5 * 10000); /* Let the output go out.... */ 955 } 956 957 /* 958 * Set up the hardware to a base state, in particular: 959 * o reset transmitter and receiver 960 * o set speeds and configurations 961 * o receiver interrupts only (RxRDY and BREAK) 962 */ 963 964 s = spltty(); 965 /* RTS off... */ 966 SCN_OP_BIC(sc, sc->sc_op_rts); /* "istop" */ 967 968 ch_base[CH_CR] = CR_DIS_RX | CR_DIS_TX; 969 RECOVER(); 970 ch_base[CH_CR] = CR_CMD_RESET_RX; 971 RECOVER(); 972 ch_base[CH_CR] = CR_CMD_RESET_TX; 973 RECOVER(); 974 ch_base[CH_CR] = CR_CMD_RESET_ERR; 975 RECOVER(); 976 ch_base[CH_CR] = CR_CMD_RESET_BRK; 977 RECOVER(); 978 ch_base[CH_CR] = CR_CMD_MR1; 979 RECOVER(); 980 981 /* No receiver control of RTS. */ 982 ch_base[CH_MR] = 0; 983 ch_base[CH_MR] = 0; 984 985 /* Initialize the uart structure if this is channel A. */ 986 if (first) { 987 /* Disable all interrupts. */ 988 duart_base[DU_IMR] = duart->imr = 0; 989 990 /* Output port config */ 991 duart_base[DU_OPCR] = duart->opcr = 0; 992 993 /* Speeds... */ 994 duart->mode = 0; 995 996 /* 997 * Set initial speed to an illegal code that can be changed to 998 * any other baud. 999 */ 1000 duart->chan[0].icode = duart->chan[0].ocode = 0x2f; 1001 duart->chan[1].icode = duart->chan[1].ocode = 0x2f; 1002 duart->chan[0].ispeed = duart->chan[0].ospeed = 0; 1003 duart->chan[1].ispeed = duart->chan[1].ospeed = 0; 1004 1005 duart->acr = 0; 1006 duart->acr |= ACR_CT_TCLK1; /* timer mode 1x clk */ 1007 } 1008 1009 if (channel == 0) { 1010 duart->acr |= ACR_DELTA_DCDA; /* Set CD int */ 1011 } else { 1012 duart->acr |= ACR_DELTA_DCDB; /* Set CD int */ 1013 } 1014 1015 if (scnsir == NULL) { 1016 /* software intr: calls tty code, hence IPL_TTY */ 1017 scnsir = softint_establish(SOFTINT_SERIAL, scnsoft, NULL); 1018 } 1019 1020 duart_base[DU_ACR] = (duart->mode & ACR_BRG) | duart->acr; 1021 1022 if (console) 1023 speed = scnconsrate; 1024 else 1025 speed = scndefaultrate; 1026 1027 scn_config(unit, channel, speed, speed, MR1_PNONE | MR1_CS8, MR2_STOP1); 1028 if (console) { 1029 maj = cdevsw_lookup_major(&scn_cdevsw); 1030 KASSERT(maj != NODEVMAJOR); 1031 shutdownhook_establish(scncnreinit, NULL); 1032 /* Make sure console can do scncngetc */ 1033 duart_base[DU_OPSET] = channel ? (OP_RTSB | OP_DTRB) : 1034 (OP_RTSA | OP_DTRA); 1035 } 1036 1037 /* Turn on the receiver and transmitters */ 1038 ch_base[CH_CR] = CR_ENA_RX | CR_ENA_TX; 1039 1040 /* Set up the interrupts. */ 1041 duart->imr |= INT_IP; 1042 scn_rxdisable(sc); 1043 splx(s); 1044 1045 if (sc->sc_swflags) { 1046 printf("%c flags %d", delim, sc->sc_swflags); 1047 delim = ','; 1048 } 1049 1050 #ifdef KGDB 1051 major = cdevsw_lookup_major(&scn_cdevsw); 1052 KASSERT(major != NODEVMAJOR); 1053 if (kgdb_dev == makedev(major, unit)) { 1054 if (console) 1055 kgdb_dev = NODEV; /* can't debug over console port */ 1056 else { 1057 scninit(kgdb_dev, kgdb_rate); 1058 scn_rxenable(sc); 1059 scn->sc_iskgdb = 1; 1060 kgdb_attach(scncngetc, scncnputc, kgdb_dev); 1061 if (kgdb_debug_init) { 1062 printf("%c ", delim); 1063 kgdb_connect(1); 1064 } else 1065 printf("%c kgdb enabled", delim); 1066 delim = ','; 1067 } 1068 } 1069 #endif 1070 printf("\n"); 1071 } 1072 1073 /* ARGSUSED */ 1074 int 1075 scnopen(dev_t dev, int flags, int mode, struct lwp *l) 1076 { 1077 struct tty *tp; 1078 int unit = DEV_UNIT(dev); 1079 struct scn_softc *sc; 1080 int error = 0; 1081 1082 if (unit >= scn_cd.cd_ndevs) 1083 return ENXIO; 1084 sc = SOFTC(unit); 1085 if (!sc) 1086 return ENXIO; 1087 1088 tp = sc->sc_tty; 1089 if (!tp) { 1090 tp = tty_alloc(); 1091 sc->sc_tty = sc->sc_duart->chan[sc->sc_channel].tty = tp; 1092 tty_attach(tp); 1093 } 1094 1095 tp->t_oproc = scnstart; 1096 tp->t_param = scnparam; 1097 tp->t_hwiflow = scnhwiflow; 1098 tp->t_dev = dev; 1099 1100 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 1101 return (EBUSY); 1102 1103 mutex_spin_enter(&tty_lock); 1104 1105 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) { 1106 ttychars(tp); 1107 tp->t_iflag = TTYDEF_IFLAG; 1108 tp->t_oflag = TTYDEF_OFLAG; 1109 tp->t_cflag = SCNDEF_CFLAG; 1110 1111 sc->sc_rx_blocked = 0; 1112 1113 if (sc->sc_swflags & SCN_SW_CLOCAL) 1114 tp->t_cflag |= CLOCAL; 1115 if (sc->sc_swflags & SCN_SW_CRTSCTS) 1116 tp->t_cflag |= CCTS_OFLOW | CRTS_IFLOW; 1117 tp->t_lflag = TTYDEF_LFLAG; 1118 if (sc->sc_isconsole) 1119 tp->t_ispeed = tp->t_ospeed = scnconsrate; 1120 else 1121 tp->t_ispeed = tp->t_ospeed = scndefaultrate; 1122 scnparam(tp, &tp->t_termios); 1123 ttsetwater(tp); 1124 1125 /* Turn on DTR and RTS. */ 1126 SCN_OP_BIS(sc, sc->sc_op_rts | sc->sc_op_dtr); 1127 1128 /* enable receiver interrupts */ 1129 scn_rxenable(sc); 1130 1131 /* set carrier state; */ 1132 if ((sc->sc_swflags & SCN_SW_SOFTCAR) || /* check ttyflags */ 1133 SCN_DCD(sc) || /* check h/w */ 1134 DEV_DIALOUT(dev)) 1135 tp->t_state |= TS_CARR_ON; 1136 else 1137 tp->t_state &= ~TS_CARR_ON; 1138 } 1139 1140 mutex_spin_exit(&tty_lock); 1141 1142 error = ttyopen(tp, SCN_DIALOUT(sc), flags & O_NONBLOCK); 1143 if (error) printf("ttyopen failed line %d, error %d\n", __LINE__, error); 1144 if (error) 1145 goto bad; 1146 1147 error = (*tp->t_linesw->l_open) (dev, tp); 1148 if (error) printf("l_open failed line %d, error %d\n", __LINE__, error); 1149 if (error) 1150 goto bad; 1151 1152 return (0); 1153 1154 bad: 1155 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) { 1156 scn_rxdisable(sc); 1157 SCN_OP_BIC(sc, sc->sc_op_rts | sc->sc_op_dtr); 1158 } 1159 1160 return (error); 1161 } 1162 1163 1164 /*ARGSUSED*/ 1165 int 1166 scnclose(dev_t dev, int flags, int mode, struct lwp *l) 1167 { 1168 int unit = DEV_UNIT(dev); 1169 struct scn_softc *sc = SOFTC(unit); 1170 struct tty *tp = sc->sc_tty; 1171 devmajor_t major; 1172 1173 (void)major; 1174 1175 if ((tp->t_state & TS_ISOPEN) == 0) 1176 return 0; 1177 1178 (*tp->t_linesw->l_close) (tp, flags); 1179 1180 #ifdef KGDB 1181 /* do not disable interrupts if debugging */ 1182 major = cdevsw_lookup_major(&scn_devsw); 1183 KASSERT(major != cdevsw_lookup_major); 1184 if (kgdb_dev != makedev(major, unit)) 1185 #endif 1186 if ((tp->t_state & TS_ISOPEN) == 0) { 1187 scn_rxdisable(sc); 1188 } 1189 if ((tp->t_cflag & HUPCL) && (sc->sc_swflags & SCN_SW_SOFTCAR) == 0) { 1190 SCN_OP_BIC(sc, sc->sc_op_dtr); 1191 /* hold low for 1 second */ 1192 tsleep(sc, TTIPRI, ttclos, hz); 1193 } 1194 SCN_CLRDIALOUT(sc); 1195 ttyclose(tp); 1196 1197 #if 0 1198 if ((tp->t_state & TS_ISOPEN) == 0) { 1199 tty_free(tp); 1200 sc->sc_tty = (struct tty *) NULL; 1201 } 1202 #endif 1203 1204 return (0); 1205 } 1206 1207 int 1208 scnread(dev_t dev, struct uio *uio, int flags) 1209 { 1210 struct scn_softc *sc = SOFTC(DEV_UNIT(dev)); 1211 struct tty *tp = sc->sc_tty; 1212 1213 return ((*tp->t_linesw->l_read) (tp, uio, flags)); 1214 } 1215 1216 int 1217 scnwrite(dev_t dev, struct uio *uio, int flags) 1218 { 1219 struct scn_softc *sc = SOFTC(DEV_UNIT(dev)); 1220 struct tty *tp = sc->sc_tty; 1221 1222 return ((*tp->t_linesw->l_write) (tp, uio, flags)); 1223 } 1224 1225 int 1226 scnpoll(dev_t dev, int events, struct lwp *l) 1227 { 1228 struct scn_softc *sc = SOFTC(DEV_UNIT(dev)); 1229 struct tty *tp = sc->sc_tty; 1230 1231 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1232 } 1233 1234 struct tty * 1235 scntty(dev_t dev) 1236 { 1237 struct scn_softc *sc = SOFTC(DEV_UNIT(dev)); 1238 1239 return sc->sc_tty; 1240 } 1241 1242 /* Worker routines for interrupt processing */ 1243 static inline void 1244 dcd_int(struct scn_softc *sc, struct tty *tp, u_char new) 1245 { 1246 1247 if (sc->sc_swflags & SCN_SW_SOFTCAR) 1248 return; 1249 1250 #if 0 1251 printf("scn%d: dcd_int ip %x SCN_DCD %x new %x ipcr %x\n", 1252 sc->unit, 1253 sc->sc_duart->base[DU_IP], 1254 SCN_DCD(sc), 1255 new, 1256 sc->sc_duart->base[DU_IPCR] 1257 ); 1258 #endif 1259 1260 /* XXX set some flag to have some lower (soft) int call line discipline? */ 1261 if (!(*tp->t_linesw->l_modem) (tp, new == 0? 1: 0)) { 1262 SCN_OP_BIC(sc, sc->sc_op_rts | sc->sc_op_dtr); 1263 } 1264 } 1265 1266 /* 1267 * Print out a ring or fifo overrun error message. 1268 */ 1269 static void 1270 scnoverrun(int unit, long *ptime, const char *what) 1271 { 1272 1273 if (*ptime != time_second) { 1274 *ptime = time_second; 1275 log(LOG_WARNING, "scn%d: %s overrun\n", unit, what); 1276 } 1277 } 1278 1279 /* 1280 * Try to block or unblock input using hardware flow-control. 1281 * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and 1282 * if this function returns non-zero, the TS_TBLOCK flag will 1283 * be set or cleared according to the "stop" arg passed. 1284 */ 1285 int 1286 scnhwiflow(struct tty *tp, int stop) 1287 { 1288 int unit = DEV_UNIT(tp->t_dev); 1289 struct scn_softc *sc = SOFTC(unit); 1290 int s; 1291 1292 s = splrtty(); 1293 if (!stop) { 1294 if (sc->sc_rbput - sc->sc_rbget - 1) { 1295 setsoftscn(); 1296 } 1297 } 1298 splx(s); 1299 return 1; 1300 } 1301 1302 static int 1303 scnintr(void *arg) 1304 { 1305 struct duart *duart = arg; 1306 struct scn_softc *sc0 = duart->chan[0].sc; 1307 struct scn_softc *sc1 = duart->chan[1].sc; 1308 1309 struct tty *tp0 = (sc0 != NULL) ? sc0->sc_tty : NULL; 1310 struct tty *tp1 = (sc1 != NULL) ? sc1->sc_tty : NULL; 1311 1312 char rs_work; 1313 u_char rs_stat; 1314 u_char rs_ipcr; 1315 1316 /* Check for RX interrupts first, since we cannot distinguish by irq. */ 1317 scnrxintr(duart); 1318 1319 do { 1320 /* Loop to pick up ALL pending interrupts for device. */ 1321 rs_work = false; 1322 rs_stat = duart->base[DU_ISR]; 1323 1324 /* channel a */ 1325 if (tp0 != NULL) { 1326 if ((rs_stat & INT_TXA) && (tp0->t_state & TS_BUSY)) { 1327 /* output char done. */ 1328 tp0->t_state &= ~(TS_BUSY | TS_FLUSH); 1329 1330 /* disable tx ints */ 1331 duart->imr &= ~sc0->sc_tx_int; 1332 duart->base[DU_IMR] = duart->imr; 1333 1334 if (sc0->sc_heldchanges) { 1335 scn_setchip(sc0); 1336 } 1337 1338 (*tp0->t_linesw->l_start) (tp0); 1339 rs_work = true; 1340 } 1341 } 1342 /* channel b */ 1343 if (tp1 != NULL) { 1344 if ((rs_stat & INT_TXB) && (tp1->t_state & TS_BUSY)) { 1345 /* output char done. */ 1346 tp1->t_state &= ~(TS_BUSY | TS_FLUSH); 1347 1348 /* disable tx ints */ 1349 duart->imr &= ~sc1->sc_tx_int; 1350 duart->base[DU_IMR] = duart->imr; 1351 1352 if (sc1->sc_heldchanges) { 1353 scn_setchip(sc1); 1354 } 1355 1356 (*tp1->t_linesw->l_start) (tp1); 1357 rs_work = true; 1358 } 1359 } 1360 if (rs_stat & INT_IP) { 1361 rs_work = true; 1362 rs_ipcr = duart->base[DU_IPCR]; 1363 1364 if (rs_ipcr & IPCR_DELTA_DCDA && tp0 != NULL) { 1365 dcd_int(sc0, tp0, rs_ipcr & IPCR_DCDA); 1366 } 1367 if (rs_ipcr & IPCR_DELTA_DCDB && tp1 != NULL) { 1368 dcd_int(sc1, tp1, rs_ipcr & IPCR_DCDB); 1369 } 1370 } 1371 } while (rs_work); 1372 1373 return (1); /* ? */ 1374 } 1375 1376 /* 1377 * Handle rxrdy/ffull interrupt: QUICKLY poll both channels (checking 1378 * status first) and stash data in a ring buffer. Ring buffer scheme 1379 * borowed from sparc/zs.c requires NO interlock on data! 1380 * 1381 * This interrupt should NOT be included in spltty() mask since it 1382 * invokes NO tty code! The whole point is to allow tty input as much 1383 * of the time as possible, while deferring "heavy" character 1384 * processing until later. 1385 * 1386 * see scn.hw.README and scnsoft() for more info. 1387 * 1388 * THIS ROUTINE SHOULD BE KEPT AS CLEAN AS POSSIBLE!! 1389 * IT'S A CANDIDATE FOR RECODING IN ASSEMBLER!! 1390 */ 1391 static inline int 1392 scn_rxintr(struct scn_softc *sc) 1393 { 1394 char sr; 1395 int i, n; 1396 int work; 1397 1398 work = 0; 1399 i = sc->sc_rbput; 1400 while (work <= 10) { 1401 #define SCN_GETCH(SC) \ 1402 sr = (SC)->sc_chbase[CH_SR]; \ 1403 if ((sr & SR_RX_RDY) == 0) \ 1404 break; \ 1405 if (sr & (SR_PARITY | SR_FRAME | SR_BREAK | SR_OVERRUN)) \ 1406 goto exception; \ 1407 work++; \ 1408 (SC)->sc_rbuf[i++ & SCN_RING_MASK] = (SC)->sc_chbase[CH_DAT] 1409 1410 SCN_GETCH(sc); SCN_GETCH(sc); SCN_GETCH(sc); 1411 /* XXX more here if 26C92? -plb */ 1412 continue; 1413 exception: 1414 #if defined(DDB) 1415 if (sc->sc_isconsole && (sr & SR_BREAK)) { 1416 Debugger(); 1417 sr = sc->sc_chbase[CH_SR]; 1418 } 1419 #endif 1420 #if defined(KGDB) 1421 if (sc->sc_iskgdb && (sr & SR_RX_RDY)) { 1422 kgdb_connect(1); 1423 sr = sc->sc_chbase[CH_SR]; 1424 } 1425 #endif 1426 work++; 1427 sc->sc_rbuf[i++ & SCN_RING_MASK] = (sr << 8) | sc->sc_chbase[CH_DAT]; 1428 sc->sc_chbase[CH_CR] = CR_CMD_RESET_ERR; /* resets break? */ 1429 RECOVER(); 1430 } 1431 /* 1432 * If ring is getting too full, try to block input. 1433 */ 1434 n = i - sc->sc_rbget; 1435 if (sc->sc_rbhiwat && (n > sc->sc_rbhiwat)) { 1436 /* If not CRTSCTS sc_rbhiwat is such that this 1437 * never happens. 1438 * Clear RTS 1439 */ 1440 SCN_OP_BIC(sc, sc->sc_op_rts); 1441 sc->sc_rx_blocked = 1; 1442 } 1443 sc->sc_rbput = i; 1444 1445 return work; 1446 } 1447 1448 static void 1449 scnrxintr(void *arg) 1450 { 1451 struct duart *duart = arg; 1452 int work = 0; 1453 1454 if (duart->chan[0].sc != NULL) 1455 work += scn_rxintr(duart->chan[0].sc); 1456 if (duart->chan[1].sc != NULL) 1457 work += scn_rxintr(duart->chan[1].sc); 1458 if (work > 0) { 1459 setsoftscn(); /* trigger s/w intr */ 1460 #ifdef SCN_TIMING 1461 microtime(&tstart); 1462 #endif 1463 } 1464 } 1465 1466 /* 1467 * Here on soft interrupt (at spltty) to empty ring buffers. 1468 * 1469 * Dave's original scheme was to use the DUART receiver timeout 1470 * interrupt. This requires 2692's (which my board doesn't have), and 1471 * I also liked the idea of using the C/T to generate alternate and/or 1472 * arbitrary bauds. -plb 1473 * 1474 * The ringbuffer code comes from Chris Torek's SPARC 44bsd zs driver 1475 * (hence the LBL notice on top of this file), DOES NOT require 1476 * interlocking with interrupt levels! 1477 * 1478 * The 44bsd sparc/zs driver reads the ring buffer from a separate 1479 * zssoftint, while the SunOS 4.x zs driver appears to use 1480 * timeout()'s. timeouts seem to be too slow to deal with high data 1481 * rates. I know, I tried them. 1482 * -plb. 1483 */ 1484 static void 1485 scnsoft(void *arg) 1486 { 1487 int s, unit; 1488 #ifdef SCN_TIMING 1489 struct timeval tend; 1490 u_long t; 1491 1492 microtime(&tend); 1493 t = (tend.tv_sec - tstart.tv_sec) * 1000000 + (tend.tv_usec - tstart.tv_usec); 1494 t = (t + tick / 20) / (tick / 10); 1495 if (t >= NJITTER - 1) { 1496 t = NJITTER - 1; 1497 } 1498 scn_jitter[t]++; 1499 #endif 1500 1501 for (unit = 0; unit < scn_cd.cd_ndevs; unit++) { 1502 struct scn_softc *sc; 1503 struct tty *tp; 1504 int n, get; 1505 1506 sc = SOFTC(unit); 1507 if (sc == NULL) { 1508 continue; 1509 } 1510 tp = sc->sc_tty; 1511 #ifdef KGDB 1512 if (tp == NULL) { 1513 sc->sc_rbget = sc->sc_rbput; 1514 continue; 1515 } 1516 #endif 1517 if (tp == NULL || tp->t_state & TS_TBLOCK) { 1518 continue; 1519 } 1520 1521 1522 get = sc->sc_rbget; 1523 1524 /* NOTE: fetch from rbput is atomic */ 1525 while (get != (n = sc->sc_rbput)) { 1526 /* 1527 * Compute the number of interrupts in the receive ring. 1528 * If the count is overlarge, we lost some events, and 1529 * must advance to the first valid one. It may get 1530 * overwritten if more data are arriving, but this is 1531 * too expensive to check and gains nothing (we already 1532 * lost out; all we can do at this point is trade one 1533 * kind of loss for another). 1534 */ 1535 n -= get; 1536 if (n > SCN_RING_SIZE) { 1537 scnoverrun(unit, &sc->sc_rotime, "ring"); 1538 get += n - SCN_RING_SIZE; 1539 n = SCN_RING_SIZE; 1540 sc->sc_ring_overruns++; 1541 } 1542 while (--n >= 0) { 1543 int c, sr; 1544 1545 if (tp->t_state & TS_TBLOCK) { 1546 sc->sc_rbget = get; 1547 goto done; 1548 } 1549 /* Race to keep ahead of incoming interrupts. */ 1550 c = sc->sc_rbuf[get++ & SCN_RING_MASK]; 1551 1552 sr = c >> 8; /* extract status */ 1553 c &= 0xff; /* leave just character */ 1554 1555 if (sr & SR_OVERRUN) { 1556 scnoverrun(unit, &sc->sc_fotime, "fifo"); 1557 sc->sc_fifo_overruns++; 1558 } 1559 if (sr & SR_PARITY) { 1560 c |= TTY_PE; 1561 sc->sc_parity_errors++; 1562 } 1563 if (sr & SR_FRAME) { 1564 c |= TTY_FE; 1565 sc->sc_framing_errors++; 1566 } 1567 if (sr & SR_BREAK) { 1568 #if 0 1569 /* 1570 * See DDB_CHECK() comments in 1571 * scnrxintr() 1572 */ 1573 if (sc->sc_isconsole) 1574 Debugger(); 1575 #endif 1576 c = TTY_FE | 0; 1577 sc->sc_breaks++; 1578 } 1579 1580 (*tp->t_linesw->l_rint) (c, tp); 1581 1582 if (sc->sc_rx_blocked && n < SCN_RING_THRESH) { 1583 s = splrtty(); 1584 sc->sc_rx_blocked = 0; 1585 SCN_OP_BIS(sc, sc->sc_op_rts); 1586 splx(s); 1587 } 1588 1589 } 1590 sc->sc_rbget = get; 1591 } 1592 done: ; 1593 } 1594 } 1595 1596 /* Convert TIOCM_xxx bits to output port bits. */ 1597 static unsigned char 1598 opbits(struct scn_softc *sc, int tioc_bits) 1599 { 1600 1601 return ((((tioc_bits) & TIOCM_DTR) ? sc->sc_op_dtr : 0) | 1602 (((tioc_bits) & TIOCM_RTS) ? sc->sc_op_rts : 0)); 1603 } 1604 1605 int 1606 scnioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 1607 { 1608 int unit = DEV_UNIT(dev); 1609 struct scn_softc *sc = SOFTC(unit); 1610 struct tty *tp = sc->sc_tty; 1611 int error; 1612 1613 error = (*tp->t_linesw->l_ioctl) (tp, cmd, data, flags, l); 1614 if (error != EPASSTHROUGH) 1615 return (error); 1616 1617 error = ttioctl(tp, cmd, data, flags, l); 1618 if (error != EPASSTHROUGH) 1619 return (error); 1620 1621 switch (cmd) { 1622 case TIOCSBRK: 1623 sc->sc_chbase[CH_CR] = CR_CMD_START_BRK; 1624 break; 1625 1626 case TIOCCBRK: 1627 sc->sc_chbase[CH_CR] = CR_CMD_STOP_BRK; 1628 break; 1629 1630 case TIOCSDTR: 1631 SCN_OP_BIS(sc, sc->sc_op_dtr | sc->sc_op_rts); 1632 break; 1633 1634 case TIOCCDTR: 1635 SCN_OP_BIC(sc, sc->sc_op_dtr | sc->sc_op_rts); 1636 break; 1637 1638 case TIOCMSET: { 1639 int s; 1640 unsigned char sbits, cbits; 1641 1642 /* set bits */ 1643 sbits = opbits(sc, *(int *) data); 1644 1645 /* get bits to clear */ 1646 cbits = ~sbits & (sc->sc_op_dtr | sc->sc_op_rts); 1647 1648 s = spltty(); 1649 if (sbits) { 1650 SCN_OP_BIS(sc, sbits); 1651 } 1652 if (cbits) { 1653 SCN_OP_BIC(sc, cbits); 1654 } 1655 splx(s); 1656 break; 1657 } 1658 1659 case TIOCMBIS: 1660 SCN_OP_BIS(sc, opbits(sc, *(int *) data)); 1661 break; 1662 1663 case TIOCMBIC: 1664 SCN_OP_BIC(sc, opbits(sc, *(int *) data)); 1665 break; 1666 1667 case TIOCMGET: { 1668 int bits; 1669 unsigned char ip; 1670 1671 /* s = spltty(); */ 1672 ip = sc->sc_duart->base[DU_IP]; 1673 /* splx(s); */ 1674 1675 bits = 0; 1676 if (ip & sc->sc_ip_dcd) 1677 bits |= TIOCM_CD; 1678 if (ip & sc->sc_ip_cts) 1679 bits |= TIOCM_CTS; 1680 1681 #if 0 1682 /* 1683 * XXX sigh; cannot get op current state!! even if 1684 * maintained in private, RTS is done in h/w!! 1685 */ 1686 unsigned char op = 0; 1687 if (op & sc->sc_op_dtr) 1688 bits |= TIOCM_DTR; 1689 if (op & sc->sc_op_rts) 1690 bits |= TIOCM_RTS; 1691 #endif 1692 1693 *(int *) data = bits; 1694 break; 1695 } 1696 1697 case TIOCGFLAGS:{ 1698 int bits = 0; 1699 1700 if (sc->sc_swflags & SCN_SW_SOFTCAR) 1701 bits |= TIOCFLAG_SOFTCAR; 1702 if (sc->sc_swflags & SCN_SW_CLOCAL) 1703 bits |= TIOCFLAG_CLOCAL; 1704 if (sc->sc_swflags & SCN_SW_CRTSCTS) 1705 bits |= TIOCFLAG_CRTSCTS; 1706 if (sc->sc_swflags & SCN_SW_MDMBUF) 1707 bits |= TIOCFLAG_MDMBUF; 1708 1709 *(int *) data = bits; 1710 break; 1711 } 1712 case TIOCSFLAGS:{ 1713 int userbits, driverbits = 0; 1714 1715 error = kauth_authorize_device_tty(l->l_cred, 1716 KAUTH_DEVICE_TTY_PRIVSET, tp); 1717 if (error != 0) 1718 return (EPERM); 1719 1720 userbits = *(int *) data; 1721 if (userbits & TIOCFLAG_SOFTCAR) 1722 driverbits |= SCN_SW_SOFTCAR; 1723 if (userbits & TIOCFLAG_CLOCAL) 1724 driverbits |= SCN_SW_CLOCAL; 1725 if (userbits & TIOCFLAG_CRTSCTS) 1726 driverbits |= SCN_SW_CRTSCTS; 1727 if (userbits & TIOCFLAG_MDMBUF) 1728 driverbits |= SCN_SW_MDMBUF; 1729 1730 sc->sc_swflags = driverbits; 1731 1732 break; 1733 } 1734 1735 default: 1736 return (EPASSTHROUGH); 1737 } 1738 return (0); 1739 } 1740 1741 int 1742 scnparam(struct tty *tp, struct termios *t) 1743 { 1744 int cflag = t->c_cflag; 1745 int unit = DEV_UNIT(tp->t_dev); 1746 char mr1, mr2; 1747 int error; 1748 struct scn_softc *sc = SOFTC(unit); 1749 1750 /* Is this a hang up? */ 1751 if (t->c_ospeed == B0) { 1752 SCN_OP_BIC(sc, sc->sc_op_dtr); 1753 /* leave DTR down. see comment in scnclose() -plb */ 1754 return (0); 1755 } 1756 mr1 = mr2 = 0; 1757 1758 /* Parity? */ 1759 if (cflag & PARENB) { 1760 if ((cflag & PARODD) == 0) 1761 mr1 |= MR1_PEVEN; 1762 else 1763 mr1 |= MR1_PODD; 1764 } else 1765 mr1 |= MR1_PNONE; 1766 1767 /* Stop bits. */ 1768 if (cflag & CSTOPB) 1769 mr2 |= MR2_STOP2; 1770 else 1771 mr2 |= MR2_STOP1; 1772 1773 /* Data bits. */ 1774 switch (cflag & CSIZE) { 1775 case CS5: 1776 mr1 |= MR1_CS5; 1777 break; 1778 case CS6: 1779 mr1 |= MR1_CS6; 1780 break; 1781 case CS7: 1782 mr1 |= MR1_CS7; 1783 break; 1784 case CS8: 1785 default: 1786 mr1 |= MR1_CS8; 1787 break; 1788 } 1789 1790 if (cflag & CCTS_OFLOW) 1791 mr2 |= MR2_TXCTS; 1792 1793 if (cflag & CRTS_IFLOW) { 1794 mr1 |= MR1_RXRTS; 1795 sc->sc_rbhiwat = SCN_RING_HIWAT; 1796 } else { 1797 sc->sc_rbhiwat = 0; 1798 } 1799 1800 error = scn_config(unit, sc->sc_channel, t->c_ispeed, 1801 t->c_ospeed, mr1, mr2); 1802 1803 /* If successful, copy to tty */ 1804 if (!error) { 1805 tp->t_ispeed = t->c_ispeed; 1806 tp->t_ospeed = t->c_ospeed; 1807 tp->t_cflag = cflag; 1808 } 1809 return (error); 1810 } 1811 1812 /* 1813 * Start or restart a transmission. 1814 */ 1815 void 1816 scnstart(struct tty *tp) 1817 { 1818 int s, c; 1819 int unit = DEV_UNIT(tp->t_dev); 1820 struct scn_softc *sc = SOFTC(unit); 1821 1822 s = spltty(); 1823 if (tp->t_state & (TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1824 goto out; 1825 if (!ttypull(tp)) 1826 goto out; 1827 1828 tp->t_state |= TS_BUSY; 1829 1830 while (sc->sc_chbase[CH_SR] & SR_TX_RDY) { 1831 if ((c = getc(&tp->t_outq)) == -1) 1832 break; 1833 sc->sc_chbase[CH_DAT] = c; 1834 } 1835 sc->sc_duart->imr |= (sc->sc_tx_int | sc->sc_rx_int); 1836 sc->sc_duart->base[DU_IMR] = sc->sc_duart->imr; 1837 1838 out: 1839 splx(s); 1840 } 1841 1842 /* 1843 * Stop output on a line. 1844 */ 1845 /*ARGSUSED*/ 1846 void 1847 scnstop(struct tty *tp, int flags) 1848 { 1849 int s; 1850 1851 s = spltty(); 1852 if (tp->t_state & TS_BUSY) { 1853 if ((tp->t_state & TS_TTSTOP) == 0) 1854 tp->t_state |= TS_FLUSH; 1855 } 1856 splx(s); 1857 } 1858 1859 /* 1860 * Following are all routines needed for SCN to act as console. 1861 */ 1862 1863 void 1864 scncnprobe(struct consdev *cn) 1865 { 1866 } 1867 1868 void 1869 scncnreinit(void *v) 1870 { 1871 volatile u_char *du_base = 1872 (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004); 1873 1874 du_base[DU_OPSET] = 1875 SCN_CONSCHAN ? (OP_RTSB | OP_DTRB) : (OP_RTSA | OP_DTRA); 1876 } 1877 1878 void 1879 scncninit(struct consdev *cn) 1880 { 1881 devmajor_t major; 1882 1883 /* initialize required fields */ 1884 major = cdevsw_lookup_major(&scn_cdevsw); 1885 KASSERT(major != NODEV); 1886 cn->cn_dev = makedev(major, SCN_CONSOLE); 1887 cn->cn_pri = CN_REMOTE; 1888 1889 scninit(cn->cn_dev, scnconsrate); 1890 } 1891 1892 /* Used by scncninit and kgdb startup. */ 1893 int 1894 scninit(dev_t dev, int rate) 1895 { 1896 /* XXX - maintain PROM's settings */ 1897 #if 0 1898 volatile u_char *du_base = 1899 (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004); 1900 int unit = DEV_UNIT(dev); 1901 1902 du_base[DU_OPSET] = 1903 SCN_CONSCHAN ? (OP_RTSB | OP_DTRB) : (OP_RTSA | OP_DTRA); 1904 scn_config(unit, SCN_CONSCHAN, rate, rate, 1905 MR1_PNONE | MR1_CS8, MR2_STOP1); 1906 #endif 1907 return (0); 1908 } 1909 1910 /* 1911 * Console kernel input character routine. 1912 */ 1913 int 1914 scncngetc(dev_t dev) 1915 { 1916 volatile u_char *ch_base = 1917 (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004); 1918 char c; 1919 int s; 1920 1921 s = spltty(); 1922 1923 while ((ch_base[CH_SR] & SR_RX_RDY) == 0) 1924 ; 1925 c = ch_base[CH_DAT]; 1926 1927 splx(s); 1928 return c; 1929 } 1930 1931 void 1932 scncnpollc(dev_t dev, int on) 1933 { 1934 } 1935 1936 /* 1937 * Console kernel output character routine. 1938 */ 1939 void 1940 scncnputc(dev_t dev, int c) 1941 { 1942 volatile u_char *ch_base = 1943 (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004); 1944 volatile u_char *du_base = 1945 (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004); 1946 int s; 1947 1948 s = spltty(); 1949 1950 if (c == '\n') 1951 scncnputc(dev, '\r'); 1952 1953 while ((ch_base[CH_SR] & SR_TX_RDY) == 0) 1954 ; 1955 ch_base[CH_DAT] = c; 1956 while ((ch_base[CH_SR] & SR_TX_RDY) == 0) 1957 ; 1958 du_base[DU_ISR]; 1959 1960 splx(s); 1961 } 1962