1 /* $NetBSD: crmfb.c,v 1.37 2013/12/16 15:45:29 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Jared D. McNeill <jmcneill@invisible.ca> 5 * 2008 Michael Lorenz <macallan@netbsd.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * SGI-CRM (O2) Framebuffer driver 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: crmfb.c,v 1.37 2013/12/16 15:45:29 mrg Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 42 #define _SGIMIPS_BUS_DMA_PRIVATE 43 #include <machine/autoconf.h> 44 #include <sys/bus.h> 45 #include <machine/machtype.h> 46 #include <machine/vmparam.h> 47 48 #include <dev/arcbios/arcbios.h> 49 #include <dev/arcbios/arcbiosvar.h> 50 51 #include <dev/wscons/wsdisplayvar.h> 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wsfont/wsfont.h> 54 #include <dev/rasops/rasops.h> 55 #include <dev/wscons/wsdisplay_vconsvar.h> 56 57 #include <dev/i2c/i2cvar.h> 58 #include <dev/i2c/i2c_bitbang.h> 59 #include <dev/i2c/ddcvar.h> 60 #include <dev/videomode/videomode.h> 61 #include <dev/videomode/edidvar.h> 62 63 #include <arch/sgimips/dev/crmfbreg.h> 64 65 #include "opt_crmfb.h" 66 67 #ifdef CRMFB_DEBUG 68 #define DPRINTF printf 69 #else 70 #define DPRINTF while (0) printf 71 #endif 72 73 struct wsscreen_descr crmfb_defaultscreen = { 74 "default", 75 0, 0, 76 NULL, 77 8, 16, 78 WSSCREEN_WSCOLORS, 79 NULL, 80 }; 81 82 const struct wsscreen_descr *_crmfb_scrlist[] = { 83 &crmfb_defaultscreen, 84 }; 85 86 struct wsscreen_list crmfb_screenlist = { 87 sizeof(_crmfb_scrlist) / sizeof(struct wsscreen_descr *), 88 _crmfb_scrlist 89 }; 90 91 static struct vcons_screen crmfb_console_screen; 92 93 static int crmfb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 94 static paddr_t crmfb_mmap(void *, void *, off_t, int); 95 static void crmfb_init_screen(void *, struct vcons_screen *, int, long *); 96 97 struct wsdisplay_accessops crmfb_accessops = { 98 crmfb_ioctl, 99 crmfb_mmap, 100 NULL, /* alloc_screen */ 101 NULL, /* free_screen */ 102 NULL, /* show_screen */ 103 NULL, /* load_font */ 104 NULL, /* pollc */ 105 NULL, /* scroll */ 106 }; 107 108 /* Memory to allocate to SGI-CRM -- remember, this is stolen from 109 * host memory! 110 */ 111 #define CRMFB_TILESIZE (512*128) 112 113 static int crmfb_match(device_t, struct cfdata *, void *); 114 static void crmfb_attach(device_t, device_t, void *); 115 int crmfb_probe(void); 116 117 #define KERNADDR(p) ((void *)((p).addr)) 118 #define DMAADDR(p) ((p).map->dm_segs[0].ds_addr) 119 120 #define CRMFB_REG_MASK(msb, lsb) \ 121 ( (((uint32_t) 1 << ((msb)-(lsb)+1)) - 1) << (lsb) ) 122 123 124 struct crmfb_dma { 125 bus_dmamap_t map; 126 void *addr; 127 bus_dma_segment_t segs[1]; 128 int nsegs; 129 size_t size; 130 }; 131 132 struct crmfb_softc { 133 device_t sc_dev; 134 struct vcons_data sc_vd; 135 struct i2c_controller sc_i2c; 136 int sc_dir; 137 138 bus_space_tag_t sc_iot; 139 bus_space_handle_t sc_ioh; 140 bus_space_handle_t sc_reh; 141 142 bus_dma_tag_t sc_dmat; 143 144 struct crmfb_dma sc_dma; 145 struct crmfb_dma sc_dmai; 146 147 int sc_width; 148 int sc_height; 149 int sc_depth; 150 int sc_console_depth; 151 int sc_tiles_x, sc_tiles_y; 152 uint32_t sc_fbsize; 153 int sc_mte_direction; 154 int sc_mte_x_shift; 155 uint32_t sc_mte_mode; 156 uint8_t *sc_scratch; 157 paddr_t sc_linear; 158 int sc_wsmode; 159 struct edid_info sc_edid_info; 160 161 /* cursor stuff */ 162 int sc_cur_x; 163 int sc_cur_y; 164 int sc_hot_x; 165 int sc_hot_y; 166 167 u_char sc_cmap_red[256]; 168 u_char sc_cmap_green[256]; 169 u_char sc_cmap_blue[256]; 170 }; 171 172 static int crmfb_putcmap(struct crmfb_softc *, struct wsdisplay_cmap *); 173 static int crmfb_getcmap(struct crmfb_softc *, struct wsdisplay_cmap *); 174 static void crmfb_set_palette(struct crmfb_softc *, 175 int, uint8_t, uint8_t, uint8_t); 176 static int crmfb_set_curpos(struct crmfb_softc *, int, int); 177 static int crmfb_gcursor(struct crmfb_softc *, struct wsdisplay_cursor *); 178 static int crmfb_scursor(struct crmfb_softc *, struct wsdisplay_cursor *); 179 static inline void crmfb_write_reg(struct crmfb_softc *, int, uint32_t); 180 static inline uint32_t crmfb_read_reg(struct crmfb_softc *, int); 181 static int crmfb_wait_dma_idle(struct crmfb_softc *); 182 183 /* setup video hw in given colour depth */ 184 static int crmfb_setup_video(struct crmfb_softc *, int); 185 static void crmfb_setup_palette(struct crmfb_softc *); 186 187 static void crmfb_fill_rect(struct crmfb_softc *, int, int, int, int, uint32_t); 188 static void crmfb_bitblt(struct crmfb_softc *, int, int, int, int, int, int, 189 uint32_t); 190 static void crmfb_scroll(struct crmfb_softc *, int, int, int, int, int, int); 191 192 static void crmfb_copycols(void *, int, int, int, int); 193 static void crmfb_erasecols(void *, int, int, int, long); 194 static void crmfb_copyrows(void *, int, int, int); 195 static void crmfb_eraserows(void *, int, int, long); 196 static void crmfb_cursor(void *, int, int, int); 197 static void crmfb_putchar(void *, int, int, u_int, long); 198 199 /* I2C glue */ 200 static int crmfb_i2c_acquire_bus(void *, int); 201 static void crmfb_i2c_release_bus(void *, int); 202 static int crmfb_i2c_send_start(void *, int); 203 static int crmfb_i2c_send_stop(void *, int); 204 static int crmfb_i2c_initiate_xfer(void *, i2c_addr_t, int); 205 static int crmfb_i2c_read_byte(void *, uint8_t *, int); 206 static int crmfb_i2c_write_byte(void *, uint8_t, int); 207 208 /* I2C bitbang glue */ 209 static void crmfb_i2cbb_set_bits(void *, uint32_t); 210 static void crmfb_i2cbb_set_dir(void *, uint32_t); 211 static uint32_t crmfb_i2cbb_read(void *); 212 213 static const struct i2c_bitbang_ops crmfb_i2cbb_ops = { 214 crmfb_i2cbb_set_bits, 215 crmfb_i2cbb_set_dir, 216 crmfb_i2cbb_read, 217 { 218 CRMFB_I2C_SDA, 219 CRMFB_I2C_SCL, 220 0, 221 1 222 } 223 }; 224 static void crmfb_setup_ddc(struct crmfb_softc *); 225 226 /* mode setting stuff */ 227 static uint32_t calc_pll(int); /* frequency in kHz */ 228 static int crmfb_set_mode(struct crmfb_softc *, const struct videomode *); 229 230 CFATTACH_DECL_NEW(crmfb, sizeof(struct crmfb_softc), 231 crmfb_match, crmfb_attach, NULL, NULL); 232 233 static int 234 crmfb_match(device_t parent, struct cfdata *cf, void *opaque) 235 { 236 return crmfb_probe(); 237 } 238 239 static void 240 crmfb_attach(device_t parent, device_t self, void *opaque) 241 { 242 struct mainbus_attach_args *ma; 243 struct crmfb_softc *sc; 244 struct rasops_info *ri; 245 struct wsemuldisplaydev_attach_args aa; 246 uint32_t d, h; 247 uint16_t *p; 248 unsigned long v; 249 long defattr; 250 const char *consdev; 251 int rv, i; 252 253 sc = device_private(self); 254 sc->sc_dev = self; 255 256 ma = (struct mainbus_attach_args *)opaque; 257 258 sc->sc_iot = SGIMIPS_BUS_SPACE_CRIME; 259 sc->sc_dmat = &sgimips_default_bus_dma_tag; 260 sc->sc_wsmode = WSDISPLAYIO_MODE_EMUL; 261 262 aprint_normal(": SGI CRIME Graphics Display Engine\n"); 263 rv = bus_space_map(sc->sc_iot, ma->ma_addr, 0 /* XXX */, 264 BUS_SPACE_MAP_LINEAR, &sc->sc_ioh); 265 if (rv) 266 panic("crmfb_attach: can't map I/O space"); 267 rv = bus_space_map(sc->sc_iot, 0x15000000, 0x6000, 0, &sc->sc_reh); 268 if (rv) 269 panic("crmfb_attach: can't map rendering engine"); 270 271 /* determine mode configured by firmware */ 272 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_VT_HCMAP); 273 sc->sc_width = (d >> CRMFB_VT_HCMAP_ON_SHIFT) & 0xfff; 274 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_VT_VCMAP); 275 sc->sc_height = (d >> CRMFB_VT_VCMAP_ON_SHIFT) & 0xfff; 276 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_TILESIZE); 277 h = (d >> CRMFB_FRM_TILESIZE_DEPTH_SHIFT) & 0x3; 278 if (h == 0) 279 sc->sc_depth = 8; 280 else if (h == 1) 281 sc->sc_depth = 16; 282 else 283 sc->sc_depth = 32; 284 285 if (sc->sc_width == 0 || sc->sc_height == 0) { 286 aprint_error_dev(sc->sc_dev, 287 "device unusable if not setup by firmware\n"); 288 bus_space_unmap(sc->sc_iot, sc->sc_ioh, 0 /* XXX */); 289 return; 290 } 291 292 aprint_normal_dev(sc->sc_dev, "initial resolution %dx%d\n", 293 sc->sc_width, sc->sc_height); 294 295 sc->sc_console_depth = 8; 296 297 crmfb_setup_ddc(sc); 298 if ((sc->sc_edid_info.edid_preferred_mode != NULL)) { 299 if (crmfb_set_mode(sc, sc->sc_edid_info.edid_preferred_mode)) 300 aprint_normal_dev(sc->sc_dev, "using %dx%d\n", 301 sc->sc_width, sc->sc_height); 302 } 303 /* 304 * first determine how many tiles we need 305 * in 32bit each tile is 128x128 pixels 306 */ 307 sc->sc_tiles_x = (sc->sc_width + 127) >> 7; 308 sc->sc_tiles_y = (sc->sc_height + 127) >> 7; 309 sc->sc_fbsize = 0x10000 * sc->sc_tiles_x * sc->sc_tiles_y; 310 311 sc->sc_dmai.size = 256 * sizeof(uint16_t); 312 rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmai.size, 65536, 0, 313 sc->sc_dmai.segs, 314 sizeof(sc->sc_dmai.segs) / sizeof(sc->sc_dmai.segs[0]), 315 &sc->sc_dmai.nsegs, BUS_DMA_NOWAIT); 316 if (rv) 317 panic("crmfb_attach: can't allocate DMA memory"); 318 rv = bus_dmamem_map(sc->sc_dmat, sc->sc_dmai.segs, sc->sc_dmai.nsegs, 319 sc->sc_dmai.size, &sc->sc_dmai.addr, 320 BUS_DMA_NOWAIT); 321 if (rv) 322 panic("crmfb_attach: can't map DMA memory"); 323 rv = bus_dmamap_create(sc->sc_dmat, sc->sc_dmai.size, 1, 324 sc->sc_dmai.size, 0, BUS_DMA_NOWAIT, &sc->sc_dmai.map); 325 if (rv) 326 panic("crmfb_attach: can't create DMA map"); 327 rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmai.map, sc->sc_dmai.addr, 328 sc->sc_dmai.size, NULL, BUS_DMA_NOWAIT); 329 if (rv) 330 panic("crmfb_attach: can't load DMA map"); 331 332 /* allocate an extra 64Kb for a linear buffer */ 333 sc->sc_dma.size = 0x10000 * (16 * sc->sc_tiles_x + 1); 334 rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dma.size, 65536, 0, 335 sc->sc_dma.segs, 336 sizeof(sc->sc_dma.segs) / sizeof(sc->sc_dma.segs[0]), 337 &sc->sc_dma.nsegs, BUS_DMA_NOWAIT); 338 if (rv) 339 panic("crmfb_attach: can't allocate DMA memory"); 340 rv = bus_dmamem_map(sc->sc_dmat, sc->sc_dma.segs, sc->sc_dma.nsegs, 341 sc->sc_dma.size, &sc->sc_dma.addr, 342 BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 343 if (rv) 344 panic("crmfb_attach: can't map DMA memory"); 345 rv = bus_dmamap_create(sc->sc_dmat, sc->sc_dma.size, 1, 346 sc->sc_dma.size, 0, BUS_DMA_NOWAIT, &sc->sc_dma.map); 347 if (rv) 348 panic("crmfb_attach: can't create DMA map"); 349 rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dma.map, sc->sc_dma.addr, 350 sc->sc_dma.size, NULL, BUS_DMA_NOWAIT); 351 if (rv) 352 panic("crmfb_attach: can't load DMA map"); 353 354 p = KERNADDR(sc->sc_dmai); 355 v = (unsigned long)DMAADDR(sc->sc_dma); 356 for (i = 0; i < (sc->sc_tiles_x * sc->sc_tiles_y); i++) { 357 p[i] = ((uint32_t)v >> 16) + i; 358 } 359 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmai.map, 0, sc->sc_dmai.size, 360 BUS_DMASYNC_PREWRITE); 361 sc->sc_scratch = (char *)KERNADDR(sc->sc_dma) + (0xf0000 * sc->sc_tiles_x); 362 sc->sc_linear = (paddr_t)DMAADDR(sc->sc_dma) + 0x100000 * sc->sc_tiles_x; 363 364 aprint_normal_dev(sc->sc_dev, "allocated %d byte fb @ %p (%p)\n", 365 sc->sc_fbsize, KERNADDR(sc->sc_dmai), KERNADDR(sc->sc_dma)); 366 367 crmfb_setup_video(sc, sc->sc_console_depth); 368 ri = &crmfb_console_screen.scr_ri; 369 memset(ri, 0, sizeof(struct rasops_info)); 370 371 vcons_init(&sc->sc_vd, sc, &crmfb_defaultscreen, &crmfb_accessops); 372 sc->sc_vd.init_screen = crmfb_init_screen; 373 crmfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 374 vcons_init_screen(&sc->sc_vd, &crmfb_console_screen, 1, &defattr); 375 376 crmfb_defaultscreen.ncols = ri->ri_cols; 377 crmfb_defaultscreen.nrows = ri->ri_rows; 378 crmfb_defaultscreen.textops = &ri->ri_ops; 379 crmfb_defaultscreen.capabilities = ri->ri_caps; 380 crmfb_defaultscreen.modecookie = NULL; 381 382 crmfb_setup_palette(sc); 383 crmfb_fill_rect(sc, 0, 0, sc->sc_width, sc->sc_height, 384 ri->ri_devcmap[(defattr >> 16) & 0xff]); 385 386 consdev = arcbios_GetEnvironmentVariable("ConsoleOut"); 387 if (consdev != NULL && strcmp(consdev, "video()") == 0) { 388 wsdisplay_cnattach(&crmfb_defaultscreen, ri, 0, 0, defattr); 389 vcons_replay_msgbuf(&crmfb_console_screen); 390 aa.console = 1; 391 } else 392 aa.console = 0; 393 aa.scrdata = &crmfb_screenlist; 394 aa.accessops = &crmfb_accessops; 395 aa.accesscookie = &sc->sc_vd; 396 397 config_found(self, &aa, wsemuldisplaydevprint); 398 399 sc->sc_cur_x = 0; 400 sc->sc_cur_y = 0; 401 sc->sc_hot_x = 0; 402 sc->sc_hot_y = 0; 403 404 return; 405 } 406 407 int 408 crmfb_probe(void) 409 { 410 411 if (mach_type != MACH_SGI_IP32) 412 return 0; 413 414 return 1; 415 } 416 417 static int 418 crmfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 419 { 420 struct vcons_data *vd; 421 struct crmfb_softc *sc; 422 struct wsdisplay_fbinfo *wdf; 423 int nmode; 424 425 vd = (struct vcons_data *)v; 426 sc = (struct crmfb_softc *)vd->cookie; 427 428 switch (cmd) { 429 case WSDISPLAYIO_GTYPE: 430 /* not really, but who cares? */ 431 /* wsfb does */ 432 *(u_int *)data = WSDISPLAY_TYPE_CRIME; 433 return 0; 434 case WSDISPLAYIO_GINFO: 435 if (vd->active != NULL) { 436 wdf = (void *)data; 437 wdf->height = sc->sc_height; 438 wdf->width = sc->sc_width; 439 wdf->depth = 32; 440 wdf->cmsize = 256; 441 return 0; 442 } else 443 return ENODEV; 444 case WSDISPLAYIO_GETCMAP: 445 if (sc->sc_depth == 8) 446 return crmfb_getcmap(sc, (struct wsdisplay_cmap *)data); 447 else 448 return EINVAL; 449 case WSDISPLAYIO_PUTCMAP: 450 if (sc->sc_depth == 8) 451 return crmfb_putcmap(sc, (struct wsdisplay_cmap *)data); 452 else 453 return EINVAL; 454 case WSDISPLAYIO_LINEBYTES: 455 *(u_int *)data = sc->sc_width * sc->sc_depth / 8; 456 return 0; 457 case WSDISPLAYIO_SMODE: 458 nmode = *(int *)data; 459 if (nmode != sc->sc_wsmode) { 460 sc->sc_wsmode = nmode; 461 if (nmode == WSDISPLAYIO_MODE_EMUL) { 462 crmfb_setup_video(sc, sc->sc_console_depth); 463 crmfb_setup_palette(sc); 464 vcons_redraw_screen(vd->active); 465 } else { 466 crmfb_setup_video(sc, 32); 467 } 468 } 469 return 0; 470 case WSDISPLAYIO_SVIDEO: 471 case WSDISPLAYIO_GVIDEO: 472 return ENODEV; /* not supported yet */ 473 474 case WSDISPLAYIO_GCURPOS: 475 { 476 struct wsdisplay_curpos *pos; 477 478 pos = (struct wsdisplay_curpos *)data; 479 pos->x = sc->sc_cur_x; 480 pos->y = sc->sc_cur_y; 481 } 482 return 0; 483 case WSDISPLAYIO_SCURPOS: 484 { 485 struct wsdisplay_curpos *pos; 486 487 pos = (struct wsdisplay_curpos *)data; 488 crmfb_set_curpos(sc, pos->x, pos->y); 489 } 490 return 0; 491 case WSDISPLAYIO_GCURMAX: 492 { 493 struct wsdisplay_curpos *pos; 494 495 pos = (struct wsdisplay_curpos *)data; 496 pos->x = 32; 497 pos->y = 32; 498 } 499 return 0; 500 case WSDISPLAYIO_GCURSOR: 501 { 502 struct wsdisplay_cursor *cu; 503 504 cu = (struct wsdisplay_cursor *)data; 505 return crmfb_gcursor(sc, cu); 506 } 507 case WSDISPLAYIO_SCURSOR: 508 { 509 struct wsdisplay_cursor *cu; 510 511 cu = (struct wsdisplay_cursor *)data; 512 return crmfb_scursor(sc, cu); 513 } 514 } 515 return EPASSTHROUGH; 516 } 517 518 static paddr_t 519 crmfb_mmap(void *v, void *vs, off_t offset, int prot) 520 { 521 struct vcons_data *vd; 522 struct crmfb_softc *sc; 523 paddr_t pa; 524 525 vd = (struct vcons_data *)v; 526 sc = (struct crmfb_softc *)vd->cookie; 527 528 /* we probably shouldn't let anyone mmap the framebuffer */ 529 #if 1 530 if (offset >= 0 && offset < (0x100000 * sc->sc_tiles_x)) { 531 pa = bus_dmamem_mmap(sc->sc_dmat, sc->sc_dma.segs, 532 sc->sc_dma.nsegs, offset, prot, 533 BUS_DMA_WAITOK | BUS_DMA_COHERENT); 534 return pa; 535 } 536 #endif 537 /* 538 * here would the TLBs be but we don't want to show them to userland 539 * so we return the page containing the status register 540 */ 541 if ((offset >= 0x15000000) && (offset < 0x15002000)) 542 return bus_space_mmap(sc->sc_iot, 0x15004000, 0, prot, 0); 543 /* now the actual engine registers */ 544 if ((offset >= 0x15002000) && (offset < 0x15005000)) 545 return bus_space_mmap(sc->sc_iot, offset, 0, prot, 0); 546 /* and now the scratch area */ 547 if ((offset >= 0x15010000) && (offset < 0x15020000)) 548 return bus_dmamem_mmap(sc->sc_dmat, sc->sc_dma.segs, 549 sc->sc_dma.nsegs, 550 offset + (0x100000 * sc->sc_tiles_x) - 0x15010000, 551 prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 552 return -1; 553 } 554 555 static void 556 crmfb_init_screen(void *c, struct vcons_screen *scr, int existing, 557 long *defattr) 558 { 559 struct crmfb_softc *sc; 560 struct rasops_info *ri; 561 562 sc = (struct crmfb_softc *)c; 563 ri = &scr->scr_ri; 564 565 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 566 ri->ri_depth = sc->sc_console_depth; 567 ri->ri_width = sc->sc_width; 568 ri->ri_height = sc->sc_height; 569 ri->ri_stride = ri->ri_width * (ri->ri_depth / 8); 570 #if 1 571 switch (ri->ri_depth) { 572 case 16: 573 ri->ri_rnum = ri->ri_gnum = ri->ri_bnum = 5; 574 ri->ri_rpos = 11; 575 ri->ri_gpos = 6; 576 ri->ri_bpos = 1; 577 break; 578 case 32: 579 ri->ri_rnum = ri->ri_gnum = ri->ri_bnum = 8; 580 ri->ri_rpos = 8; 581 ri->ri_gpos = 16; 582 ri->ri_bpos = 24; 583 break; 584 } 585 #endif 586 ri->ri_bits = KERNADDR(sc->sc_dma); 587 588 if (existing) 589 ri->ri_flg |= RI_CLEAR; 590 591 rasops_init(ri, 0, 0); 592 ri->ri_caps = WSSCREEN_WSCOLORS; 593 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 594 ri->ri_width / ri->ri_font->fontwidth); 595 ri->ri_hw = scr; 596 597 ri->ri_ops.cursor = crmfb_cursor; 598 ri->ri_ops.copyrows = crmfb_copyrows; 599 ri->ri_ops.eraserows = crmfb_eraserows; 600 ri->ri_ops.copycols = crmfb_copycols; 601 ri->ri_ops.erasecols = crmfb_erasecols; 602 ri->ri_ops.putchar = crmfb_putchar; 603 604 return; 605 } 606 607 static int 608 crmfb_putcmap(struct crmfb_softc *sc, struct wsdisplay_cmap *cm) 609 { 610 u_int idx, cnt; 611 u_char r[256], g[256], b[256]; 612 u_char *rp, *gp, *bp; 613 int rv, i; 614 615 idx = cm->index; 616 cnt = cm->count; 617 618 if (idx >= 255 || cnt > 256 || idx + cnt > 256) 619 return EINVAL; 620 621 rv = copyin(cm->red, &r[idx], cnt); 622 if (rv) 623 return rv; 624 rv = copyin(cm->green, &g[idx], cnt); 625 if (rv) 626 return rv; 627 rv = copyin(cm->blue, &b[idx], cnt); 628 if (rv) 629 return rv; 630 631 memcpy(&sc->sc_cmap_red[idx], &r[idx], cnt); 632 memcpy(&sc->sc_cmap_green[idx], &g[idx], cnt); 633 memcpy(&sc->sc_cmap_blue[idx], &b[idx], cnt); 634 635 rp = &sc->sc_cmap_red[idx]; 636 gp = &sc->sc_cmap_green[idx]; 637 bp = &sc->sc_cmap_blue[idx]; 638 639 for (i = 0; i < cnt; i++) { 640 crmfb_set_palette(sc, idx, *rp, *gp, *bp); 641 idx++; 642 rp++, gp++, bp++; 643 } 644 645 return 0; 646 } 647 648 static int 649 crmfb_getcmap(struct crmfb_softc *sc, struct wsdisplay_cmap *cm) 650 { 651 u_int idx, cnt; 652 int rv; 653 654 idx = cm->index; 655 cnt = cm->count; 656 657 if (idx >= 255 || cnt > 256 || idx + cnt > 256) 658 return EINVAL; 659 660 rv = copyout(&sc->sc_cmap_red[idx], cm->red, cnt); 661 if (rv) 662 return rv; 663 rv = copyout(&sc->sc_cmap_green[idx], cm->green, cnt); 664 if (rv) 665 return rv; 666 rv = copyout(&sc->sc_cmap_blue[idx], cm->blue, cnt); 667 if (rv) 668 return rv; 669 670 return 0; 671 } 672 673 static void 674 crmfb_set_palette(struct crmfb_softc *sc, int reg, uint8_t r, uint8_t g, 675 uint8_t b) 676 { 677 uint32_t val; 678 679 if (reg > 255 || sc->sc_depth != 8) 680 return; 681 682 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_CMAP_FIFO) >= 63) 683 DELAY(10); 684 685 val = (r << 8) | (g << 16) | (b << 24); 686 crmfb_write_reg(sc, CRMFB_CMAP + (reg * 4), val); 687 688 return; 689 } 690 691 static int 692 crmfb_set_curpos(struct crmfb_softc *sc, int x, int y) 693 { 694 uint32_t val; 695 696 sc->sc_cur_x = x; 697 sc->sc_cur_y = y; 698 699 val = ((x - sc->sc_hot_x) & 0xffff) | ((y - sc->sc_hot_y) << 16); 700 crmfb_write_reg(sc, CRMFB_CURSOR_POS, val); 701 702 return 0; 703 } 704 705 static int 706 crmfb_gcursor(struct crmfb_softc *sc, struct wsdisplay_cursor *cur) 707 { 708 /* do nothing for now */ 709 return 0; 710 } 711 712 static int 713 crmfb_scursor(struct crmfb_softc *sc, struct wsdisplay_cursor *cur) 714 { 715 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 716 717 crmfb_write_reg(sc, CRMFB_CURSOR_CONTROL, cur->enable ? 1 : 0); 718 } 719 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 720 721 sc->sc_hot_x = cur->hot.x; 722 sc->sc_hot_y = cur->hot.y; 723 } 724 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 725 726 crmfb_set_curpos(sc, cur->pos.x, cur->pos.y); 727 } 728 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 729 int i; 730 uint32_t val; 731 732 for (i = 0; i < cur->cmap.count; i++) { 733 val = (cur->cmap.red[i] << 24) | 734 (cur->cmap.green[i] << 16) | 735 (cur->cmap.blue[i] << 8); 736 crmfb_write_reg(sc, CRMFB_CURSOR_CMAP0 + 737 ((i + cur->cmap.index) << 2), val); 738 } 739 } 740 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 741 742 int i, j, cnt = 0; 743 uint32_t latch = 0, omask; 744 uint8_t imask; 745 for (i = 0; i < 64; i++) { 746 omask = 0x80000000; 747 imask = 0x01; 748 cur->image[cnt] &= cur->mask[cnt]; 749 for (j = 0; j < 8; j++) { 750 if (cur->image[cnt] & imask) 751 latch |= omask; 752 omask >>= 1; 753 if (cur->mask[cnt] & imask) 754 latch |= omask; 755 omask >>= 1; 756 imask <<= 1; 757 } 758 cnt++; 759 imask = 0x01; 760 cur->image[cnt] &= cur->mask[cnt]; 761 for (j = 0; j < 8; j++) { 762 if (cur->image[cnt] & imask) 763 latch |= omask; 764 omask >>= 1; 765 if (cur->mask[cnt] & imask) 766 latch |= omask; 767 omask >>= 1; 768 imask <<= 1; 769 } 770 cnt++; 771 crmfb_write_reg(sc, CRMFB_CURSOR_BITMAP + (i << 2), 772 latch); 773 latch = 0; 774 } 775 } 776 return 0; 777 } 778 779 static inline void 780 crmfb_write_reg(struct crmfb_softc *sc, int offset, uint32_t val) 781 { 782 783 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 784 wbflush(); 785 } 786 787 static inline uint32_t 788 crmfb_read_reg(struct crmfb_softc *sc, int offset) 789 { 790 791 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset); 792 } 793 794 static int 795 crmfb_wait_dma_idle(struct crmfb_softc *sc) 796 { 797 int bail = 100000, idle; 798 799 do { 800 idle = ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 801 CRMFB_OVR_CONTROL) & 1) == 0) && 802 ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 803 CRMFB_FRM_CONTROL) & 1) == 0) && 804 ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 805 CRMFB_DID_CONTROL) & 1) == 0); 806 if (!idle) 807 delay(10); 808 bail--; 809 } while ((!idle) && (bail > 0)); 810 return idle; 811 } 812 813 static int 814 crmfb_setup_video(struct crmfb_softc *sc, int depth) 815 { 816 uint64_t reg; 817 uint32_t d, h, mode, page; 818 int i, bail, tile_width, tlbptr, lptr, j, tx, shift, overhang; 819 const char *wantsync; 820 uint16_t v; 821 822 /* disable DMA */ 823 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_OVR_CONTROL); 824 d &= ~(1 << CRMFB_OVR_CONTROL_DMAEN_SHIFT); 825 crmfb_write_reg(sc, CRMFB_OVR_CONTROL, d); 826 DELAY(50000); 827 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 828 d &= ~(1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 829 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 830 DELAY(50000); 831 crmfb_write_reg(sc, CRMFB_DID_CONTROL, d); 832 DELAY(50000); 833 834 if (!crmfb_wait_dma_idle(sc)) 835 aprint_error("crmfb: crmfb_wait_dma_idle timed out\n"); 836 837 /* ensure that CRM starts drawing at the top left of the screen 838 * when we re-enable DMA later 839 */ 840 d = (1 << CRMFB_VT_XY_FREEZE_SHIFT); 841 crmfb_write_reg(sc, CRMFB_VT_XY, d); 842 delay(1000); 843 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK); 844 d &= ~(1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT); 845 crmfb_write_reg(sc, CRMFB_DOTCLOCK, d); 846 847 /* wait for dotclock to turn off */ 848 bail = 10000; 849 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK) & 850 (1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT)) && (bail > 0)) { 851 delay(10); 852 bail--; 853 } 854 855 /* reset FIFO */ 856 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_TILESIZE); 857 d |= (1 << CRMFB_FRM_TILESIZE_FIFOR_SHIFT); 858 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 859 d &= ~(1 << CRMFB_FRM_TILESIZE_FIFOR_SHIFT); 860 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 861 862 /* setup colour mode */ 863 switch (depth) { 864 case 8: 865 h = CRMFB_MODE_TYP_I8; 866 tile_width = 512; 867 break; 868 case 16: 869 h = CRMFB_MODE_TYP_ARGB5; 870 tile_width = 256; 871 break; 872 case 32: 873 h = CRMFB_MODE_TYP_RGB8; 874 tile_width = 128; 875 break; 876 default: 877 panic("Unsupported depth"); 878 } 879 d = h << CRMFB_MODE_TYP_SHIFT; 880 d |= CRMFB_MODE_BUF_BOTH << CRMFB_MODE_BUF_SHIFT; 881 for (i = 0; i < (32 * 4); i += 4) 882 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CRMFB_MODE + i, d); 883 wbflush(); 884 885 /* setup tile pointer, but don't turn on DMA yet! */ 886 h = DMAADDR(sc->sc_dmai); 887 d = (h >> 9) << CRMFB_FRM_CONTROL_TILEPTR_SHIFT; 888 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 889 890 /* init framebuffer width and pixel size */ 891 /*d = (1 << CRMFB_FRM_TILESIZE_WIDTH_SHIFT);*/ 892 893 d = ((int)(sc->sc_width / tile_width)) << 894 CRMFB_FRM_TILESIZE_WIDTH_SHIFT; 895 overhang = sc->sc_width % tile_width; 896 if (overhang != 0) { 897 uint32_t val; 898 DPRINTF("tile width: %d\n", tile_width); 899 DPRINTF("overhang: %d\n", overhang); 900 val = (overhang * (depth >> 3)) >> 5; 901 DPRINTF("reg: %08x\n", val); 902 d |= (val & 0x1f); 903 DPRINTF("d: %08x\n", d); 904 } 905 906 switch (depth) { 907 case 8: 908 h = CRMFB_FRM_TILESIZE_DEPTH_8; 909 break; 910 case 16: 911 h = CRMFB_FRM_TILESIZE_DEPTH_16; 912 break; 913 case 32: 914 h = CRMFB_FRM_TILESIZE_DEPTH_32; 915 break; 916 default: 917 panic("Unsupported depth"); 918 } 919 d |= (h << CRMFB_FRM_TILESIZE_DEPTH_SHIFT); 920 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 921 922 /*h = sc->sc_width * sc->sc_height / (512 / (depth >> 3));*/ 923 h = sc->sc_height; 924 d = h << CRMFB_FRM_PIXSIZE_HEIGHT_SHIFT; 925 crmfb_write_reg(sc, CRMFB_FRM_PIXSIZE, d); 926 927 /* turn off firmware overlay and hardware cursor */ 928 crmfb_write_reg(sc, CRMFB_OVR_WIDTH_TILE, 0); 929 crmfb_write_reg(sc, CRMFB_CURSOR_CONTROL, 0); 930 931 /* turn on DMA for the framebuffer */ 932 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 933 d |= (1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 934 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 935 936 /* enable drawing again */ 937 crmfb_write_reg(sc, CRMFB_VT_XY, 0); 938 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK); 939 d |= (1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT); 940 crmfb_write_reg(sc, CRMFB_DOTCLOCK, d); 941 942 /* turn off sync-on-green */ 943 944 wantsync = arcbios_GetEnvironmentVariable("SyncOnGreen"); 945 if ( (wantsync != NULL) && (wantsync[0] == 'n') ) { 946 d = ( 1 << CRMFB_VT_FLAGS_SYNC_LOW_LSB) & 947 CRMFB_REG_MASK(CRMFB_VT_FLAGS_SYNC_LOW_MSB, 948 CRMFB_VT_FLAGS_SYNC_LOW_LSB); 949 crmfb_write_reg(sc, CRMFB_VT_FLAGS, d); 950 } 951 952 sc->sc_depth = depth; 953 954 /* finally set up the drawing engine's TLB A */ 955 v = (DMAADDR(sc->sc_dma) >> 16) & 0xffff; 956 tlbptr = 0; 957 tx = ((sc->sc_width + (tile_width - 1)) & ~(tile_width - 1)) / 958 tile_width; 959 960 DPRINTF("tx: %d\n", tx); 961 962 for (i = 0; i < 16; i++) { 963 reg = 0; 964 shift = 64; 965 lptr = 0; 966 for (j = 0; j < tx; j++) { 967 shift -= 16; 968 reg |= (((uint64_t)(v | 0x8000)) << shift); 969 if (shift == 0) { 970 shift = 64; 971 bus_space_write_8(sc->sc_iot, sc->sc_reh, 972 CRIME_RE_TLB_A + tlbptr + lptr, 973 reg); 974 DPRINTF("%04x: %016"PRIx64"\n", tlbptr + lptr, reg); 975 reg = 0; 976 lptr += 8; 977 } 978 v++; 979 } 980 if (shift != 64) { 981 bus_space_write_8(sc->sc_iot, sc->sc_reh, 982 CRIME_RE_TLB_A + tlbptr + lptr, reg); 983 DPRINTF("%04x: %016"PRIx64"\n", tlbptr + lptr, reg); 984 } 985 tlbptr += 32; 986 } 987 sc->sc_scratch = (char *)KERNADDR(sc->sc_dma) + (0xf0000 * tx); 988 989 /* now put the last 64kB into the 1st linear TLB */ 990 page = (sc->sc_linear >> 12) | 0x80000000; 991 tlbptr = 0; 992 for (i = 0; i < 8; i++) { 993 reg = ((uint64_t)page << 32) | (page + 1); 994 bus_space_write_8(sc->sc_iot, sc->sc_reh, 995 CRIME_RE_LINEAR_A + tlbptr, reg); 996 page += 2; 997 tlbptr += 8; 998 } 999 wbflush(); 1000 1001 /* do some very basic engine setup */ 1002 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_CLIPMODE, 0); 1003 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_WINOFFSET_SRC, 0); 1004 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_WINOFFSET_DST, 0); 1005 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PLANEMASK, 1006 0xffffffff); 1007 1008 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x20, 0); 1009 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x28, 0); 1010 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x30, 0); 1011 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x38, 0); 1012 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x40, 0); 1013 1014 switch (depth) { 1015 case 8: 1016 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_8 | 1017 DE_MODE_TYPE_CI | DE_MODE_PIXDEPTH_8; 1018 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1019 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1020 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1021 (MTE_DEPTH_8 << MTE_DEPTH_SHIFT); 1022 sc->sc_mte_x_shift = 0; 1023 break; 1024 case 16: 1025 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_16 | 1026 DE_MODE_TYPE_RGBA | DE_MODE_PIXDEPTH_16; 1027 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1028 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1029 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1030 (MTE_DEPTH_16 << MTE_DEPTH_SHIFT); 1031 sc->sc_mte_x_shift = 1; 1032 break; 1033 case 32: 1034 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_32 | 1035 DE_MODE_TYPE_RGBA | DE_MODE_PIXDEPTH_32; 1036 break; 1037 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1038 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1039 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1040 (MTE_DEPTH_32 << MTE_DEPTH_SHIFT); 1041 sc->sc_mte_x_shift = 2; 1042 default: 1043 panic("%s: unsuported colour depth %d\n", __func__, 1044 depth); 1045 } 1046 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_MODE_DST, mode); 1047 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_MODE_SRC, mode); 1048 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_STEP_X, 1); 1049 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_STEP_Y, 1); 1050 1051 /* initialize memory transfer engine */ 1052 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1053 sc->sc_mte_mode | MTE_MODE_COPY); 1054 sc->sc_mte_direction = 1; 1055 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST_Y_STEP, 1); 1056 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC_Y_STEP, 1); 1057 1058 return 0; 1059 } 1060 1061 static void 1062 crmfb_set_mte_direction(struct crmfb_softc *sc, int dir) 1063 { 1064 if (dir == sc->sc_mte_direction) 1065 return; 1066 1067 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST_Y_STEP, dir); 1068 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC_Y_STEP, dir); 1069 sc->sc_mte_direction = dir; 1070 } 1071 1072 static void 1073 crmfb_setup_palette(struct crmfb_softc *sc) 1074 { 1075 int i; 1076 1077 for (i = 0; i < 256; i++) { 1078 crmfb_set_palette(sc, i, rasops_cmap[(i * 3) + 2], 1079 rasops_cmap[(i * 3) + 1], rasops_cmap[(i * 3) + 0]); 1080 sc->sc_cmap_red[i] = rasops_cmap[(i * 3) + 2]; 1081 sc->sc_cmap_green[i] = rasops_cmap[(i * 3) + 1]; 1082 sc->sc_cmap_blue[i] = rasops_cmap[(i * 3) + 0]; 1083 } 1084 } 1085 1086 static inline void 1087 crmfb_wait_idle(struct crmfb_softc *sc) 1088 { 1089 int i = 0; 1090 1091 do { 1092 i++; 1093 } while (((bus_space_read_4(sc->sc_iot, sc->sc_reh, CRIME_DE_STATUS) & 1094 CRIME_DE_IDLE) == 0) && (i < 100000000)); 1095 if (i >= 100000000) 1096 aprint_error("crmfb_wait_idle() timed out\n"); 1097 } 1098 1099 static void 1100 crmfb_fill_rect(struct crmfb_softc *sc, int x, int y, int width, int height, 1101 uint32_t colour) 1102 { 1103 int rxa, rxe; 1104 1105 rxa = x << sc->sc_mte_x_shift; 1106 rxe = ((x + width) << sc->sc_mte_x_shift) - 1; 1107 crmfb_wait_idle(sc); 1108 crmfb_set_mte_direction(sc, 1); 1109 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1110 sc->sc_mte_mode | 0); 1111 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_BG, colour); 1112 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST0, 1113 (rxa << 16) | (y & 0xffff)); 1114 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1115 CRIME_MTE_DST1 | CRIME_DE_START, 1116 (rxe << 16) | ((y + height - 1) & 0xffff)); 1117 } 1118 1119 static void 1120 crmfb_bitblt(struct crmfb_softc *sc, int xs, int ys, int xd, int yd, 1121 int wi, int he, uint32_t rop) 1122 { 1123 uint32_t prim = DE_PRIM_RECTANGLE; 1124 int rxa, rya, rxe, rye, rxs, rys; 1125 crmfb_wait_idle(sc); 1126 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_DRAWMODE, 1127 DE_DRAWMODE_PLANEMASK | DE_DRAWMODE_BYTEMASK | DE_DRAWMODE_ROP | 1128 DE_DRAWMODE_XFER_EN); 1129 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_ROP, rop); 1130 if (xs < xd) { 1131 prim |= DE_PRIM_RL; 1132 rxe = xd; 1133 rxa = xd + wi - 1; 1134 rxs = xs + wi - 1; 1135 } else { 1136 prim |= DE_PRIM_LR; 1137 rxe = xd + wi - 1; 1138 rxa = xd; 1139 rxs = xs; 1140 } 1141 if (ys < yd) { 1142 prim |= DE_PRIM_BT; 1143 rye = yd; 1144 rya = yd + he - 1; 1145 rys = ys + he - 1; 1146 } else { 1147 prim |= DE_PRIM_TB; 1148 rye = yd + he - 1; 1149 rya = yd; 1150 rys = ys; 1151 } 1152 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PRIMITIVE, prim); 1153 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_ADDR_SRC, 1154 (rxs << 16) | (rys & 0xffff)); 1155 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_X_VERTEX_0, 1156 (rxa << 16) | (rya & 0xffff)); 1157 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1158 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1159 (rxe << 16) | (rye & 0xffff)); 1160 } 1161 1162 static void 1163 crmfb_scroll(struct crmfb_softc *sc, int xs, int ys, int xd, int yd, 1164 int wi, int he) 1165 { 1166 int rxa, rya, rxe, rye, rxd, ryd, rxde, ryde; 1167 1168 rxa = xs << sc->sc_mte_x_shift; 1169 rxd = xd << sc->sc_mte_x_shift; 1170 rxe = ((xs + wi) << sc->sc_mte_x_shift) - 1; 1171 rxde = ((xd + wi) << sc->sc_mte_x_shift) - 1; 1172 1173 crmfb_wait_idle(sc); 1174 1175 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1176 sc->sc_mte_mode | MTE_MODE_COPY); 1177 1178 if (ys < yd) { 1179 /* bottom to top */ 1180 rye = ys; 1181 rya = ys + he - 1; 1182 ryd = yd + he - 1; 1183 ryde = yd; 1184 crmfb_set_mte_direction(sc, -1); 1185 } else { 1186 /* top to bottom */ 1187 rye = ys + he - 1; 1188 rya = ys; 1189 ryd = yd; 1190 ryde = yd + he - 1; 1191 crmfb_set_mte_direction(sc, 1); 1192 } 1193 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC0, 1194 (rxa << 16) | rya); 1195 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC1, 1196 (rxe << 16) | rye); 1197 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1198 CRIME_MTE_DST0, 1199 (rxd << 16) | ryd); 1200 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST1 | 1201 CRIME_DE_START, 1202 (rxde << 16) | ryde); 1203 } 1204 1205 static void 1206 crmfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1207 { 1208 struct rasops_info *ri = cookie; 1209 struct vcons_screen *scr = ri->ri_hw; 1210 int32_t xs, xd, y, width, height; 1211 1212 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1213 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1214 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1215 width = ri->ri_font->fontwidth * ncols; 1216 height = ri->ri_font->fontheight; 1217 crmfb_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, 3); 1218 } 1219 1220 static void 1221 crmfb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1222 { 1223 struct rasops_info *ri = cookie; 1224 struct vcons_screen *scr = ri->ri_hw; 1225 int32_t x, y, width, height, bg; 1226 1227 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1228 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1229 width = ri->ri_font->fontwidth * ncols; 1230 height = ri->ri_font->fontheight; 1231 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1232 crmfb_fill_rect(scr->scr_cookie, x, y, width, height, bg); 1233 } 1234 1235 static void 1236 crmfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1237 { 1238 struct rasops_info *ri = cookie; 1239 struct vcons_screen *scr = ri->ri_hw; 1240 int32_t x, ys, yd, width, height; 1241 1242 x = ri->ri_xorigin; 1243 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1244 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1245 width = ri->ri_emuwidth; 1246 height = ri->ri_font->fontheight * nrows; 1247 1248 crmfb_scroll(scr->scr_cookie, x, ys, x, yd, width, height); 1249 } 1250 1251 static void 1252 crmfb_eraserows(void *cookie, int row, int nrows, long fillattr) 1253 { 1254 struct rasops_info *ri = cookie; 1255 struct vcons_screen *scr = ri->ri_hw; 1256 int32_t x, y, width, height, bg; 1257 1258 if ((row == 0) && (nrows == ri->ri_rows)) { 1259 x = y = 0; 1260 width = ri->ri_width; 1261 height = ri->ri_height; 1262 } else { 1263 x = ri->ri_xorigin; 1264 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1265 width = ri->ri_emuwidth; 1266 height = ri->ri_font->fontheight * nrows; 1267 } 1268 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1269 crmfb_fill_rect(scr->scr_cookie, x, y, width, height, bg); 1270 } 1271 1272 static void 1273 crmfb_cursor(void *cookie, int on, int row, int col) 1274 { 1275 struct rasops_info *ri = cookie; 1276 struct vcons_screen *scr = ri->ri_hw; 1277 struct crmfb_softc *sc = scr->scr_cookie; 1278 int x, y, wi,he; 1279 1280 wi = ri->ri_font->fontwidth; 1281 he = ri->ri_font->fontheight; 1282 1283 if (ri->ri_flg & RI_CURSOR) { 1284 x = ri->ri_ccol * wi + ri->ri_xorigin; 1285 y = ri->ri_crow * he + ri->ri_yorigin; 1286 crmfb_bitblt(sc, x, y, x, y, wi, he, 12); 1287 ri->ri_flg &= ~RI_CURSOR; 1288 } 1289 1290 ri->ri_crow = row; 1291 ri->ri_ccol = col; 1292 1293 if (on) 1294 { 1295 x = ri->ri_ccol * wi + ri->ri_xorigin; 1296 y = ri->ri_crow * he + ri->ri_yorigin; 1297 crmfb_bitblt(sc, x, y, x, y, wi, he, 12); 1298 ri->ri_flg |= RI_CURSOR; 1299 } 1300 } 1301 1302 static void 1303 crmfb_putchar(void *cookie, int row, int col, u_int c, long attr) 1304 { 1305 struct rasops_info *ri = cookie; 1306 struct vcons_screen *scr = ri->ri_hw; 1307 struct crmfb_softc *sc = scr->scr_cookie; 1308 struct wsdisplay_font *font = PICK_FONT(ri, c); 1309 uint32_t bg, fg; 1310 int x, y, wi, he, i, uc; 1311 uint8_t *fd8; 1312 uint16_t *fd16; 1313 void *fd; 1314 1315 wi = font->fontwidth; 1316 he = font->fontheight; 1317 1318 x = ri->ri_xorigin + col * wi; 1319 y = ri->ri_yorigin + row * he; 1320 1321 bg = ri->ri_devcmap[(attr >> 16) & 0xff]; 1322 fg = ri->ri_devcmap[(attr >> 24) & 0xff]; 1323 uc = c - font->firstchar; 1324 fd = (uint8_t *)font->data + uc * ri->ri_fontscale; 1325 if (c == 0x20) { 1326 crmfb_fill_rect(sc, x, y, wi, he, bg); 1327 } else { 1328 crmfb_wait_idle(sc); 1329 /* setup */ 1330 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_DRAWMODE, 1331 DE_DRAWMODE_PLANEMASK | DE_DRAWMODE_BYTEMASK | 1332 DE_DRAWMODE_ROP | 1333 DE_DRAWMODE_OPAQUE_STIP | DE_DRAWMODE_POLY_STIP); 1334 wbflush(); 1335 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_ROP, 3); 1336 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_FG, fg); 1337 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_BG, bg); 1338 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PRIMITIVE, 1339 DE_PRIM_RECTANGLE | DE_PRIM_LR | DE_PRIM_TB); 1340 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_STIPPLE_MODE, 1341 0x001f0000); 1342 /* now let's feed the engine */ 1343 if (font->stride == 1) { 1344 /* shovel in 8 bit quantities */ 1345 fd8 = fd; 1346 for (i = 0; i < he; i++) { 1347 /* 1348 * the pipeline should be long enough to 1349 * draw any character without having to wait 1350 */ 1351 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1352 CRIME_DE_STIPPLE_PAT, *fd8 << 24); 1353 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1354 CRIME_DE_X_VERTEX_0, (x << 16) | y); 1355 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1356 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1357 ((x + wi) << 16) | y); 1358 y++; 1359 fd8++; 1360 } 1361 } else if (font->stride == 2) { 1362 /* shovel in 16 bit quantities */ 1363 fd16 = fd; 1364 for (i = 0; i < he; i++) { 1365 /* 1366 * the pipeline should be long enough to 1367 * draw any character without having to wait 1368 */ 1369 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1370 CRIME_DE_STIPPLE_PAT, *fd16 << 16); 1371 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1372 CRIME_DE_X_VERTEX_0, (x << 16) | y); 1373 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1374 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1375 ((x + wi) << 16) | y); 1376 y++; 1377 fd16++; 1378 } 1379 } 1380 } 1381 } 1382 1383 static void 1384 crmfb_setup_ddc(struct crmfb_softc *sc) 1385 { 1386 int i; 1387 char edid_data[128]; 1388 1389 memset(edid_data, 0, 128); 1390 sc->sc_i2c.ic_cookie = sc; 1391 sc->sc_i2c.ic_acquire_bus = crmfb_i2c_acquire_bus; 1392 sc->sc_i2c.ic_release_bus = crmfb_i2c_release_bus; 1393 sc->sc_i2c.ic_send_start = crmfb_i2c_send_start; 1394 sc->sc_i2c.ic_send_stop = crmfb_i2c_send_stop; 1395 sc->sc_i2c.ic_initiate_xfer = crmfb_i2c_initiate_xfer; 1396 sc->sc_i2c.ic_read_byte = crmfb_i2c_read_byte; 1397 sc->sc_i2c.ic_write_byte = crmfb_i2c_write_byte; 1398 sc->sc_i2c.ic_exec = NULL; 1399 i = 0; 1400 while (edid_data[1] == 0 && i++ < 10) 1401 ddc_read_edid(&sc->sc_i2c, edid_data, 128); 1402 if (i > 1) 1403 aprint_debug_dev(sc->sc_dev, 1404 "had to try %d times to get EDID data\n", i); 1405 if (i < 11) { 1406 edid_parse(edid_data, &sc->sc_edid_info); 1407 edid_print(&sc->sc_edid_info); 1408 } 1409 } 1410 1411 /* I2C bitbanging */ 1412 static void 1413 crmfb_i2cbb_set_bits(void *cookie, uint32_t bits) 1414 { 1415 struct crmfb_softc *sc = cookie; 1416 1417 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CRMFB_I2C_VGA, bits ^ 3); 1418 } 1419 1420 static void 1421 crmfb_i2cbb_set_dir(void *cookie, uint32_t dir) 1422 { 1423 1424 /* Nothing to do */ 1425 } 1426 1427 static uint32_t 1428 crmfb_i2cbb_read(void *cookie) 1429 { 1430 struct crmfb_softc *sc = cookie; 1431 1432 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_I2C_VGA) ^ 3; 1433 } 1434 1435 /* higher level I2C stuff */ 1436 static int 1437 crmfb_i2c_acquire_bus(void *cookie, int flags) 1438 { 1439 1440 /* private bus */ 1441 return 0; 1442 } 1443 1444 static void 1445 crmfb_i2c_release_bus(void *cookie, int flags) 1446 { 1447 1448 /* private bus */ 1449 } 1450 1451 static int 1452 crmfb_i2c_send_start(void *cookie, int flags) 1453 { 1454 1455 return i2c_bitbang_send_start(cookie, flags, &crmfb_i2cbb_ops); 1456 } 1457 1458 static int 1459 crmfb_i2c_send_stop(void *cookie, int flags) 1460 { 1461 1462 return i2c_bitbang_send_stop(cookie, flags, &crmfb_i2cbb_ops); 1463 } 1464 1465 static int 1466 crmfb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 1467 { 1468 1469 return i2c_bitbang_initiate_xfer(cookie, addr, flags, 1470 &crmfb_i2cbb_ops); 1471 } 1472 1473 static int 1474 crmfb_i2c_read_byte(void *cookie, uint8_t *valp, int flags) 1475 { 1476 1477 return i2c_bitbang_read_byte(cookie, valp, flags, &crmfb_i2cbb_ops); 1478 } 1479 1480 static int 1481 crmfb_i2c_write_byte(void *cookie, uint8_t val, int flags) 1482 { 1483 1484 return i2c_bitbang_write_byte(cookie, val, flags, &crmfb_i2cbb_ops); 1485 } 1486 1487 /* mode setting stuff */ 1488 static uint32_t 1489 calc_pll(int f_out) 1490 { 1491 uint32_t ret; 1492 int f_in = 20000; /* 20MHz in */ 1493 int M, N, P; 1494 int error, div, best = 9999999; 1495 int ff1, ff2; 1496 int MM = 0, NN = 0, PP = 0, ff = 0; 1497 1498 /* f_out = M * f_in / (N * (1 << P) */ 1499 1500 for (P = 0; P < 4; P++) { 1501 for (N = 64; N > 0; N--) { 1502 div = N * (1 << P); 1503 M = f_out * div / f_in; 1504 if ((M < 257) && (M > 100)) { 1505 ff1 = M * f_in / div; 1506 ff2 = (M + 1) * f_in / div; 1507 error = abs(ff1 - f_out); 1508 if (error < best) { 1509 MM = M; 1510 NN = N; 1511 PP = P; 1512 ff = ff1; 1513 best = error; 1514 } 1515 error = abs(ff2 - f_out); 1516 if ((error < best) && ( M < 256)){ 1517 MM = M + 1; 1518 NN = N; 1519 PP = P; 1520 ff = ff2; 1521 best = error; 1522 } 1523 } 1524 } 1525 } 1526 DPRINTF("%d: M %d N %d P %d -> %d\n", f_out, MM, NN, PP, ff); 1527 /* now shove the parameters into the register's format */ 1528 ret = (MM - 1) | ((NN - 1) << 8) | (P << 14); 1529 return ret; 1530 } 1531 1532 static int 1533 crmfb_set_mode(struct crmfb_softc *sc, const struct videomode *mode) 1534 { 1535 uint32_t d, dc; 1536 int tmp, diff; 1537 1538 switch (mode->hdisplay % 32) { 1539 case 0: 1540 sc->sc_console_depth = 8; 1541 break; 1542 case 16: 1543 sc->sc_console_depth = 16; 1544 break; 1545 case 8: 1546 case 24: 1547 sc->sc_console_depth = 32; 1548 break; 1549 default: 1550 aprint_error_dev(sc->sc_dev, 1551 "hdisplay (%d) is not a multiple of 32\n", 1552 mode->hdisplay); 1553 return FALSE; 1554 } 1555 if (mode->dot_clock > 150000) { 1556 aprint_error_dev(sc->sc_dev, 1557 "requested dot clock is too high ( %d MHz )\n", 1558 mode->dot_clock / 1000); 1559 return FALSE; 1560 } 1561 1562 /* disable DMA */ 1563 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_OVR_CONTROL); 1564 d &= ~(1 << CRMFB_OVR_CONTROL_DMAEN_SHIFT); 1565 crmfb_write_reg(sc, CRMFB_OVR_CONTROL, d); 1566 DELAY(50000); 1567 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 1568 d &= ~(1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 1569 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 1570 DELAY(50000); 1571 crmfb_write_reg(sc, CRMFB_DID_CONTROL, d); 1572 DELAY(50000); 1573 1574 if (!crmfb_wait_dma_idle(sc)) 1575 aprint_error("crmfb: crmfb_wait_dma_idle timed out\n"); 1576 1577 /* ok, now we're good to go */ 1578 dc = calc_pll(mode->dot_clock); 1579 1580 crmfb_write_reg(sc, CRMFB_VT_XY, 1 << CRMFB_VT_XY_FREEZE_SHIFT); 1581 delay(1000); 1582 1583 /* set the dot clock pll but don't start it yet */ 1584 crmfb_write_reg(sc, CRMFB_DOTCLOCK, dc); 1585 delay(10000); 1586 1587 /* pixel counter */ 1588 d = mode->htotal | (mode->vtotal << 12); 1589 crmfb_write_reg(sc, CRMFB_VT_XYMAX, d); 1590 1591 /* video timings */ 1592 d = mode->vsync_end | (mode->vsync_start << 12); 1593 crmfb_write_reg(sc, CRMFB_VT_VSYNC, d); 1594 1595 d = mode->hsync_end | (mode->hsync_start << 12); 1596 crmfb_write_reg(sc, CRMFB_VT_HSYNC, d); 1597 1598 d = mode->vtotal | (mode->vdisplay << 12); 1599 crmfb_write_reg(sc, CRMFB_VT_VBLANK, d); 1600 1601 d = (mode->htotal - 5) | ((mode->hdisplay - 5) << 12); 1602 crmfb_write_reg(sc, CRMFB_VT_HBLANK, d); 1603 1604 d = mode->vtotal | (mode->vdisplay << 12); 1605 crmfb_write_reg(sc, CRMFB_VT_VCMAP, d); 1606 d = mode->htotal | (mode->hdisplay << 12); 1607 crmfb_write_reg(sc, CRMFB_VT_HCMAP, d); 1608 1609 d = 0; 1610 if (mode->flags & VID_NHSYNC) d |= CRMFB_VT_FLAGS_HDRV_INVERT; 1611 if (mode->flags & VID_NVSYNC) d |= CRMFB_VT_FLAGS_VDRV_INVERT; 1612 crmfb_write_reg(sc, CRMFB_VT_FLAGS, d); 1613 1614 diff = -abs(mode->vtotal - mode->vdisplay - 1); 1615 d = ((uint32_t)diff << 12) & 0x00fff000; 1616 d |= (mode->htotal - 20); 1617 crmfb_write_reg(sc, CRMFB_VT_DID_STARTXY, d); 1618 1619 d = ((uint32_t)(diff + 1) << 12) & 0x00fff000; 1620 d |= (mode->htotal - 54); 1621 crmfb_write_reg(sc, CRMFB_VT_CRS_STARTXY, d); 1622 1623 d = ((uint32_t)diff << 12) & 0x00fff000; 1624 d |= (mode->htotal - 4); 1625 crmfb_write_reg(sc, CRMFB_VT_VC_STARTXY, d); 1626 1627 tmp = mode->htotal - 19; 1628 d = tmp << 12; 1629 d |= ((tmp + mode->hdisplay - 2) % mode->htotal); 1630 crmfb_write_reg(sc, CRMFB_VT_HPIX_EN, d); 1631 1632 d = mode->vdisplay | (mode->vtotal << 12); 1633 crmfb_write_reg(sc, CRMFB_VT_VPIX_EN, d); 1634 1635 sc->sc_width = mode->hdisplay; 1636 sc->sc_height = mode->vdisplay; 1637 1638 return TRUE; 1639 } 1640 1641