xref: /netbsd-src/sys/arch/sgimips/dev/crime.c (revision d25ffa98a4bfca1fe272f3c182496ec9934faac7)
1 /*	$NetBSD: crime.c,v 1.34 2011/02/20 07:59:50 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Christopher SEKIYA
5  * Copyright (c) 2000 Soren S. Jorvang
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *          This product includes software developed for the
19  *          NetBSD Project.  See http://www.NetBSD.org/ for
20  *          information about NetBSD.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * O2 CRIME
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.34 2011/02/20 07:59:50 matt Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/cpu.h>
48 
49 #include <machine/locore.h>
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 #include <machine/machtype.h>
54 #include <machine/sysconf.h>
55 
56 #include <sgimips/dev/crimevar.h>
57 #include <sgimips/dev/crimereg.h>
58 #include <sgimips/mace/macevar.h>
59 
60 #include "locators.h"
61 
62 #define DISABLE_CRIME_WATCHDOG
63 
64 static int	crime_match(struct device *, struct cfdata *, void *);
65 static void	crime_attach(struct device *, struct device *, void *);
66 void		crime_bus_reset(void);
67 void		crime_watchdog_reset(void);
68 void		crime_watchdog_disable(void);
69 void		crime_intr(vaddr_t, uint32_t, uint32_t);
70 void		*crime_intr_establish(int, int, int (*)(void *), void *);
71 
72 static bus_space_tag_t crm_iot;
73 static bus_space_handle_t crm_ioh;
74 
75 CFATTACH_DECL(crime, sizeof(struct crime_softc),
76     crime_match, crime_attach, NULL, NULL);
77 
78 #define CRIME_NINTR 32 	/* XXX */
79 
80 struct {
81 	int	(*func)(void *);
82 	void	*arg;
83 } crime[CRIME_NINTR];
84 
85 static int
86 crime_match(struct device *parent, struct cfdata *match, void *aux)
87 {
88 
89 	/*
90 	 * The CRIME is in the O2.
91 	 */
92 	if (mach_type == MACH_SGI_IP32)
93 		return 1;
94 
95 	return 0;
96 }
97 
98 static void
99 crime_attach(struct device *parent, struct device *self, void *aux)
100 {
101 	struct mainbus_attach_args *ma = aux;
102 	struct cpu_info * const ci = curcpu();
103 	uint64_t crm_id;
104 	uint64_t baseline, endline;
105 	uint32_t startctr, endctr, cps;
106 
107 	crm_iot = SGIMIPS_BUS_SPACE_CRIME;
108 
109 	if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
110 	    BUS_SPACE_MAP_LINEAR, &crm_ioh))
111 		panic("%s: can't map I/O space", __func__);
112 
113 	crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
114 
115 	aprint_naive(": system ASIC");
116 
117 	switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
118 	case 0x0b:
119 		aprint_normal(": rev 1.5");
120 		break;
121 
122 	case 0x0a:
123 		if ((crm_id >> 32) == 0)
124 			aprint_normal(": rev 1.1");
125 		else if ((crm_id >> 32) == 1)
126 			aprint_normal(": rev 1.3");
127 		else
128 			aprint_normal(": rev 1.4");
129 		break;
130 
131 	case 0x00:
132 		aprint_normal(": Petty CRIME");
133 		break;
134 
135 	default:
136 		aprint_normal(": Unknown CRIME");
137 		break;
138 	}
139 
140 	aprint_normal(" (CRIME_ID: %" PRIu64 ")\n", crm_id);
141 
142 	/* reset CRIME CPU & memory error registers */
143 	crime_bus_reset();
144 
145 	crime_watchdog_disable();
146 
147 #define CRIME_TIMER_FREQ	66666666	/* crime clock is 66.7MHz */
148 
149 	baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
150 	    & CRIME_TIME_MASK;
151 	startctr = mips3_cp0_count_read();
152 
153 	/* read both cp0 and crime counters for 100ms */
154 	do {
155 		endline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
156 		    & CRIME_TIME_MASK;
157 		endctr = mips3_cp0_count_read();
158 	} while (endline - baseline < (CRIME_TIMER_FREQ / 10));
159 
160 	cps = (endctr - startctr) * 10;
161 	ci->ci_cpu_freq = cps;
162 	ci->ci_cctr_freq = cps;
163 	if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
164 		ci->ci_cpu_freq *= 2;
165 	ci->ci_cycles_per_hz = (cps + (hz / 2)) / hz;
166 	ci->ci_divisor_delay = (cps + (1000000 / 2)) / 1000000;
167 
168 	/* Turn on memory error and crime error interrupts.
169 	   All others turned on as devices are registered. */
170 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
171 	    CRIME_INT_MEMERR |
172 	    CRIME_INT_CRMERR |
173 	    CRIME_INT_VICE |
174 	    CRIME_INT_VID_OUT |
175 	    CRIME_INT_VID_IN2 |
176 	    CRIME_INT_VID_IN1);
177 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
178 	bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
179 	bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
180 
181 	platform.bus_reset = crime_bus_reset;
182 	platform.watchdog_reset = crime_watchdog_reset;
183 	platform.watchdog_disable = crime_watchdog_disable;
184 	platform.watchdog_enable = crime_watchdog_reset;
185 	platform.intr_establish = crime_intr_establish;
186 	platform.intr0 = crime_intr;
187 }
188 
189 /*
190  * XXX: sharing interrupts?
191  */
192 
193 void *
194 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
195 {
196 
197 	if (irq < 16)
198 		return mace_intr_establish(irq, level, func, arg);
199 
200 	if (crime[irq].func != NULL)
201 		return NULL;	/* panic("Cannot share CRIME interrupts!"); */
202 
203 	crime[irq].func = func;
204 	crime[irq].arg = arg;
205 
206 	crime_intr_mask(irq);
207 
208 	return (void *)&crime[irq];
209 }
210 
211 void
212 crime_intr(vaddr_t pc, uint32_t status, uint32_t ipending)
213 {
214 	uint64_t crime_intmask;
215 	uint64_t crime_intstat;
216 	uint64_t crime_ipending;
217 	uint64_t address, stat;
218 	int i;
219 
220 	crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
221 	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
222 	crime_ipending = (crime_intstat & crime_intmask);
223 
224 	if (crime_ipending & 0xffff)
225 		mace_intr(crime_ipending & 0xffff);
226 
227 	if (crime_ipending & 0xffff0000) {
228 	/*
229 	 * CRIME interrupts for CPU and memory errors
230 	 */
231 		if (crime_ipending & CRIME_INT_MEMERR) {
232 			address = bus_space_read_8(crm_iot, crm_ioh,
233 			    CRIME_MEM_ERROR_ADDR);
234 			stat = bus_space_read_8(crm_iot, crm_ioh,
235 			    CRIME_MEM_ERROR_STAT);
236 			printf("crime: memory error address %" PRIu64
237 			    " status %" PRIu64 "\n", address << 2, stat);
238 			crime_bus_reset();
239 		}
240 
241 		if (crime_ipending & CRIME_INT_CRMERR) {
242 			stat = bus_space_read_8(crm_iot, crm_ioh,
243 			    CRIME_CPU_ERROR_STAT);
244 				printf("crime: cpu error %" PRIu64 " at"
245 				    " address %" PRIu64 "\n", stat,
246 				    bus_space_read_8(crm_iot, crm_ioh,
247 				    CRIME_CPU_ERROR_ADDR));
248 			crime_bus_reset();
249 		}
250 	}
251 
252 	crime_ipending &= ~0xffff;
253 
254 	if (crime_ipending) {
255 		for (i = 16; i < CRIME_NINTR; i++) {
256 			if ((crime_ipending & (1 << i)) &&
257 			    crime[i].func != NULL)
258 				(*crime[i].func)(crime[i].arg);
259 		}
260 	}
261 }
262 
263 void
264 crime_intr_mask(unsigned int intr)
265 {
266 	uint64_t mask;
267 
268 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
269 	mask |= (1 << intr);
270 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
271 }
272 
273 void
274 crime_intr_unmask(unsigned int intr)
275 {
276 	uint64_t mask;
277 
278 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
279 	mask &= ~(1 << intr);
280 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
281 }
282 
283 void
284 crime_bus_reset(void)
285 {
286 
287 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
288 	bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
289 }
290 
291 void
292 crime_watchdog_reset(void)
293 {
294 
295 #ifdef DISABLE_CRIME_WATCHDOG
296 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
297 #else
298 	/* enable watchdog timer, clear it */
299 	bus_space_write_8(crm_iot, crm_ioh,
300 		CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
301 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
302 #endif
303 }
304 
305 void
306 crime_watchdog_disable(void)
307 {
308 	uint64_t reg;
309 
310 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
311 	reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
312 	    & ~CRIME_CONTROL_DOG_ENABLE;
313 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
314 }
315 
316 void
317 crime_reboot(void)
318 {
319 
320 	bus_space_write_8(crm_iot, crm_ioh,  CRIME_CONTROL,
321 	    CRIME_CONTROL_HARD_RESET);
322 	for (;;)
323 		;
324 }
325