xref: /netbsd-src/sys/arch/sgimips/dev/crime.c (revision aaf4ece63a859a04e37cf3a7229b5fab0157cc06)
1 /*	$NetBSD: crime.c,v 1.22 2005/12/10 07:00:40 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Christopher SEKIYA
5  * Copyright (c) 2000 Soren S. Jorvang
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *          This product includes software developed for the
19  *          NetBSD Project.  See http://www.NetBSD.org/ for
20  *          information about NetBSD.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * O2 CRIME
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.22 2005/12/10 07:00:40 tsutsui Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 
48 #include <machine/cpu.h>
49 #include <machine/locore.h>
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 #include <machine/machtype.h>
54 #include <machine/sysconf.h>
55 
56 #include <sgimips/dev/crimevar.h>
57 #include <sgimips/dev/crimereg.h>
58 #include <sgimips/mace/macevar.h>
59 
60 #include "locators.h"
61 
62 static int	crime_match(struct device *, struct cfdata *, void *);
63 static void	crime_attach(struct device *, struct device *, void *);
64 void		crime_bus_reset(void);
65 void		crime_watchdog_reset(void);
66 void		crime_watchdog_disable(void);
67 void		crime_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
68 void		*crime_intr_establish(int, int, int (*)(void *), void *);
69 extern	void  mace_intr(int); /* XXX */
70 
71 static bus_space_tag_t crm_iot;
72 static bus_space_handle_t crm_ioh;
73 
74 CFATTACH_DECL(crime, sizeof(struct crime_softc),
75     crime_match, crime_attach, NULL, NULL);
76 
77 #define CRIME_NINTR 32 	/* XXX */
78 
79 struct {
80 	int	(*func)(void *);
81 	void	*arg;
82 } crime[CRIME_NINTR];
83 
84 static int
85 crime_match(struct device *parent, struct cfdata *match, void *aux)
86 {
87 
88 	/*
89 	 * The CRIME is in the O2.
90 	 */
91 	if (mach_type == MACH_SGI_IP32)
92 		return (1);
93 
94 	return (0);
95 }
96 
97 static void
98 crime_attach(struct device *parent, struct device *self, void *aux)
99 {
100 	struct mainbus_attach_args *ma = aux;
101 	u_int64_t crm_id;
102 	u_int64_t baseline;
103 	u_int32_t cps;
104 
105 	crm_iot = SGIMIPS_BUS_SPACE_CRIME;
106 
107 	if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
108 	    BUS_SPACE_MAP_LINEAR, &crm_ioh))
109 		panic("crime_attach: can't map I/O space");
110 
111 	crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
112 
113 	aprint_naive(": system ASIC");
114 
115 	switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
116 	case 0x0b:
117 		aprint_normal(": rev 1.5");
118 		break;
119 
120 	case 0x0a:
121 		if ((crm_id >> 32) == 0)
122 			aprint_normal(": rev 1.1");
123 		else if ((crm_id >> 32) == 1)
124 			aprint_normal(": rev 1.3");
125 		else
126 			aprint_normal(": rev 1.4");
127 		break;
128 
129 	case 0x00:
130 		aprint_normal(": Petty CRIME");
131 		break;
132 
133 	default:
134 		aprint_normal(": Unknown CRIME");
135 		break;
136 	}
137 
138 	aprint_normal(" (CRIME_ID: %llx)\n", crm_id);
139 
140 	/* reset CRIME CPU & memory error registers */
141 	crime_bus_reset();
142 
143 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
144 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, 0);
145 
146 	baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK;
147 	cps = mips3_cp0_count_read();
148 
149 	while (((bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK)
150 		- baseline) < 50 * 1000000 / 15)
151 		continue;
152 	cps = mips3_cp0_count_read() - cps;
153 	cps = cps / 5;
154 
155 	/* Counter on R4k/R4400/R4600/R5k counts at half the CPU frequency */
156 	curcpu()->ci_cpu_freq = cps * 2 * hz;
157 	curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
158 	curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
159 	MIPS_SET_CI_RECIPRICAL(curcpu());
160 
161 	/* Turn on memory error and crime error interrupts.
162 	   All others turned on as devices are registered. */
163 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
164 	    CRIME_INT_MEMERR |
165 	    CRIME_INT_CRMERR |
166 	    CRIME_INT_VICE |
167 	    CRIME_INT_VID_OUT |
168 	    CRIME_INT_VID_IN2 |
169 	    CRIME_INT_VID_IN1);
170 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
171 	bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
172 	bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
173 
174 	platform.bus_reset = crime_bus_reset;
175 	platform.watchdog_reset = crime_watchdog_reset;
176 	platform.watchdog_disable = crime_watchdog_disable;
177 	platform.watchdog_enable = crime_watchdog_reset;
178 	platform.intr_establish = crime_intr_establish;
179 	platform.intr0 = crime_intr;
180 }
181 
182 /*
183  * XXX: sharing interrupts?
184  */
185 
186 void *
187 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
188 {
189 	if (irq < 16)
190 		return mace_intr_establish(irq, level, func, arg);
191 
192 	if (crime[irq].func != NULL)
193 		return NULL;	/* panic("Cannot share CRIME interrupts!"); */
194 
195 	crime[irq].func = func;
196 	crime[irq].arg = arg;
197 
198 	crime_intr_mask(irq);
199 
200 	return (void *)&crime[irq];
201 }
202 
203 void
204 crime_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
205 {
206 	u_int64_t crime_intmask;
207 	u_int64_t crime_intstat;
208 	u_int64_t crime_ipending;
209 	int i;
210 
211 	crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
212 	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
213 	crime_ipending = (crime_intstat & crime_intmask);
214 
215 	if (crime_ipending & 0xffff)
216 		mace_intr(crime_ipending & 0xffff);
217 
218 	if (crime_ipending & 0xffff0000) {
219 	/*
220 	 * CRIME interrupts for CPU and memory errors
221 	 */
222 		if (crime_ipending & CRIME_INT_MEMERR) {
223 			u_int64_t address =
224 				bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_ADDR);
225 			u_int64_t status1 =
226 				bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT);
227 			printf("crime: memory error address %llx"
228 				" status %llx\n", address << 2, status1);
229 			crime_bus_reset();
230 		}
231 
232 		if (crime_ipending & CRIME_INT_CRMERR) {
233 			u_int64_t stat =
234 				bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT);
235 				printf("crime: cpu error %llx at"
236 					" address %llx\n", stat,
237 					bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_ADDR));
238 			crime_bus_reset();
239 		}
240 	}
241 
242 	crime_ipending &= 0xff00;
243 
244 	if (crime_ipending)
245 		for (i = 0; i < CRIME_NINTR; i++) {
246 			if ((crime_ipending & (1 << i)) && crime[i].func != NULL)
247 				(*crime[i].func)(crime[i].arg);
248 		}
249 }
250 
251 void
252 crime_intr_mask(unsigned int intr)
253 {
254 	u_int64_t mask;
255 
256 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
257 	mask |= (1 << intr);
258 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
259 }
260 
261 void
262 crime_intr_unmask(unsigned int intr)
263 {
264 	u_int64_t mask;
265 
266 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
267 	mask &= ~(1 << intr);
268 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
269 }
270 
271 void
272 crime_bus_reset(void)
273 {
274 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
275 	bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
276 }
277 
278 void
279 crime_watchdog_reset(void)
280 {
281 	/* enable watchdog timer, clear it */
282 	bus_space_write_8(crm_iot, crm_ioh,
283 		CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
284 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
285 }
286 
287 void
288 crime_watchdog_disable(void)
289 {
290 	u_int64_t reg;
291 
292 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
293 	reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
294 			& ~CRIME_CONTROL_DOG_ENABLE;
295 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
296 }
297