xref: /netbsd-src/sys/arch/sgimips/dev/crime.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: crime.c,v 1.27 2007/10/17 19:57:03 garbled Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Christopher SEKIYA
5  * Copyright (c) 2000 Soren S. Jorvang
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *          This product includes software developed for the
19  *          NetBSD Project.  See http://www.NetBSD.org/ for
20  *          information about NetBSD.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * O2 CRIME
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.27 2007/10/17 19:57:03 garbled Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/cpu.h>
48 
49 #include <machine/locore.h>
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 #include <machine/machtype.h>
54 #include <machine/sysconf.h>
55 
56 #include <sgimips/dev/crimevar.h>
57 #include <sgimips/dev/crimereg.h>
58 #include <sgimips/mace/macevar.h>
59 
60 #include "locators.h"
61 
62 #define CRIME_DISABLE_WATCHDOG
63 
64 static int	crime_match(struct device *, struct cfdata *, void *);
65 static void	crime_attach(struct device *, struct device *, void *);
66 void		crime_bus_reset(void);
67 void		crime_watchdog_reset(void);
68 void		crime_watchdog_disable(void);
69 void		crime_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
70 void		*crime_intr_establish(int, int, int (*)(void *), void *);
71 extern	void  mace_intr(int); /* XXX */
72 
73 static bus_space_tag_t crm_iot;
74 static bus_space_handle_t crm_ioh;
75 
76 CFATTACH_DECL(crime, sizeof(struct crime_softc),
77     crime_match, crime_attach, NULL, NULL);
78 
79 #define CRIME_NINTR 32 	/* XXX */
80 
81 struct {
82 	int	(*func)(void *);
83 	void	*arg;
84 } crime[CRIME_NINTR];
85 
86 static int
87 crime_match(struct device *parent, struct cfdata *match, void *aux)
88 {
89 
90 	/*
91 	 * The CRIME is in the O2.
92 	 */
93 	if (mach_type == MACH_SGI_IP32)
94 		return (1);
95 
96 	return (0);
97 }
98 
99 static void
100 crime_attach(struct device *parent, struct device *self, void *aux)
101 {
102 	struct mainbus_attach_args *ma = aux;
103 	u_int64_t crm_id;
104 	u_int64_t baseline;
105 	u_int32_t cps;
106 
107 	crm_iot = SGIMIPS_BUS_SPACE_CRIME;
108 
109 	if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
110 	    BUS_SPACE_MAP_LINEAR, &crm_ioh))
111 		panic("crime_attach: can't map I/O space");
112 
113 	crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
114 
115 	aprint_naive(": system ASIC");
116 
117 	switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
118 	case 0x0b:
119 		aprint_normal(": rev 1.5");
120 		break;
121 
122 	case 0x0a:
123 		if ((crm_id >> 32) == 0)
124 			aprint_normal(": rev 1.1");
125 		else if ((crm_id >> 32) == 1)
126 			aprint_normal(": rev 1.3");
127 		else
128 			aprint_normal(": rev 1.4");
129 		break;
130 
131 	case 0x00:
132 		aprint_normal(": Petty CRIME");
133 		break;
134 
135 	default:
136 		aprint_normal(": Unknown CRIME");
137 		break;
138 	}
139 
140 	aprint_normal(" (CRIME_ID: %llx)\n", crm_id);
141 
142 	/* reset CRIME CPU & memory error registers */
143 	crime_bus_reset();
144 
145 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
146 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, 0);
147 
148 	baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK;
149 	cps = mips3_cp0_count_read();
150 
151 	while (((bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK)
152 		- baseline) < 50 * 1000000 / 15)
153 		continue;
154 	cps = mips3_cp0_count_read() - cps;
155 	cps = cps / 5;
156 
157 	/* Counter on R4k/R4400/R4600/R5k counts at half the CPU frequency */
158 	curcpu()->ci_cpu_freq = cps * 2 * hz;
159 	curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
160 	curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
161 	MIPS_SET_CI_RECIPRICAL(curcpu());
162 
163 	/* Turn on memory error and crime error interrupts.
164 	   All others turned on as devices are registered. */
165 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
166 	    CRIME_INT_MEMERR |
167 	    CRIME_INT_CRMERR |
168 	    CRIME_INT_VICE |
169 	    CRIME_INT_VID_OUT |
170 	    CRIME_INT_VID_IN2 |
171 	    CRIME_INT_VID_IN1);
172 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
173 	bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
174 	bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
175 
176 	platform.bus_reset = crime_bus_reset;
177 	platform.watchdog_reset = crime_watchdog_reset;
178 	platform.watchdog_disable = crime_watchdog_disable;
179 	platform.watchdog_enable = crime_watchdog_reset;
180 	platform.intr_establish = crime_intr_establish;
181 	platform.intr0 = crime_intr;
182 }
183 
184 /*
185  * XXX: sharing interrupts?
186  */
187 
188 void *
189 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
190 {
191 	if (irq < 16)
192 		return mace_intr_establish(irq, level, func, arg);
193 
194 	if (crime[irq].func != NULL)
195 		return NULL;	/* panic("Cannot share CRIME interrupts!"); */
196 
197 	crime[irq].func = func;
198 	crime[irq].arg = arg;
199 
200 	crime_intr_mask(irq);
201 
202 	return (void *)&crime[irq];
203 }
204 
205 void
206 crime_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
207 {
208 	u_int64_t crime_intmask;
209 	u_int64_t crime_intstat;
210 	u_int64_t crime_ipending;
211 	int i;
212 
213 	crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
214 	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
215 	crime_ipending = (crime_intstat & crime_intmask);
216 
217 	if (crime_ipending & 0xffff)
218 		mace_intr(crime_ipending & 0xffff);
219 
220 	if (crime_ipending & 0xffff0000) {
221 	/*
222 	 * CRIME interrupts for CPU and memory errors
223 	 */
224 		if (crime_ipending & CRIME_INT_MEMERR) {
225 			u_int64_t address =
226 				bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_ADDR);
227 			u_int64_t status1 =
228 				bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT);
229 			printf("crime: memory error address %llx"
230 				" status %llx\n", address << 2, status1);
231 			crime_bus_reset();
232 		}
233 
234 		if (crime_ipending & CRIME_INT_CRMERR) {
235 			u_int64_t stat =
236 				bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT);
237 				printf("crime: cpu error %llx at"
238 					" address %llx\n", stat,
239 					bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_ADDR));
240 			crime_bus_reset();
241 		}
242 	}
243 
244 	crime_ipending &= ~0xffff;
245 
246 	if (crime_ipending)
247 		for (i = 16; i < CRIME_NINTR; i++) {
248 			if ((crime_ipending & (1 << i)) && crime[i].func != NULL)
249 				(*crime[i].func)(crime[i].arg);
250 		}
251 }
252 
253 void
254 crime_intr_mask(unsigned int intr)
255 {
256 	u_int64_t mask;
257 
258 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
259 	mask |= (1 << intr);
260 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
261 }
262 
263 void
264 crime_intr_unmask(unsigned int intr)
265 {
266 	u_int64_t mask;
267 
268 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
269 	mask &= ~(1 << intr);
270 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
271 }
272 
273 void
274 crime_bus_reset(void)
275 {
276 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
277 	bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
278 }
279 
280 void
281 crime_watchdog_reset(void)
282 {
283 #ifdef CRIME_WATCHDOG_DISABLE
284 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
285 #else
286 	/* enable watchdog timer, clear it */
287 	bus_space_write_8(crm_iot, crm_ioh,
288 		CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
289 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
290 #endif
291 }
292 
293 void
294 crime_watchdog_disable(void)
295 {
296 	u_int64_t reg;
297 
298 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
299 	reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
300 			& ~CRIME_CONTROL_DOG_ENABLE;
301 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
302 }
303 
304 void
305 crime_reboot()
306 {
307 
308 	bus_space_write_8(crm_iot, crm_ioh,  CRIME_CONTROL,
309 	    CRIME_CONTROL_HARD_RESET);
310 	while(1);
311 }
312