xref: /netbsd-src/sys/arch/sgimips/dev/crime.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: crime.c,v 1.36 2011/08/18 02:56:21 macallan Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Christopher SEKIYA
5  * Copyright (c) 2000 Soren S. Jorvang
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *          This product includes software developed for the
19  *          NetBSD Project.  See http://www.NetBSD.org/ for
20  *          information about NetBSD.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * O2 CRIME
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.36 2011/08/18 02:56:21 macallan Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/cpu.h>
48 
49 #include <machine/locore.h>
50 #include <machine/autoconf.h>
51 #include <sys/bus.h>
52 #include <machine/intr.h>
53 #include <machine/machtype.h>
54 #include <machine/sysconf.h>
55 
56 #include <sgimips/dev/crimevar.h>
57 #include <sgimips/dev/crimereg.h>
58 #include <sgimips/mace/macevar.h>
59 
60 #include "locators.h"
61 
62 #define DISABLE_CRIME_WATCHDOG
63 
64 static int	crime_match(device_t, struct cfdata *, void *);
65 static void	crime_attach(device_t, device_t, void *);
66 void		crime_bus_reset(void);
67 void		crime_watchdog_reset(void);
68 void		crime_watchdog_disable(void);
69 void		crime_intr(vaddr_t, uint32_t, uint32_t);
70 void		*crime_intr_establish(int, int, int (*)(void *), void *);
71 
72 static bus_space_tag_t crm_iot;
73 static bus_space_handle_t crm_ioh;
74 
75 CFATTACH_DECL_NEW(crime, sizeof(struct crime_softc),
76     crime_match, crime_attach, NULL, NULL);
77 
78 #define CRIME_NINTR 32 	/* XXX */
79 
80 struct {
81 	int	(*func)(void *);
82 	void	*arg;
83 } crime[CRIME_NINTR];
84 
85 static int
86 crime_match(device_t parent, struct cfdata *match, void *aux)
87 {
88 
89 	/*
90 	 * The CRIME is in the O2.
91 	 */
92 	if (mach_type == MACH_SGI_IP32)
93 		return 1;
94 
95 	return 0;
96 }
97 
98 static void
99 crime_attach(device_t parent, device_t self, void *aux)
100 {
101 	struct mainbus_attach_args *ma = aux;
102 	struct cpu_info * const ci = curcpu();
103 	struct crime_softc *sc = device_private(self);
104 	uint64_t crm_id;
105 	uint64_t baseline, endline;
106 	uint32_t startctr, endctr, cps;
107 
108 	sc->sc_dev = self;
109 	crm_iot = SGIMIPS_BUS_SPACE_CRIME;
110 
111 	if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
112 	    BUS_SPACE_MAP_LINEAR, &crm_ioh))
113 		panic("%s: can't map I/O space", __func__);
114 
115 	crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
116 
117 	aprint_naive(": system ASIC");
118 
119 	switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
120 	case 0x0b:
121 		aprint_normal(": rev 1.5");
122 		break;
123 
124 	case 0x0a:
125 		if ((crm_id >> 32) == 0)
126 			aprint_normal(": rev 1.1");
127 		else if ((crm_id >> 32) == 1)
128 			aprint_normal(": rev 1.3");
129 		else
130 			aprint_normal(": rev 1.4");
131 		break;
132 
133 	case 0x00:
134 		aprint_normal(": Petty CRIME");
135 		break;
136 
137 	default:
138 		aprint_normal(": Unknown CRIME");
139 		break;
140 	}
141 
142 	aprint_normal(" (CRIME_ID: %" PRIu64 ")\n", crm_id);
143 
144 	/* reset CRIME CPU & memory error registers */
145 	crime_bus_reset();
146 
147 	crime_watchdog_disable();
148 
149 #define CRIME_TIMER_FREQ	66666666	/* crime clock is 66.7MHz */
150 
151 	baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
152 	    & CRIME_TIME_MASK;
153 	startctr = mips3_cp0_count_read();
154 
155 	/* read both cp0 and crime counters for 100ms */
156 	do {
157 		endline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
158 		    & CRIME_TIME_MASK;
159 		endctr = mips3_cp0_count_read();
160 	} while (endline - baseline < (CRIME_TIMER_FREQ / 10));
161 
162 	cps = (endctr - startctr) * 10;
163 	ci->ci_cpu_freq = cps;
164 	ci->ci_cctr_freq = cps;
165 	if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
166 		ci->ci_cpu_freq *= 2;
167 	ci->ci_cycles_per_hz = (cps + (hz / 2)) / hz;
168 	ci->ci_divisor_delay = (cps + (1000000 / 2)) / 1000000;
169 
170 	/* Turn on memory error and crime error interrupts.
171 	   All others turned on as devices are registered. */
172 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
173 	    CRIME_INT_MEMERR |
174 	    CRIME_INT_CRMERR |
175 	    CRIME_INT_VICE |
176 	    CRIME_INT_VID_OUT |
177 	    CRIME_INT_VID_IN2 |
178 	    CRIME_INT_VID_IN1);
179 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
180 	bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
181 	bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
182 
183 	platform.bus_reset = crime_bus_reset;
184 	platform.watchdog_reset = crime_watchdog_reset;
185 	platform.watchdog_disable = crime_watchdog_disable;
186 	platform.watchdog_enable = crime_watchdog_reset;
187 	platform.intr_establish = crime_intr_establish;
188 	platform.intr0 = crime_intr;
189 }
190 
191 /*
192  * XXX: sharing interrupts?
193  */
194 
195 void *
196 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
197 {
198 
199 	if (irq < 16)
200 		return mace_intr_establish(irq, level, func, arg);
201 
202 	if (crime[irq].func != NULL)
203 		return NULL;	/* panic("Cannot share CRIME interrupts!"); */
204 
205 	crime[irq].func = func;
206 	crime[irq].arg = arg;
207 
208 	crime_intr_mask(irq);
209 
210 	return (void *)&crime[irq];
211 }
212 
213 void
214 crime_intr(vaddr_t pc, uint32_t status, uint32_t ipending)
215 {
216 	uint64_t crime_intmask;
217 	uint64_t crime_intstat;
218 	uint64_t crime_ipending;
219 	uint64_t address, stat;
220 	int i;
221 
222 	crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
223 	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
224 	crime_ipending = (crime_intstat & crime_intmask);
225 
226 	if (crime_ipending & 0xffff)
227 		mace_intr(crime_ipending & 0xffff);
228 
229 	if (crime_ipending & 0xffff0000) {
230 	/*
231 	 * CRIME interrupts for CPU and memory errors
232 	 */
233 		if (crime_ipending & CRIME_INT_MEMERR) {
234 			address = bus_space_read_8(crm_iot, crm_ioh,
235 			    CRIME_MEM_ERROR_ADDR);
236 			stat = bus_space_read_8(crm_iot, crm_ioh,
237 			    CRIME_MEM_ERROR_STAT);
238 			printf("crime: memory error address %" PRIu64
239 			    " status %" PRIu64 "\n", address << 2, stat);
240 			crime_bus_reset();
241 		}
242 
243 		if (crime_ipending & CRIME_INT_CRMERR) {
244 			stat = bus_space_read_8(crm_iot, crm_ioh,
245 			    CRIME_CPU_ERROR_STAT);
246 				printf("crime: cpu error %" PRIu64 " at"
247 				    " address %" PRIu64 "\n", stat,
248 				    bus_space_read_8(crm_iot, crm_ioh,
249 				    CRIME_CPU_ERROR_ADDR));
250 			crime_bus_reset();
251 		}
252 	}
253 
254 	crime_ipending &= ~0xffff;
255 
256 	if (crime_ipending) {
257 		for (i = 16; i < CRIME_NINTR; i++) {
258 			if ((crime_ipending & (1 << i)) &&
259 			    crime[i].func != NULL)
260 				(*crime[i].func)(crime[i].arg);
261 		}
262 	}
263 }
264 
265 void
266 crime_intr_mask(unsigned int intr)
267 {
268 	uint64_t mask;
269 
270 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
271 	mask |= (1 << intr);
272 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
273 }
274 
275 void
276 crime_intr_unmask(unsigned int intr)
277 {
278 	uint64_t mask;
279 
280 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
281 	mask &= ~(1 << intr);
282 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
283 }
284 
285 void
286 crime_bus_reset(void)
287 {
288 
289 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
290 	bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
291 }
292 
293 void
294 crime_watchdog_reset(void)
295 {
296 
297 #ifdef DISABLE_CRIME_WATCHDOG
298 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
299 #else
300 	/* enable watchdog timer, clear it */
301 	bus_space_write_8(crm_iot, crm_ioh,
302 		CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
303 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
304 #endif
305 }
306 
307 void
308 crime_watchdog_disable(void)
309 {
310 	uint64_t reg;
311 
312 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
313 	reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
314 	    & ~CRIME_CONTROL_DOG_ENABLE;
315 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
316 }
317 
318 void
319 crime_reboot(void)
320 {
321 
322 	bus_space_write_8(crm_iot, crm_ioh,  CRIME_CONTROL,
323 	    CRIME_CONTROL_HARD_RESET);
324 	for (;;)
325 		;
326 }
327