1 /* $NetBSD: intr.h,v 1.9 2007/12/03 15:34:16 ad Exp $ */ 2 3 /* 4 * Copyright 2000, 2001 5 * Broadcom Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and copied only 8 * in accordance with the following terms and conditions. Subject to these 9 * conditions, you may download, copy, install, use, modify and distribute 10 * modified or unmodified copies of this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce and 14 * retain this copyright notice and list of conditions as they appear in 15 * the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Broadcom Corporation. The "Broadcom Corporation" name may not be 19 * used to endorse or promote products derived from this software 20 * without the prior written permission of Broadcom Corporation. 21 * 22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef _SBMIPS_INTR_H_ 36 #define _SBMIPS_INTR_H_ 37 38 #include <machine/systemsw.h> 39 #include <mips/locore.h> 40 41 /* Interrupt levels */ 42 #define IPL_NONE 0 43 #define IPL_SOFTCLOCK 1 /* clock software interrupts */ 44 #define IPL_SOFTBIO 1 /* bio software interrupts */ 45 #define IPL_SOFTNET 2 /* network software interrupts */ 46 #define IPL_SOFTSERIAL 2 /* serial software interrupts */ 47 #define IPL_VM 3 48 #define IPL_SCHED 4 49 #define IPL_HIGH 5 50 51 #define _NIPL 6 52 53 #define _IMR_SOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1) 54 #define _IMR_VM (_IMR_SOFT | MIPS_INT_MASK_0) 55 #define _IMR_SCHED (_IMR_VM | MIPS_INT_MASK_1 | MIPS_INT_MASK_5) 56 #define _IMR_HIGH (MIPS_INT_MASK) 57 58 #define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0) 59 #define splsoftbio() _splraise(MIPS_SOFT_INT_MASK_0) 60 #define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1) 61 #define splsoftserial() _splraise(MIPS_SOFT_INT_MASK_1) 62 #define splvm() _splraise(_IMR_VM) 63 #define splsched() _splraise(_IMR_SCHED) 64 #define splhigh() _splraise(_IMR_HIGH) 65 66 #define spl0() _spllower(0) 67 #define splx(s) _splset(s) 68 69 typedef int ipl_t; 70 typedef struct { 71 ipl_t _spl; 72 } ipl_cookie_t; 73 74 ipl_cookie_t makeiplcookie(ipl_t); 75 76 static inline int 77 splraiseipl(ipl_cookie_t icookie) 78 { 79 80 return _splraise(icookie._spl); 81 } 82 83 #endif /* _SBMIPS_INTR_H_ */ 84