1 /* $NetBSD: openpicreg.h,v 1.2 2001/02/05 19:22:24 briggs Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Allen Briggs for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * INTERRUPT SOURCE register 40 * This is kind of odd on the MPC8240. The interrupts are kind of 41 * spread around. 42 * * The 5 external interrupts are at 0x10200 + irq * 0x20 43 * * The next 3 interrupts are at 0x11000 + (irq - 4) * 0x20 44 * * The next interrupt is at 0x110C0 + (irq - 4) * 0x20 45 * * The last interrupts are at 0x01120 + (irq - 9) * 0x20 46 */ 47 48 /* interrupt vector/priority reg */ 49 #define OPENPIC_SRC_VECTOR(irq) \ 50 ((irq <= 4) ? (0x10200 + (irq) * 0x20) \ 51 : ((irq <= 7) ? (0x11000 + ((irq) - 4) * 0x20) \ 52 : ((irq == 8) ? 0x110C0 \ 53 : (0x01120 + ((irq) - 9) * 0x40)))) 54 55 #define OPENPIC_INIT_SRC(irq) \ 56 (((OPENPIC_IMASK | (8 << OPENPIC_PRIORITY_SHIFT)) | \ 57 (((irq) <= 4) ? \ 58 (OPENPIC_POLARITY_NEGATIVE | OPENPIC_SENSE_LEVEL) : 0)) \ 59 | (irq)) 60 61 #define OPENPIC_IDEST(irq) OPENPIC_SRC_VECTOR(irq) + 0x10 62 63 void openpic_init __P((unsigned char *)); 64 65 #include <powerpc/openpicreg.h> 66