xref: /netbsd-src/sys/arch/riscv/include/asm.h (revision ccd9df534e375a4366c5b55f23782053c7a98d82)
1 /*	$NetBSD: asm.h,v 1.7 2023/05/07 12:41:48 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas of 3am Software Foundry.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _RISCV_ASM_H
33 #define	_RISCV_ASM_H
34 
35 #define	_C_LABEL(x)	x
36 
37 #define	__CONCAT(x,y)	x ## y
38 #define	__STRING(x)	#x
39 
40 #define	___CONCAT(x,y)	__CONCAT(x,y)
41 
42 /*
43  * Define -pg profile entry code.
44  * Must always be noreorder, must never use a macro instruction
45  * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
46  */
47 #define	_KERN_MCOUNT						\
48 	.set	push;						\
49 	subi	sp, sp, CALLFRAME_SIZE;				\
50 	REG_S	a0, CALLFRAME_S0(sp);				\
51 	REG_S	ra, CALLFRAME_RA(sp);				\
52 	move	a0, ra;						\
53 	call	_mcount 					\
54 	REG_L	ra, CALLFRAME_RA(sp);				\
55 	REG_L	a0, CALLFRAME_S0(sp);				\
56 	addi	sp, sp, CALLFRAME_SIZ;				\
57 	.set	pop;
58 
59 #ifdef GPROF
60 #define	_PROF_PROLOGUE _KERN_MCOUNT
61 #else
62 #define	_PROF_PROLOGUE
63 #endif
64 
65 #ifdef __PIC__
66 #define	PLT(x)	x##@plt
67 #else
68 #define PLT(x)	x
69 #endif
70 
71 /*
72  * WEAK_ALIAS: create a weak alias.
73  */
74 #define	WEAK_ALIAS(alias,sym)						\
75 	.weak alias;							\
76 	alias = sym
77 /*
78  * STRONG_ALIAS: create a strong alias.
79  */
80 #define	STRONG_ALIAS(alias,sym)						\
81 	.globl alias;							\
82 	alias = sym
83 
84 /*
85  * WARN_REFERENCES: create a warning if the specified symbol is referenced.
86  */
87 #define	WARN_REFERENCES(sym,msg)					\
88 	.pushsection __CONCAT(.gnu.warning.,sym);			\
89 	.ascii msg;							\
90 	.popsection
91 
92 #define	_ENTRY(x)			\
93 	.globl	_C_LABEL(x);		\
94 	.type	_C_LABEL(x), @function;	\
95 	_C_LABEL(x):
96 
97 #define	ENTRY_NP(x)	.text; .align 2; _ENTRY(x)
98 #define	ENTRY(x)	ENTRY_NP(x); _PROF_PROLOGUE
99 #define	ALTENTRY(x)	_ENTRY(x)
100 #define	END(x)		.size _C_LABEL(x), . - _C_LABEL(x)
101 
102 /*
103  * Macros to panic and printf from assembly language.
104  */
105 #define	PANIC(msg)			\
106 	la	a0, 9f;			\
107 	call	_C_LABEL(panic);	\
108 	MSG(msg)
109 
110 #define	PRINTF(msg)			\
111 	la	a0, 9f;			\
112 	call	_C_LABEL(printf);	\
113 	MSG(msg)
114 
115 #define	MSG(msg)			\
116         .pushsection .rodata.str1.8,"aMS",@progbits,1; \
117 9:	.asciiz	msg;			\
118 	.popsection
119 
120 #define	ASMSTR(str)			\
121 	.asciiz str;			\
122 	.align	3
123 
124 #define __RCSID(x)	.pushsection ".ident","MS",@progbits,1;		\
125 			.asciz x;					\
126 			.popsection
127 #define RCSID(name)	__RCSID(name)
128 
129 #if defined(_LP64)
130 #define	SZREG	8
131 #else
132 #define	SZREG	4
133 #endif
134 
135 #define	ALSK	15		/* stack alignment */
136 #define	ALMASK	-15		/* stack alignment */
137 #define	SZFPREG	8
138 #define	FP_L	fld
139 #define	FP_S	fsd
140 
141 /*
142  *  standard callframe {
143  *  	register_t cf_sp;		frame pointer
144  *  	register_t cf_ra;		return address
145  *  };
146  */
147 #define	CALLFRAME_SIZ	(SZREG * 4)
148 #define	CALLFRAME_S1	(CALLFRAME_SIZ - 4 * SZREG)
149 #define	CALLFRAME_S0	(CALLFRAME_SIZ - 3 * SZREG)
150 #define	CALLFRAME_SP	(CALLFRAME_SIZ - 2 * SZREG)
151 #define	CALLFRAME_RA	(CALLFRAME_SIZ - 1 * SZREG)
152 
153 /*
154  * These macros hide the use of rv32 and rv64 instructions from the
155  * assembler to prevent the assembler from generating 64-bit style
156  * ABI calls.
157  */
158 #define	PTR_ADD		add
159 #define	PTR_ADDI	addi
160 #define	PTR_SUB		sub
161 #define	PTR_SUBI	subi
162 #define	PTR_LA		la
163 #define	PTR_SLLI	slli
164 #define	PTR_SLL		sll
165 #define	PTR_SRLI	srli
166 #define	PTR_SRL		srl
167 #define	PTR_SRAI	srai
168 #define	PTR_SRA		sra
169 #if _LP64
170 #define	PTR_L		ld
171 #define	PTR_S		sd
172 #define	PTR_LR		lr.d
173 #define	PTR_SC		sc.d
174 #define	PTR_WORD	.dword
175 #define	PTR_SCALESHIFT	3
176 #else
177 #define	PTR_L		lw
178 #define	PTR_S		sw
179 #define	PTR_LR		lr.w
180 #define	PTR_SC		sc.w
181 #define	PTR_WORD	.word
182 #define	PTR_SCALESHIFT	2
183 #endif
184 
185 #define	INT_L		lw
186 #define	INT_LA		la
187 #define	INT_S		sw
188 #define	INT_LR		lr.w
189 #define	INT_SC		sc.w
190 #define	INT_WORD	.word
191 #define	INT_SCALESHIFT	2
192 #ifdef _LP64
193 #define	INT_ADD		addw
194 #define	INT_ADDI	addwi
195 #define	INT_SUB		subw
196 #define	INT_SUBI	subwi
197 #define	INT_SLL		sllwi
198 #define	INT_SLLV	sllw
199 #define	INT_SRL		srlwi
200 #define	INT_SRLV	srlw
201 #define	INT_SRA		srawi
202 #define	INT_SRAV	sraw
203 #else
204 #define	INT_ADD		add
205 #define	INT_ADDI	addi
206 #define	INT_SUB		sub
207 #define	INT_SUBI	subi
208 #define	INT_SLLI	slli
209 #define	INT_SLL		sll
210 #define	INT_SRLI	srli
211 #define	INT_SRL		srl
212 #define	INT_SRAI	srai
213 #define	INT_SRA		sra
214 #endif
215 
216 #define	LONG_LA		la
217 #define	LONG_ADD	add
218 #define	LONG_ADDI	addi
219 #define	LONG_SUB	sub
220 #define	LONG_SUBI	subi
221 #define	LONG_SLLI	slli
222 #define	LONG_SLL	sll
223 #define	LONG_SRLI	srli
224 #define	LONG_SRL	srl
225 #define	LONG_SRAI	srai
226 #define	LONG_SRA	sra
227 #ifdef _LP64
228 #define	LONG_L		ld
229 #define	LONG_S		sd
230 #define	LONG_LR		lr.d
231 #define	LONG_SC		sc.d
232 #define	LONG_WORD	.quad
233 #define	LONG_SCALESHIFT	3
234 #else
235 #define	LONG_L		lw
236 #define	LONG_S		sw
237 #define	LONG_LR		lr.w
238 #define	LONG_SC		sc.w
239 #define	LONG_WORD	.word
240 #define	LONG_SCALESHIFT	2
241 #endif
242 
243 #define	REG_LI		li
244 #define	REG_ADD		add
245 #define	REG_SLLI	slli
246 #define	REG_SLL		sll
247 #define	REG_SRLI	srli
248 #define	REG_SRL		srl
249 #define	REG_SRAI	srai
250 #define	REG_SRA		sra
251 #if _LP64
252 #define	REG_L		ld
253 #define	REG_S		sd
254 #define	REG_LR		lr.d
255 #define	REG_SC		sc.d
256 #define	REG_SCALESHIFT	3
257 #else
258 #define	REG_L		lw
259 #define	REG_S		sw
260 #define	REG_LR		lr.w
261 #define	REG_SC		sc.w
262 #define	REG_SCALESHIFT	2
263 #endif
264 
265 #define	CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off)
266 
267 #endif /* _RISCV_ASM_H */
268