xref: /netbsd-src/sys/arch/prep/stand/boot/clock.c (revision fad4c9f71477ae11cea2ee75ec82151ac770a534)
1 /*	$NetBSD: clock.c,v 1.9 2006/04/10 18:40:06 garbled Exp $	*/
2 
3 /*
4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5  * Copyright (C) 1995, 1996 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <lib/libsa/stand.h>
35 #include <dev/isa/isareg.h>
36 #include <dev/ic/i8253reg.h>
37 #include <powerpc/spr.h>
38 
39 #include "boot.h"
40 
41 u_long ns_per_tick = NS_PER_TICK;
42 
43 static inline u_quad_t mftb(void);
44 static inline void mfrtc(u_long *, u_long *);
45 
46 static inline u_quad_t
47 mftb(void)
48 {
49 	u_long scratch;
50 	u_quad_t tb;
51 
52 	__asm volatile ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw %0,%1; bne 1b"
53 	    : "=r"(tb), "=r"(scratch));
54 	return (tb);
55 }
56 
57 static inline void
58 mfrtc(u_long *up, u_long *lp)
59 {
60 	u_long scratch;
61 
62 	__asm volatile ("1: mfspr %0,%3; mfspr %1,%4; mfspr %2,%3;"
63 	    "cmpw %0,%2; bne 1b"
64 	    : "=r"(*up), "=r"(*lp), "=r"(scratch)
65 	    : "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
66 }
67 
68 /*
69  * Wait for about n microseconds (at least!).
70  */
71 void
72 delay(u_int n)
73 {
74 	u_quad_t tb;
75 	u_long tbh, tbl, scratch;
76 	unsigned int cpuvers;
77 
78 	__asm volatile ("mfpvr %0" : "=r"(cpuvers));
79 	cpuvers >>= 16;
80 
81 	if (cpuvers == MPC601) {
82 		mfrtc(&tbh, &tbl);
83 		while (n >= 1000000) {
84 			tbh++;
85 			n -= 1000000;
86 		}
87 		tbl += n * 1000;
88 		if (tbl >= 1000000000) {
89 			tbh++;
90 			tbl -= 1000000000;
91 		}
92 		__asm volatile ("1: mfspr %0,%3; cmplw %0,%1; blt 1b; bgt 2f;"
93 		    "mfspr %0,%4; cmplw %0,%2; blt 1b; 2:"
94 		    : "=&r"(scratch)
95 		    : "r"(tbh), "r"(tbl), "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
96 	} else {
97 		tb = mftb();
98 		tb += (n * 1000 + ns_per_tick - 1) / ns_per_tick;
99 		tbh = tb >> 32;
100 		tbl = tb;
101 		__asm volatile ("1: mftbu %0; cmpw %0,%1; blt 1b; bgt 2f;"
102 		                  "mftb %0; cmpw %0,%2; blt 1b; 2:"
103 		                  : "=&r"(scratch)
104 		                  : "r"(tbh), "r"(tbl));
105 	}
106 }
107