xref: /netbsd-src/sys/arch/prep/stand/boot/clock.c (revision eeda5809524c3569a7015f4fb83b00682946b6c3)
1*eeda5809Smatt /*	$NetBSD: clock.c,v 1.10 2010/03/02 21:52:32 matt Exp $	*/
237eb9eebSnonaka 
337eb9eebSnonaka /*
437eb9eebSnonaka  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
537eb9eebSnonaka  * Copyright (C) 1995, 1996 TooLs GmbH.
637eb9eebSnonaka  * All rights reserved.
737eb9eebSnonaka  *
837eb9eebSnonaka  * Redistribution and use in source and binary forms, with or without
937eb9eebSnonaka  * modification, are permitted provided that the following conditions
1037eb9eebSnonaka  * are met:
1137eb9eebSnonaka  * 1. Redistributions of source code must retain the above copyright
1237eb9eebSnonaka  *    notice, this list of conditions and the following disclaimer.
1337eb9eebSnonaka  * 2. Redistributions in binary form must reproduce the above copyright
1437eb9eebSnonaka  *    notice, this list of conditions and the following disclaimer in the
1537eb9eebSnonaka  *    documentation and/or other materials provided with the distribution.
1637eb9eebSnonaka  * 3. All advertising materials mentioning features or use of this software
1737eb9eebSnonaka  *    must display the following acknowledgement:
1837eb9eebSnonaka  *	This product includes software developed by TooLs GmbH.
1937eb9eebSnonaka  * 4. The name of TooLs GmbH may not be used to endorse or promote products
2037eb9eebSnonaka  *    derived from this software without specific prior written permission.
2137eb9eebSnonaka  *
2237eb9eebSnonaka  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
2337eb9eebSnonaka  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
2437eb9eebSnonaka  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2537eb9eebSnonaka  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2637eb9eebSnonaka  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
2737eb9eebSnonaka  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
2837eb9eebSnonaka  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
2937eb9eebSnonaka  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
3037eb9eebSnonaka  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
3137eb9eebSnonaka  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3237eb9eebSnonaka  */
3337eb9eebSnonaka 
3437eb9eebSnonaka #include <lib/libsa/stand.h>
3537eb9eebSnonaka #include <dev/isa/isareg.h>
3637eb9eebSnonaka #include <dev/ic/i8253reg.h>
37ccf604dbSkleink #include <powerpc/spr.h>
38*eeda5809Smatt #include <powerpc/oea/spr.h>
3937eb9eebSnonaka 
4037eb9eebSnonaka #include "boot.h"
4137eb9eebSnonaka 
4237eb9eebSnonaka u_long ns_per_tick = NS_PER_TICK;
4337eb9eebSnonaka 
4478fba760Sgarbled static inline u_quad_t mftb(void);
4578fba760Sgarbled static inline void mfrtc(u_long *, u_long *);
4637eb9eebSnonaka 
4737eb9eebSnonaka static inline u_quad_t
mftb(void)4878fba760Sgarbled mftb(void)
4937eb9eebSnonaka {
5037eb9eebSnonaka 	u_long scratch;
5137eb9eebSnonaka 	u_quad_t tb;
5237eb9eebSnonaka 
5350a256a3Sperry 	__asm volatile ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw %0,%1; bne 1b"
5437eb9eebSnonaka 	    : "=r"(tb), "=r"(scratch));
5537eb9eebSnonaka 	return (tb);
5637eb9eebSnonaka }
5737eb9eebSnonaka 
58ccf604dbSkleink static inline void
mfrtc(u_long * up,u_long * lp)5978fba760Sgarbled mfrtc(u_long *up, u_long *lp)
60ccf604dbSkleink {
61ccf604dbSkleink 	u_long scratch;
62ccf604dbSkleink 
635f1c88d7Sperry 	__asm volatile ("1: mfspr %0,%3; mfspr %1,%4; mfspr %2,%3;"
64ccf604dbSkleink 	    "cmpw %0,%2; bne 1b"
65ccf604dbSkleink 	    : "=r"(*up), "=r"(*lp), "=r"(scratch)
66ccf604dbSkleink 	    : "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
67ccf604dbSkleink }
68ccf604dbSkleink 
6937eb9eebSnonaka /*
7037eb9eebSnonaka  * Wait for about n microseconds (at least!).
7137eb9eebSnonaka  */
7237eb9eebSnonaka void
delay(u_int n)7378fba760Sgarbled delay(u_int n)
7437eb9eebSnonaka {
7537eb9eebSnonaka 	u_quad_t tb;
7637eb9eebSnonaka 	u_long tbh, tbl, scratch;
77ccf604dbSkleink 	unsigned int cpuvers;
7837eb9eebSnonaka 
795f1c88d7Sperry 	__asm volatile ("mfpvr %0" : "=r"(cpuvers));
80ccf604dbSkleink 	cpuvers >>= 16;
81ccf604dbSkleink 
82ccf604dbSkleink 	if (cpuvers == MPC601) {
83ccf604dbSkleink 		mfrtc(&tbh, &tbl);
84ccf604dbSkleink 		while (n >= 1000000) {
85ccf604dbSkleink 			tbh++;
86ccf604dbSkleink 			n -= 1000000;
87ccf604dbSkleink 		}
88ccf604dbSkleink 		tbl += n * 1000;
89ccf604dbSkleink 		if (tbl >= 1000000000) {
90ccf604dbSkleink 			tbh++;
91ccf604dbSkleink 			tbl -= 1000000000;
92ccf604dbSkleink 		}
935f1c88d7Sperry 		__asm volatile ("1: mfspr %0,%3; cmplw %0,%1; blt 1b; bgt 2f;"
94ccf604dbSkleink 		    "mfspr %0,%4; cmplw %0,%2; blt 1b; 2:"
956075ea53Skleink 		    : "=&r"(scratch)
96ccf604dbSkleink 		    : "r"(tbh), "r"(tbl), "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
97ccf604dbSkleink 	} else {
9837eb9eebSnonaka 		tb = mftb();
9937eb9eebSnonaka 		tb += (n * 1000 + ns_per_tick - 1) / ns_per_tick;
10037eb9eebSnonaka 		tbh = tb >> 32;
10137eb9eebSnonaka 		tbl = tb;
1025f1c88d7Sperry 		__asm volatile ("1: mftbu %0; cmpw %0,%1; blt 1b; bgt 2f;"
103ccf604dbSkleink 		                  "mftb %0; cmpw %0,%2; blt 1b; 2:"
1046075ea53Skleink 		                  : "=&r"(scratch)
105ccf604dbSkleink 		                  : "r"(tbh), "r"(tbl));
106ccf604dbSkleink 	}
10737eb9eebSnonaka }
108