xref: /netbsd-src/sys/arch/prep/pnpbus/wdc_pnpbus.c (revision eceb233b9bd0dfebb902ed73b531ae6964fa3f9b)
1 /*	$NetBSD: wdc_pnpbus.c,v 1.15 2017/10/20 07:06:07 jdolecek Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum and by Onno van der Linden.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: wdc_pnpbus.c,v 1.15 2017/10/20 07:06:07 jdolecek Exp $");
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/malloc.h>
40 
41 #include <sys/bus.h>
42 #include <machine/intr.h>
43 #include <machine/isa_machdep.h>
44 #include <machine/residual.h>
45 
46 #include <dev/ata/atavar.h>
47 #include <dev/ic/wdcvar.h>
48 
49 #include <prep/pnpbus/pnpbusvar.h>
50 
51 /* options passed via the 'flags' config keyword */
52 #define WDC_OPTIONS_32	0x01 /* try to use 32bit data I/O */
53 
54 struct wdc_pnpbus_softc {
55 	struct	wdc_softc sc_wdcdev;
56 	struct	ata_channel *sc_chanlist[1];
57 	struct	ata_channel sc_channel;
58 	struct	wdc_regs sc_wdc_regs;
59 	void	*sc_ih;
60 };
61 
62 static int	wdc_pnpbus_probe(device_t, cfdata_t, void *);
63 static void	wdc_pnpbus_attach(device_t, device_t, void *);
64 
65 CFATTACH_DECL_NEW(wdc_pnpbus, sizeof(struct wdc_pnpbus_softc),
66     wdc_pnpbus_probe, wdc_pnpbus_attach, NULL, NULL);
67 
68 static int
69 wdc_pnpbus_probe(device_t parent, cfdata_t match, void *aux)
70 {
71 	struct pnpbus_dev_attach_args *pna = aux;
72 	int ret = 0;
73 
74 	/* XXX special case the Powerstack E1, it has wdc builtin on 14E
75 	 * while the siop is builtin on 14L.  No idea how this works at all.
76 	 */
77 	if (strcmp(res->VitalProductData.PrintableModel, "(e1)") == 0)
78 		return ret;
79 
80 	/* XXX special case the MTX604/mcp750.  The onboard IDE is actually
81 	 * a PCIIDE chip.
82 	 */
83 
84 	if (strcmp(res->VitalProductData.PrintableModel,
85 	    "000000000000000000000000000(e2)") == 0)
86 		return ret;
87 
88 	if (strcmp(pna->pna_devid, "PNP0600") == 0)
89 		ret = 1;
90 
91 	if (ret)
92 		pnpbus_scan(pna, pna->pna_ppc_dev);
93 
94 	return ret;
95 }
96 
97 static void
98 wdc_pnpbus_attach(device_t parent, device_t self, void *aux)
99 {
100 	struct wdc_pnpbus_softc *sc = device_private(self);
101 	struct wdc_regs *wdr;
102 	struct pnpbus_dev_attach_args *pna = aux;
103 	int cmd_iobase, cmd_len, aux_iobase, aux_len, i;
104 
105 	sc->sc_wdcdev.sc_atac.atac_dev = self;
106 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
107 
108 	wdr->cmd_iot = pna->pna_iot;
109 	wdr->ctl_iot = pna->pna_iot;
110 	pnpbus_getioport(&pna->pna_res, 0, &cmd_iobase, &cmd_len);
111 	pnpbus_getioport(&pna->pna_res, 1, &aux_iobase, &aux_len);
112 
113 	if (pnpbus_io_map(&pna->pna_res, 0, &wdr->cmd_iot, &wdr->cmd_baseioh) ||
114 	    pnpbus_io_map(&pna->pna_res, 1, &wdr->ctl_iot, &wdr->ctl_ioh)) {
115 		aprint_error_dev(self, "couldn't map registers\n");
116 	}
117 
118 	for (i = 0; i < cmd_len; i++) {
119 		if (bus_space_subregion(wdr->cmd_iot,
120 		      wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
121 		      &wdr->cmd_iohs[i]) != 0) {
122 			aprint_error(": couldn't subregion registers\n");
123 			return;
124 		}
125 	}
126 
127 	wdr->data32iot = wdr->cmd_iot;
128 	wdr->data32ioh = wdr->cmd_iohs[0];
129 
130 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
131 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
132 	if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
133 	    WDC_OPTIONS_32)
134 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
135 
136 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
137 	sc->sc_chanlist[0] = &sc->sc_channel;
138 	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
139 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
140 	sc->sc_wdcdev.wdc_maxdrives = 2;
141 	sc->sc_channel.ch_channel = 0;
142 	sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
143 
144 	wdc_init_shadow_regs(wdr);
145 
146 	sc->sc_ih = pnpbus_intr_establish(0, IPL_BIO, IST_PNP,
147 	    wdcintr, &sc->sc_channel, &pna->pna_res);
148 
149 	aprint_normal("\n");
150 	wdcattach(&sc->sc_channel);
151 }
152