xref: /netbsd-src/sys/arch/prep/pci/pci_machdep.c (revision fad4c9f71477ae11cea2ee75ec82151ac770a534)
1 /*	$NetBSD: pci_machdep.c,v 1.27 2006/06/09 01:19:11 garbled Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Charles M. Hannum.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Machine-specific functions for PCI autoconfiguration.
35  *
36  * On PCs, there are two methods of generating PCI configuration cycles.
37  * We try to detect the appropriate mechanism for this machine and set
38  * up a few function pointers to access the correct method directly.
39  */
40 
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.27 2006/06/09 01:19:11 garbled Exp $");
43 
44 #include <sys/types.h>
45 #include <sys/param.h>
46 #include <sys/time.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/extent.h>
50 #include <sys/device.h>
51 #include <sys/malloc.h>
52 
53 #include <uvm/uvm_extern.h>
54 
55 #define _POWERPC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57 #include <machine/intr.h>
58 #include <machine/platform.h>
59 #include <machine/pnp.h>
60 
61 #include <dev/isa/isavar.h>
62 
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 #include <dev/pci/pciconf.h>
67 
68 /*
69  * PCI doesn't have any special needs; just use the generic versions
70  * of these functions.
71  */
72 struct powerpc_bus_dma_tag pci_bus_dma_tag = {
73 	0,			/* _bounce_thresh */
74 	_bus_dmamap_create,
75 	_bus_dmamap_destroy,
76 	_bus_dmamap_load,
77 	_bus_dmamap_load_mbuf,
78 	_bus_dmamap_load_uio,
79 	_bus_dmamap_load_raw,
80 	_bus_dmamap_unload,
81 	NULL,			/* _dmamap_sync */
82 	_bus_dmamem_alloc,
83 	_bus_dmamem_free,
84 	_bus_dmamem_map,
85 	_bus_dmamem_unmap,
86 	_bus_dmamem_mmap,
87 };
88 
89 /* 0 == direct 1 == indirect */
90 int prep_pci_config_mode = 1;
91 extern struct prep_pci_chipset *prep_pct;
92 
93 void
94 prep_pci_get_chipset_tag(pci_chipset_tag_t pc)
95 {
96 	int i;
97 
98 	i = pci_chipset_tag_type();
99 
100 	if (i == PCIBridgeIndirect || i == PCIBridgeRS6K) {
101 		prep_pci_config_mode = 1;
102 		prep_pci_get_chipset_tag_indirect(pc);
103 	} else if (i == PCIBridgeDirect) {
104 		prep_pci_get_chipset_tag_direct(pc);
105 		prep_pci_config_mode = 0;
106 	} else
107 		panic("Unknown PCI chipset tag configuration method");
108 }
109 
110 int
111 prep_pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
112 {
113 	struct prep_pci_chipset_businfo *pbi;
114 	prop_object_t busmax;
115 
116 	pbi = SIMPLEQ_FIRST(&prep_pct->pc_pbi);
117 	while (busno--)
118 		pbi = SIMPLEQ_NEXT(pbi, next);
119 	if (pbi == NULL)
120 		return 32;
121 
122 	busmax = prop_dictionary_get(pbi->pbi_properties,
123 	    "prep-pcibus-maxdevices");
124 	if (busmax == NULL)
125 		return 32;
126 	else
127 		return prop_number_integer_value(busmax);
128 
129 	return 32;
130 }
131 
132 int
133 prep_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
134 {
135 	struct prep_pci_chipset_businfo *pbi;
136 	prop_dictionary_t dict, devsub;
137 	prop_object_t pinsub;
138 	prop_number_t pbus;
139 	int busno, bus, pin, line, swiz, dev;
140 	char key[20];
141 
142 	pin = pa->pa_intrpin;
143 	line = pa->pa_intrline;
144 	bus = busno = pa->pa_bus;
145 	swiz = pa->pa_intrswiz;
146 	dev = pa->pa_device;
147 
148 	pbi = SIMPLEQ_FIRST(&prep_pct->pc_pbi);
149 	while (busno--)
150 		pbi = SIMPLEQ_NEXT(pbi, next);
151 	KASSERT(pbi != NULL);
152 
153 	dict = prop_dictionary_get(pbi->pbi_properties, "prep-pci-intrmap");
154 	if (dict == NULL) {
155 		/* We have a non-PReP bus.  now it gets hard */
156 		pbus = prop_dictionary_get(pbi->pbi_properties,
157 		    "prep-pcibus-parent");
158 		if (pbus == NULL)
159 			goto bad;
160 		busno = prop_number_integer_value(pbus);
161 		pbus = prop_dictionary_get(pbi->pbi_properties,
162 		    "prep-pcibus-rawdevnum");
163 		dev = prop_number_integer_value(pbus);
164 
165 		/* now that we know the parent bus, we need to find it's pbi */
166 		pbi = SIMPLEQ_FIRST(&prep_pct->pc_pbi);
167 		while (busno--)
168 			pbi = SIMPLEQ_NEXT(pbi, next);
169 		KASSERT(pbi != NULL);
170 
171 		/* set the pin to the rawpin */
172 		pin = pa->pa_rawintrpin;
173 		/* now we have the pbi, ask for dict again */
174 		dict = prop_dictionary_get(pbi->pbi_properties,
175 		    "prep-pci-intrmap");
176 		if (dict == NULL)
177 			goto bad;
178 	}
179 
180 	/* No IRQ used. */
181 	if (pin == 0)
182 		goto bad;
183 	if (pin > 4) {
184 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
185 		goto bad;
186 	}
187 
188 	sprintf(key, "devfunc-%d", dev);
189 	devsub = prop_dictionary_get(dict, key);
190 	if (devsub == NULL)
191 		goto bad;
192 	sprintf(key, "pin-%c", 'A' + (pin-1));
193 	pinsub = prop_dictionary_get(devsub, key);
194 	if (pinsub == NULL)
195 		goto bad;
196 	line = prop_number_integer_value(pinsub);
197 
198 	/*
199 	* Section 6.2.4, `Miscellaneous Functions', says that 255 means
200 	* `unknown' or `no connection' on a PC.  We assume that a device with
201 	* `no connection' either doesn't have an interrupt (in which case the
202 	* pin number should be 0, and would have been noticed above), or
203 	* wasn't configured by the BIOS (in which case we punt, since there's
204 	* no real way we can know how the interrupt lines are mapped in the
205 	* hardware).
206 	*
207 	* XXX
208 	* Since IRQ 0 is only used by the clock, and we can't actually be sure
209 	* that the BIOS did its job, we also recognize that as meaning that
210 	* the BIOS has not configured the device.
211 	*/
212 	if (line == 0 || line == 255) {
213 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
214 		goto bad;
215 	} else {
216 		if (line >= ICU_LEN) {
217 			printf("pci_intr_map: bad interrupt line %d\n", line);
218 			goto bad;
219 		}
220 		if (line == IRQ_SLAVE) {
221 			printf("pci_intr_map: changed line 2 to line 9\n");
222 			line = 9;
223 		}
224 	}
225 
226 	*ihp = line;
227 	return 0;
228 
229 bad:
230 	*ihp = -1;
231 	return 1;
232 }
233 
234 const char *
235 prep_pci_intr_string(void *v, pci_intr_handle_t ih)
236 {
237 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
238 
239 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
240 		panic("pci_intr_string: bogus handle 0x%x", ih);
241 
242 	sprintf(irqstr, "irq %d", ih);
243 	return (irqstr);
244 
245 }
246 
247 const struct evcnt *
248 prep_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
249 {
250 
251 	/* XXX for now, no evcnt parent reported */
252 	return NULL;
253 }
254 
255 void *
256 prep_pci_intr_establish(void *v, pci_intr_handle_t ih, int level,
257     int (*func)(void *), void *arg)
258 {
259 
260 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
261 		panic("pci_intr_establish: bogus handle 0x%x", ih);
262 
263 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
264 }
265 
266 void
267 prep_pci_intr_disestablish(void *v, void *cookie)
268 {
269 
270 	isa_intr_disestablish(NULL, cookie);
271 }
272 
273 void
274 prep_pci_conf_interrupt(void *v, int bus, int dev, int pin,
275     int swiz, int *iline)
276 {
277 	/* do nothing */
278 }
279 
280 extern pcitag_t prep_pci_direct_make_tag(void *, int, int, int);
281 extern pcitag_t prep_pci_indirect_make_tag(void *, int, int, int);
282 extern pcireg_t prep_pci_direct_conf_read(void *, pcitag_t, int);
283 extern pcireg_t prep_pci_indirect_conf_read(void *, pcitag_t, int);
284 
285 int
286 prep_pci_conf_hook(pci_chipset_tag_t pct, int bus, int dev, int func,
287 	pcireg_t id)
288 {
289 	struct prep_pci_chipset_businfo *pbi;
290 	prop_number_t bmax, pbus;
291 	pcitag_t tag;
292 	pcireg_t class;
293 
294 	/*
295 	 * The P9100 board found in some IBM machines cannot be
296 	 * over-configured.
297 	 */
298 	if (PCI_VENDOR(id) == PCI_VENDOR_WEITEK &&
299 	    PCI_PRODUCT(id) == PCI_PRODUCT_WEITEK_P9100)
300 		return 0;
301 
302 	/* We have already mapped the MPIC2 if we have one, so leave it
303 	   alone */
304 	if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
305 	    PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC2)
306 		return 0;
307 
308 	if (PCI_VENDOR(id) == PCI_VENDOR_INTEL &&
309 	    PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_PCEB)
310 		return 0;
311 
312 	/* NOTE, all device specific stuff must be above this line */
313 	/* don't do this on the primary host bridge */
314 	if (bus == 0 && dev == 0 && func == 0)
315 		return PCI_CONF_DEFAULT;
316 
317 	if (prep_pci_config_mode) {
318 		tag = prep_pci_indirect_make_tag(pct, bus, dev, func);
319 		class = prep_pci_indirect_conf_read(pct, tag,
320 		    PCI_CLASS_REG);
321 	} else {
322 		tag = prep_pci_direct_make_tag(pct, bus, dev, func);
323 		class = prep_pci_direct_conf_read(pct, tag,
324 		    PCI_CLASS_REG);
325 	}
326 
327 	/*
328 	 * PCI bridges have special needs.  We need to discover where they
329 	 * came from, and wire them appropriately.
330 	 */
331 	if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
332 	    PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI) {
333 		pbi = malloc(sizeof(struct prep_pci_chipset_businfo), M_DEVBUF,
334 		    M_NOWAIT);
335 		KASSERT(pbi != NULL);
336 		pbi->pbi_properties = prop_dictionary_create();
337 		KASSERT(pbi->pbi_properties != NULL);
338 		setup_pciintr_map(pbi, bus, dev, func);
339 
340 		/* record the parent bus, and the parent device number */
341 		pbus = prop_number_create_integer(bus);
342 		prop_dictionary_set(pbi->pbi_properties, "prep-pcibus-parent",
343 		    pbus);
344 		prop_object_release(pbus);
345 		pbus = prop_number_create_integer(dev);
346 		prop_dictionary_set(pbi->pbi_properties,
347 		    "prep-pcibus-rawdevnum", pbus);
348 		prop_object_release(pbus);
349 
350 		/* now look for bus quirks */
351 
352 		if (PCI_VENDOR(id) == PCI_VENDOR_DEC &&
353 		    PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) {
354 			bmax = prop_number_create_integer(8);
355 			KASSERT(bmax != NULL);
356 			prop_dictionary_set(pbi->pbi_properties,
357 			    "prep-pcibus-maxdevices", bmax);
358 			prop_object_release(bmax);
359 		}
360 
361 		SIMPLEQ_INSERT_TAIL(&prep_pct->pc_pbi, pbi, next);
362 	}
363 
364 	return (PCI_CONF_DEFAULT);
365 }
366