1 /* NetBSD: pci_machdep.c,v 1.12 2001/06/19 11:56:27 nonaka Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 */ 40 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/time.h> 44 #include <sys/systm.h> 45 #include <sys/errno.h> 46 #include <sys/device.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #define _POWERPC_BUS_DMA_PRIVATE 51 #include <machine/bus.h> 52 #include <machine/intr.h> 53 #include <machine/platform.h> 54 55 #include <dev/isa/isavar.h> 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 60 #define PCI_MODE1_ENABLE 0x80000000UL 61 #define PCI_MODE1_ADDRESS_REG (PREP_BUS_SPACE_IO + 0xcf8) 62 #define PCI_MODE1_DATA_REG (PREP_BUS_SPACE_IO + 0xcfc) 63 64 #define o2i(off) ((off)/sizeof(pcireg_t)) 65 66 #ifdef DEBUG 67 #define DPRF(x) printf x 68 #else 69 #define DPRF(x) 70 #endif 71 72 /* 73 * PCI doesn't have any special needs; just use the generic versions 74 * of these functions. 75 */ 76 struct powerpc_bus_dma_tag pci_bus_dma_tag = { 77 0, /* _bounce_thresh */ 78 _bus_dmamap_create, 79 _bus_dmamap_destroy, 80 _bus_dmamap_load, 81 _bus_dmamap_load_mbuf, 82 _bus_dmamap_load_uio, 83 _bus_dmamap_load_raw, 84 _bus_dmamap_unload, 85 NULL, /* _dmamap_sync */ 86 _bus_dmamem_alloc, 87 _bus_dmamem_free, 88 _bus_dmamem_map, 89 _bus_dmamem_unmap, 90 _bus_dmamem_mmap, 91 }; 92 93 void 94 pci_attach_hook(struct device *parent, struct device *self, 95 struct pcibus_attach_args *pba) 96 { 97 98 /* Nothing to do. */ 99 } 100 101 int 102 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 103 { 104 105 /* 106 * Bus number is irrelevant. Configuration Mechanism 1 is in 107 * use, can have devices 0-32 (i.e. the `normal' range). 108 */ 109 return (32); 110 } 111 112 pcitag_t 113 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 114 { 115 pcitag_t tag; 116 117 if (bus >= 256 || device >= 32 || function >= 8) 118 panic("pci_make_tag: bad request"); 119 120 tag = PCI_MODE1_ENABLE | 121 (bus << 16) | (device << 11) | (function << 8); 122 return tag; 123 } 124 125 void 126 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 127 { 128 129 if (bp != NULL) 130 *bp = (tag >> 16) & 0xff; 131 if (dp != NULL) 132 *dp = (tag >> 11) & 0x1f; 133 if (fp != NULL) 134 *fp = (tag >> 8) & 0x7; 135 return; 136 } 137 138 pcireg_t 139 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 140 { 141 pcireg_t data; 142 143 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 144 data = in32rb(PCI_MODE1_DATA_REG); 145 out32rb(PCI_MODE1_ADDRESS_REG, 0); 146 return data; 147 } 148 149 void 150 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 151 { 152 153 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 154 out32rb(PCI_MODE1_DATA_REG, data); 155 out32rb(PCI_MODE1_ADDRESS_REG, 0); 156 } 157 158 int 159 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 160 { 161 int pin = pa->pa_intrpin; 162 int line = pa->pa_intrline; 163 164 if (pin == 0) { 165 /* No IRQ used. */ 166 goto bad; 167 } 168 169 if (pin > 4) { 170 printf("pci_intr_map: bad interrupt pin %d\n", pin); 171 goto bad; 172 } 173 174 /* 175 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 176 * `unknown' or `no connection' on a PC. We assume that a device with 177 * `no connection' either doesn't have an interrupt (in which case the 178 * pin number should be 0, and would have been noticed above), or 179 * wasn't configured by the BIOS (in which case we punt, since there's 180 * no real way we can know how the interrupt lines are mapped in the 181 * hardware). 182 * 183 * XXX 184 * Since IRQ 0 is only used by the clock, and we can't actually be sure 185 * that the BIOS did its job, we also recognize that as meaning that 186 * the BIOS has not configured the device. 187 */ 188 if (line == 0 || line == 255) { 189 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 190 goto bad; 191 } else { 192 if (line >= ICU_LEN) { 193 printf("pci_intr_map: bad interrupt line %d\n", line); 194 goto bad; 195 } 196 if (line == IRQ_SLAVE) { 197 printf("pci_intr_map: changed line 2 to line 9\n"); 198 line = 9; 199 } 200 } 201 202 *ihp = line; 203 return 0; 204 205 bad: 206 *ihp = -1; 207 return 1; 208 } 209 210 const char * 211 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 212 { 213 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 214 215 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 216 panic("pci_intr_string: bogus handle 0x%x\n", ih); 217 218 sprintf(irqstr, "irq %d", ih); 219 return (irqstr); 220 221 } 222 223 const struct evcnt * 224 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 225 { 226 227 /* XXX for now, no evcnt parent reported */ 228 return NULL; 229 } 230 231 void * 232 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 233 int (*func)(void *), void *arg) 234 { 235 236 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 237 panic("pci_intr_establish: bogus handle 0x%x\n", ih); 238 239 return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg); 240 } 241 242 void 243 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 244 { 245 246 isa_intr_disestablish(NULL, cookie); 247 } 248 249 void 250 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, 251 int swiz, int *iline) 252 { 253 254 (*platform->pci_intr_fixup)(bus, dev, iline); 255 } 256