1 /* $NetBSD: intr.h,v 1.14 2002/02/11 11:19:29 wiz Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _PREP_INTR_H_ 40 #define _PREP_INTR_H_ 41 42 /* Interrupt priority `levels'. */ 43 #define IPL_NONE 9 /* nothing */ 44 #define IPL_SOFTCLOCK 8 /* software clock interrupt */ 45 #define IPL_SOFTNET 7 /* software network interrupt */ 46 #define IPL_BIO 6 /* block I/O */ 47 #define IPL_NET 5 /* network */ 48 #define IPL_SOFTSERIAL 4 /* software serial interrupt */ 49 #define IPL_TTY 3 /* terminal */ 50 #define IPL_IMP 3 /* memory allocation */ 51 #define IPL_AUDIO 2 /* audio */ 52 #define IPL_CLOCK 1 /* clock */ 53 #define IPL_HIGH 1 /* everything */ 54 #define IPL_SERIAL 0 /* serial */ 55 #define NIPL 10 56 57 /* Interrupt sharing types. */ 58 #define IST_NONE 0 /* none */ 59 #define IST_PULSE 1 /* pulsed */ 60 #define IST_EDGE 2 /* edge-triggered */ 61 #define IST_LEVEL 3 /* level-triggered */ 62 63 #ifndef _LOCORE 64 65 /* 66 * Interrupt handler chains. intr_establish() inserts a handler into 67 * the list. The handler is called with its (single) argument. 68 */ 69 struct intrhand { 70 int (*ih_fun)(void *); 71 void *ih_arg; 72 u_long ih_count; 73 struct intrhand *ih_next; 74 int ih_level; 75 int ih_irq; 76 }; 77 78 void setsoftclock(void); 79 void clearsoftclock(void); 80 int splsoftclock(void); 81 void setsoftnet(void); 82 void clearsoftnet(void); 83 int splsoftnet(void); 84 85 void do_pending_int(void); 86 87 void ext_intr(void); 88 89 void enable_intr(void); 90 void disable_intr(void); 91 92 void *intr_establish(int, int, int, int (*)(void *), void *); 93 void intr_disestablish(void *); 94 95 void softnet(void); 96 void softserial(void); 97 int isa_intr(void); 98 void isa_intr_mask(int); 99 void isa_intr_clr(int); 100 void isa_setirqstat(int, int, int); 101 102 static __inline int splraise(int); 103 static __inline void spllower(int); 104 static __inline void set_sint(int); 105 106 extern volatile int cpl, ipending, astpending, tickspending; 107 extern int imen; 108 extern int imask[]; 109 extern long intrcnt[]; 110 extern unsigned intrcnt2[]; 111 extern struct intrhand *intrhand[]; 112 extern int intrtype[]; 113 extern vaddr_t prep_intr_reg; 114 115 /* 116 * Reorder protection in the following inline functions is 117 * achieved with the "eieio" instruction which the assembler 118 * seems to detect and then doesn't move instructions past.... 119 */ 120 static __inline int 121 splraise(int newcpl) 122 { 123 int oldcpl; 124 125 __asm__ volatile("sync; eieio\n"); /* don't reorder.... */ 126 oldcpl = cpl; 127 cpl = oldcpl | newcpl; 128 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 129 return(oldcpl); 130 } 131 132 static __inline void 133 spllower(int newcpl) 134 { 135 136 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 137 cpl = newcpl; 138 if(ipending & ~newcpl) 139 do_pending_int(); 140 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 141 } 142 143 /* Following code should be implemented with lwarx/stwcx to avoid 144 * the disable/enable. i need to read the manual once more.... */ 145 static __inline void 146 set_sint(int pending) 147 { 148 int msrsave; 149 150 __asm__ ("mfmsr %0" : "=r"(msrsave)); 151 __asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 152 ipending |= pending; 153 __asm__ volatile ("mtmsr %0" :: "r"(msrsave)); 154 } 155 156 #define ICU_LEN 32 157 #define IRQ_SLAVE 2 158 #define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE) 159 160 #define PREP_INTR_REG 0xbffff000 161 #define INTR_VECTOR_REG 0xff0 162 163 #define SINT_CLOCK 0x20000000 164 #define SINT_NET 0x40000000 165 #define SINT_SERIAL 0x80000000 166 #define SPL_CLOCK 0x00000001 167 #define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_SERIAL) 168 169 #define CNT_SINT_NET 29 170 #define CNT_SINT_CLOCK 30 171 #define CNT_SINT_SERIAL 31 172 #define CNT_CLOCK 0 173 174 #define splbio() splraise(imask[IPL_BIO]) 175 #define splnet() splraise(imask[IPL_NET]) 176 #define spltty() splraise(imask[IPL_TTY]) 177 #define splclock() splraise(imask[IPL_CLOCK]) 178 #define splvm() splraise(imask[IPL_IMP]) 179 #define splaudio() splraise(imask[IPL_AUDIO]) 180 #define splserial() splraise(imask[IPL_SERIAL]) 181 #define splstatclock() splclock() 182 #define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK]) 183 #define splsoftclock() splraise(imask[IPL_SOFTCLOCK]) 184 #define splsoftnet() splraise(imask[IPL_SOFTNET]) 185 #define splsoftserial() splraise(imask[IPL_SOFTSERIAL]) 186 187 #define spllpt() spltty() 188 189 #define setsoftclock() set_sint(SINT_CLOCK); 190 #define setsoftnet() set_sint(SINT_NET); 191 #define setsoftserial() set_sint(SINT_SERIAL); 192 193 #define splhigh() splraise(imask[IPL_HIGH]) 194 #define splsched() splhigh() 195 #define spllock() splhigh() 196 #define splx(x) spllower(x) 197 #define spl0() spllower(0) 198 199 #endif /* !_LOCORE */ 200 201 #endif /* !_PREP_INTR_H_ */ 202