xref: /netbsd-src/sys/arch/powerpc/pic/pic_distopenpic.c (revision a5847cc334d9a7029f6352b847e9e8d71a0f9e0c)
1 /*	$NetBSD: pic_distopenpic.c,v 1.7 2011/07/02 13:08:25 mrg Exp $ */
2 
3 /*-
4  * Copyright (c) 2008 Tim Rightnour
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of The NetBSD Foundation nor the names of its
16  *    contributors may be used to endorse or promote products derived
17  *    from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pic_distopenpic.c,v 1.7 2011/07/02 13:08:25 mrg Exp $");
34 
35 #include "opt_openpic.h"
36 #include "opt_interrupt.h"
37 
38 #include <sys/param.h>
39 #include <sys/malloc.h>
40 #include <sys/kernel.h>
41 
42 #include <uvm/uvm_extern.h>
43 
44 #include <machine/pio.h>
45 #include <powerpc/openpic.h>
46 
47 #include <powerpc/pic/picvar.h>
48 
49 /* distributed stuff */
50 static int opic_isu_from_irq(struct openpic_ops *, int, int *);
51 static u_int distopic_read(struct openpic_ops *, int, int);
52 static void distopic_write(struct openpic_ops *, int, int, u_int);
53 static void distopic_establish_irq(struct pic_ops *, int, int, int);
54 static void distopic_enable_irq(struct pic_ops *, int, int);
55 static void distopic_disable_irq(struct pic_ops *, int);
56 static void distopic_finish_setup(struct pic_ops *);
57 
58 struct pic_ops *
59 setup_distributed_openpic(void *addr, int nrofisus, void **isu, int *maps)
60 {
61 	struct openpic_ops *opicops;
62 	struct pic_ops *pic;
63 	int irq, i;
64 	u_int x;
65 
66 	openpic_base = (void *)addr;
67 	opicops = malloc(sizeof(struct openpic_ops), M_DEVBUF, M_NOWAIT);
68 	KASSERT(opicops != NULL);
69 	pic = &opicops->pic;
70 
71 	x = openpic_read(OPENPIC_FEATURE);
72 	if (((x & 0x07ff0000) >> 16) != 0)
73 		panic("Can't handle a distributed openpic with internal ISU");
74 
75 	opicops->nrofisus = nrofisus;
76 	opicops->isu = malloc(sizeof(volatile unsigned char *) * nrofisus,
77 	    M_DEVBUF, M_NOWAIT);
78 	KASSERT(opicops->isu != NULL);
79 	opicops->irq_per = malloc(sizeof(uint8_t) * nrofisus,
80 	    M_DEVBUF, M_NOWAIT);
81 	KASSERT(opicops->irq_per != NULL);
82 
83 	for (irq=0, i=0; i < nrofisus ; i++) {
84 		opicops->isu[i] = (void *)isu[i];
85 		opicops->irq_per[i] = maps[i]/0x20;
86 		irq += maps[i]/0x20;
87 		aprint_debug("%d: irqtotal=%d, added %d\n", i, irq,
88 		    maps[i]/0x20);
89 	}
90 	aprint_normal("OpenPIC Version 1.%d: "
91 	    "Supports %d CPUs and %d interrupt sources.\n",
92 	    x & 0xff, ((x & 0x1f00) >> 8) + 1, irq);
93 	pic->pic_numintrs = irq;
94 	pic->pic_cookie = addr;
95 	pic->pic_enable_irq = distopic_enable_irq;
96 	pic->pic_reenable_irq = distopic_enable_irq;
97 	pic->pic_disable_irq = distopic_disable_irq;
98 	pic->pic_get_irq = opic_get_irq;
99 	pic->pic_ack_irq = opic_ack_irq;
100 	pic->pic_establish_irq = distopic_establish_irq;
101 	pic->pic_finish_setup = distopic_finish_setup;
102 	opicops->flags = OPENPIC_FLAG_DIST;
103 	strcpy(pic->pic_name, "openpic");
104 	pic_add(pic);
105 
106 	openpic_set_priority(0, 15);
107 
108 	for (i=0; i < nrofisus; i++) {
109 		for (irq = 0; irq < opicops->irq_per[i]; irq++) {
110 			/* make sure to keep disabled */
111 			distopic_write(opicops, i,
112 			    OPENPIC_DSRC_VECTOR_OFFSET(irq), OPENPIC_IMASK);
113 			/* send all interrupts to CPU 0 */
114 			distopic_write(opicops, i,
115 			    OPENPIC_DSRC_IDEST_OFFSET(irq), 1 << 0);
116 		}
117 	}
118 
119 	x = openpic_read(OPENPIC_CONFIG);
120 	x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
121 	openpic_write(OPENPIC_CONFIG, x);
122 
123 	openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff);
124 
125 	openpic_set_priority(0, 0);
126 
127 	/* clear all pending interrunts */
128 	for (irq = 0; irq < pic->pic_numintrs; irq++) {
129 		openpic_read_irq(0);
130 		openpic_eoi(0);
131 	}
132 
133 #if 0
134 	printf("timebase freq=%d\n", openpic_read(0x10f0));
135 #endif
136 	return pic;
137 
138 }
139 
140 /* Begin distributed openpic code */
141 
142 static int
143 opic_isu_from_irq(struct openpic_ops *opic, int irq, int *realirq)
144 {
145 	int i;
146 
147 	for (i=0; i < opic->nrofisus; i++) {
148 		if (irq < opic->irq_per[i]) {
149 			*realirq = irq;
150 			return i;
151 		} else
152 			irq -= opic->irq_per[i];
153 	}
154 	return -1;
155 }
156 
157 static u_int
158 distopic_read(struct openpic_ops *opic, int isu, int offset)
159 {
160 	volatile unsigned char *addr = opic->isu[isu] + offset;
161 
162 	return in32rb(addr);
163 }
164 
165 static void
166 distopic_write(struct openpic_ops *opic, int isu, int offset, u_int val)
167 {
168 	volatile unsigned char *addr = opic->isu[isu] + offset;
169 
170 	out32rb(addr, val);
171 }
172 
173 static void
174 distopic_establish_irq(struct pic_ops *pic, int irq, int type, int pri)
175 {
176 	struct openpic_ops *opic = (struct openpic_ops *)pic;
177 	int isu, realirq = -1, realpri = max(1, min(15, pri));
178 	uint32_t x;
179 
180 	isu = opic_isu_from_irq(opic, irq, &realirq);
181 	KASSERT(isu != -1);
182 
183 	x = irq;
184 	x |= OPENPIC_IMASK;
185 	x |= (realirq == 0 && isu == 0) ?
186 	    OPENPIC_POLARITY_POSITIVE :	OPENPIC_POLARITY_NEGATIVE;
187 	x |= (type == IST_EDGE) ? OPENPIC_SENSE_EDGE : OPENPIC_SENSE_LEVEL;
188 	x |= realpri << OPENPIC_PRIORITY_SHIFT;
189 	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
190 
191 	aprint_debug("%s: setting IRQ %d to priority %d 0x%x\n", __func__,
192 	    irq, realpri, x);
193 }
194 
195 static void
196 distopic_enable_irq(struct pic_ops *pic, int irq, int type)
197 {
198 	struct openpic_ops *opic = (struct openpic_ops *)pic;
199 	int isu, realirq = -1;
200 	u_int x;
201 
202 	isu = opic_isu_from_irq(opic, irq, &realirq);
203 	KASSERT(isu != -1);
204 	x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq));
205 	x &= ~OPENPIC_IMASK;
206 	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
207 }
208 
209 static void
210 distopic_disable_irq(struct pic_ops *pic, int irq)
211 {
212 	struct openpic_ops *opic = (struct openpic_ops *)pic;
213 	int isu, realirq = -1;
214 	u_int x;
215 
216 	isu = opic_isu_from_irq(opic, irq, &realirq);
217 	KASSERT(isu != -1);
218 	x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq));
219 	x |= OPENPIC_IMASK;
220 	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
221 }
222 
223 static void
224 distopic_finish_setup(struct pic_ops *pic)
225 {
226 	struct openpic_ops *opic = (struct openpic_ops *)pic;
227 	uint32_t cpumask = 0;
228 	int i, irq;
229 
230 #ifdef OPENPIC_DISTRIBUTE
231 	for (i = 0; i < ncpu; i++)
232 		cpumask |= (1 << cpu_info[i].ci_index);
233 #else
234 	cpumask = 1;
235 #endif
236 	for (i=0; i < opic->nrofisus; i++) {
237 		for (irq = 0; irq < opic->irq_per[i]; irq++) {
238 			distopic_write(opic, i, OPENPIC_DSRC_IDEST_OFFSET(irq),
239 			    cpumask);
240 		}
241 	}
242 }
243