xref: /netbsd-src/sys/arch/powerpc/pic/ipi_openpic.c (revision 2980e352a13e8f0b545a366830c411e7a542ada8)
1 /* $NetBSD: ipi_openpic.c,v 1.4 2008/04/28 20:23:32 martin Exp $ */
2 /*-
3  * Copyright (c) 2007 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Tim Rightnour
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: ipi_openpic.c,v 1.4 2008/04/28 20:23:32 martin Exp $");
33 
34 #include "opt_multiprocessor.h"
35 #include <sys/param.h>
36 #include <sys/malloc.h>
37 #include <sys/kernel.h>
38 
39 #include <uvm/uvm_extern.h>
40 
41 #include <machine/pio.h>
42 #include <powerpc/openpic.h>
43 #include <powerpc/atomic.h>
44 
45 #include <arch/powerpc/pic/picvar.h>
46 #include <arch/powerpc/pic/ipivar.h>
47 
48 #ifdef MULTIPROCESSOR
49 
50 extern struct ipi_ops ipiops;
51 extern volatile u_long IPI[CPU_MAXNUM];
52 static void openpic_send_ipi(int, u_long);
53 static void openpic_establish_ipi(int, int, void *);
54 
55 void
56 setup_openpic_ipi(void)
57 {
58 	uint32_t x;
59 
60 	ipiops.ppc_send_ipi = openpic_send_ipi;
61 	ipiops.ppc_establish_ipi = openpic_establish_ipi;
62 	ipiops.ppc_ipi_vector = IPI_VECTOR;
63 
64 	/* Some (broken) openpic's byteswap on read, but not write. */
65 	openpic_write(OPENPIC_IPI_VECTOR(0), OPENPIC_IMASK);
66 	x = openpic_read(OPENPIC_IPI_VECTOR(0));
67 	if (x != OPENPIC_IMASK)
68 		x = bswap32(openpic_read(OPENPIC_IPI_VECTOR(1)));
69 	else
70 		x = openpic_read(OPENPIC_IPI_VECTOR(1));
71 	x &= ~(OPENPIC_IMASK | OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK);
72 	x |= (15 << OPENPIC_PRIORITY_SHIFT) | ipiops.ppc_ipi_vector;
73 	openpic_write(OPENPIC_IPI_VECTOR(1), x);
74 }
75 
76 static void
77 openpic_send_ipi(int target, u_long mesg)
78 {
79 	int cpumask = 0, i;
80 
81 	switch(target) {
82 		case IPI_T_ALL:
83 			for (i = 0; i < ncpu; i++) {
84 				cpumask |= 1 << i;
85 				atomic_setbits_ulong(&IPI[i], mesg);
86 			}
87 			break;
88 		case IPI_T_NOTME:
89 			for (i = 0; i < ncpu; i++) {
90 				if (i != curcpu()->ci_index)
91 					cpumask |= 1 << i;
92 				atomic_setbits_ulong(&IPI[i], mesg);
93 			}
94 			break;
95 		default:
96 			cpumask = 1 << target;
97 			atomic_setbits_ulong(&IPI[target], mesg);
98 	}
99 	openpic_write(OPENPIC_IPI(curcpu()->ci_index, 1), cpumask);
100 }
101 
102 static void
103 openpic_establish_ipi(int type, int level, void *ih_args)
104 {
105 /*
106  * XXX
107  * for now we catch IPIs early in pic_handle_intr() so no need to do anything
108  * here
109  */
110 #if 0
111 	intr_establish(ipiops.ppc_ipi_vector, type, level, ppcipi_intr,
112 	    ih_args);
113 #endif
114 }
115 
116 #endif /*MULTIPROCESSOR*/
117