1*e4a54b41Snonaka /* $NetBSD: pci_machdep.c,v 1.6 2016/10/19 00:08:42 nonaka Exp $ */ 2a748aedcSkiyohara /* 3a748aedcSkiyohara * Copyright (c) 2009 KIYOHARA Takashi 4a748aedcSkiyohara * All rights reserved. 5a748aedcSkiyohara * 6a748aedcSkiyohara * Redistribution and use in source and binary forms, with or without 7a748aedcSkiyohara * modification, are permitted provided that the following conditions 8a748aedcSkiyohara * are met: 9a748aedcSkiyohara * 1. Redistributions of source code must retain the above copyright 10a748aedcSkiyohara * notice, this list of conditions and the following disclaimer. 11a748aedcSkiyohara * 2. Redistributions in binary form must reproduce the above copyright 12a748aedcSkiyohara * notice, this list of conditions and the following disclaimer in the 13a748aedcSkiyohara * documentation and/or other materials provided with the distribution. 14a748aedcSkiyohara * 15a748aedcSkiyohara * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16a748aedcSkiyohara * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17a748aedcSkiyohara * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18a748aedcSkiyohara * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19a748aedcSkiyohara * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20a748aedcSkiyohara * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21a748aedcSkiyohara * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22a748aedcSkiyohara * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23a748aedcSkiyohara * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24a748aedcSkiyohara * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25a748aedcSkiyohara * POSSIBILITY OF SUCH DAMAGE. 26a748aedcSkiyohara */ 27a748aedcSkiyohara 28a748aedcSkiyohara #include <sys/cdefs.h> 29*e4a54b41Snonaka __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.6 2016/10/19 00:08:42 nonaka Exp $"); 30a748aedcSkiyohara 31a748aedcSkiyohara #include "gtpci.h" 32a748aedcSkiyohara #include "pci.h" 33a748aedcSkiyohara 34a748aedcSkiyohara #include <sys/param.h> 35a748aedcSkiyohara #include <sys/device.h> 36a748aedcSkiyohara #include <sys/extent.h> 37a748aedcSkiyohara 38a748aedcSkiyohara #include <dev/pci/pcivar.h> 39a748aedcSkiyohara #include <dev/pci/pciconf.h> 40a748aedcSkiyohara 41a748aedcSkiyohara #if NGTPCI > 0 42a748aedcSkiyohara #include <dev/marvell/gtpcireg.h> 43a748aedcSkiyohara #include <dev/marvell/gtpcivar.h> 44a748aedcSkiyohara #endif 45a748aedcSkiyohara #include <dev/marvell/marvellvar.h> 46a748aedcSkiyohara 47a748aedcSkiyohara #include <machine/pci_machdep.h> 48a748aedcSkiyohara 49a748aedcSkiyohara 50a748aedcSkiyohara #if NGTPCI > 0 51dd2488a8Smatt void gtpci_md_conf_interrupt(void *, int, int, int, int, int *); 52dd2488a8Smatt int gtpci_md_conf_hook(void *, int, int, int, pcireg_t); 53a748aedcSkiyohara 54a748aedcSkiyohara struct genppc_pci_chipset genppc_gtpci0_chipset = { 55dd2488a8Smatt .pc_conf_v = NULL, 56dd2488a8Smatt .pc_attach_hook = gtpci_attach_hook, 57dd2488a8Smatt .pc_bus_maxdevs = gtpci_bus_maxdevs, 58dd2488a8Smatt .pc_make_tag = gtpci_make_tag, 59dd2488a8Smatt .pc_conf_read = gtpci_conf_read, 60dd2488a8Smatt .pc_conf_write = gtpci_conf_write, 61a748aedcSkiyohara 62dd2488a8Smatt .pc_intr_v = &genppc_gtpci0_chipset, 63dd2488a8Smatt .pc_intr_map = genppc_pci_intr_map, 64dd2488a8Smatt .pc_intr_string = genppc_pci_intr_string, 65dd2488a8Smatt .pc_intr_evcnt = genppc_pci_intr_evcnt, 66dd2488a8Smatt .pc_intr_establish = genppc_pci_intr_establish, 67dd2488a8Smatt .pc_intr_disestablish = genppc_pci_intr_disestablish, 68dd2488a8Smatt .pc_intr_setattr = genppc_pci_intr_setattr, 69*e4a54b41Snonaka .pc_intr_type = genppc_pci_intr_type, 70*e4a54b41Snonaka .pc_intr_alloc = genppc_pci_intr_alloc, 71*e4a54b41Snonaka .pc_intr_release = genppc_pci_intr_release, 72*e4a54b41Snonaka .pc_intx_alloc = genppc_pci_intx_alloc, 73a748aedcSkiyohara 741f2907adSmatt .pc_msi_v = &genppc_gtpci0_chipset, 751f2907adSmatt GENPPC_PCI_MSI_INITIALIZER, 761f2907adSmatt 77*e4a54b41Snonaka .pc_msix_v = &genppc_gtpci0_chipset, 78*e4a54b41Snonaka GENPPC_PCI_MSIX_INITIALIZER, 79*e4a54b41Snonaka 80dd2488a8Smatt .pc_conf_interrupt = gtpci_md_conf_interrupt, 81dd2488a8Smatt .pc_decompose_tag = gtpci_decompose_tag, 82dd2488a8Smatt .pc_conf_hook = gtpci_md_conf_hook, 83a748aedcSkiyohara }; 84*e4a54b41Snonaka 85a748aedcSkiyohara struct genppc_pci_chipset genppc_gtpci1_chipset = { 86dd2488a8Smatt .pc_conf_v = NULL, 87dd2488a8Smatt .pc_attach_hook = gtpci_attach_hook, 88dd2488a8Smatt .pc_bus_maxdevs = gtpci_bus_maxdevs, 89dd2488a8Smatt .pc_make_tag = gtpci_make_tag, 90dd2488a8Smatt .pc_conf_read = gtpci_conf_read, 91dd2488a8Smatt .pc_conf_write = gtpci_conf_write, 92a748aedcSkiyohara 93dd2488a8Smatt .pc_intr_v = &genppc_gtpci1_chipset, 94dd2488a8Smatt .pc_intr_map = genppc_pci_intr_map, 95dd2488a8Smatt .pc_intr_string = genppc_pci_intr_string, 96dd2488a8Smatt .pc_intr_evcnt = genppc_pci_intr_evcnt, 97dd2488a8Smatt .pc_intr_establish = genppc_pci_intr_establish, 98dd2488a8Smatt .pc_intr_disestablish = genppc_pci_intr_disestablish, 99dd2488a8Smatt .pc_intr_setattr = genppc_pci_intr_setattr, 100*e4a54b41Snonaka .pc_intr_type = genppc_pci_intr_type, 101*e4a54b41Snonaka .pc_intr_alloc = genppc_pci_intr_alloc, 102*e4a54b41Snonaka .pc_intr_release = genppc_pci_intr_release, 103*e4a54b41Snonaka .pc_intx_alloc = genppc_pci_intx_alloc, 104a748aedcSkiyohara 1051f2907adSmatt .pc_msi_v = &genppc_gtpci1_chipset, 1061f2907adSmatt GENPPC_PCI_MSI_INITIALIZER, 1071f2907adSmatt 108*e4a54b41Snonaka .pc_msix_v = &genppc_gtpci1_chipset, 109*e4a54b41Snonaka GENPPC_PCI_MSIX_INITIALIZER, 110*e4a54b41Snonaka 111dd2488a8Smatt .pc_conf_interrupt = gtpci_md_conf_interrupt, 112dd2488a8Smatt .pc_decompose_tag = gtpci_decompose_tag, 113dd2488a8Smatt .pc_conf_hook = gtpci_md_conf_hook, 114a748aedcSkiyohara }; 115a748aedcSkiyohara #endif 116