xref: /netbsd-src/sys/arch/powerpc/include/userret.h (revision c29d51755812ace2e87aeefdb06cb2b4dac7087a)
1 /*	$NetBSD: userret.h,v 1.30 2015/07/06 05:55:37 matt Exp $	*/
2 
3 /*
4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5  * Copyright (C) 1995, 1996 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include "opt_ppcarch.h"
35 #include "opt_altivec.h"
36 
37 #include <sys/userret.h>
38 #include <sys/ras.h>
39 
40 #include <powerpc/fpu.h>
41 #include <powerpc/psl.h>
42 
43 #ifdef PPC_BOOKE
44 #include <powerpc/spr.h>
45 #include <powerpc/booke/spr.h>
46 #endif
47 
48 /*
49  * Define the code needed before returning to user mode, for
50  * trap and syscall.
51  */
52 static __inline void
53 userret(struct lwp *l, struct trapframe *tf)
54 {
55 	KASSERTMSG((tf == trapframe(curlwp)),
56 	   "tf=%p, trapframe(curlwp)=%p\n", tf, trapframe(curlwp));
57 
58 	/* Invoke MI userret code */
59 	mi_userret(l);
60 
61 	KASSERTMSG((tf->tf_srr1 & PSL_PR) != 0,
62 	    "tf=%p: srr1 (%#lx): PSL_PR isn't set!",
63 	    tf, tf->tf_srr1);
64 	KASSERTMSG((tf->tf_srr1 & PSL_FP) == 0
65 	    || l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU] == l,
66 	    "tf=%p: srr1 (%#lx): PSL_FP set but FPU curlwp %p is not curlwp %p!",
67 	    tf, tf->tf_srr1, l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU], l);
68 
69 	/* clear SRR1 status bits */
70 	tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC);
71 
72 #ifdef ALTIVEC
73 	/*
74 	 * We need to manually restore PSL_VEC each time we return
75 	 * to user mode since PSL_VEC isn't always preserved in SRR1.
76 	 * We keep a copy of it in md_flags to make restoring easier.
77 	 */
78 	tf->tf_srr1 |= l->l_md.md_flags & PSL_VEC;
79 #endif
80 #ifdef PPC_BOOKE
81 	/*
82 	 * BookE doesn't have PSL_SE but it does have a debug instruction
83 	 * completion exception but it needs PSL_DE to fire.  Instead we
84 	 * use IAC1/IAC2 to match the next PC.
85 	 */
86 	if (__predict_false(tf->tf_srr1 & PSL_SE)) {
87 		tf->tf_srr1 &= ~PSL_SE;
88 		extern void booke_sstep(struct trapframe *); /* ugly */
89 		booke_sstep(tf);
90 	}
91 #endif
92 
93 #ifdef __HAVE_RAS
94 	/*
95 	 * Check to see if a RAS was interrupted and restart it if it was.
96 	 */
97 	struct proc * const p = l->l_proc;
98 	if (__predict_false(p->p_raslist != NULL)) {
99 		void * const ras_pc = ras_lookup(p, (void *) tf->tf_srr0);
100 		if (ras_pc != (void *) -1)
101 			tf->tf_srr0 = (vaddr_t) ras_pc;
102 	}
103 #endif
104 }
105