xref: /netbsd-src/sys/arch/powerpc/include/pio.h (revision 5e4c038a45edbc7d63b7c2daa76e29f88b64a4e3)
1 /*	$NetBSD: pio.h,v 1.2 2001/05/27 20:59:15 matt Exp $ */
2 /*	$OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */
3 
4 /*
5  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed under OpenBSD by
18  *	Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
23  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
26  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  */
35 
36 #ifndef _POWERPC_PIO_H_
37 #define _POWERPC_PIO_H_
38 /*
39  * I/O macros.
40  */
41 
42 static __inline void __outb __P((volatile u_int8_t *a, u_int8_t v));
43 static __inline void __outw __P((volatile u_int16_t *a, u_int16_t v));
44 static __inline void __outl __P((volatile u_int32_t *a, u_int32_t v));
45 static __inline void __outwrb __P((volatile u_int16_t *a, u_int16_t v));
46 static __inline void __outlrb __P((volatile u_int32_t *a, u_int32_t v));
47 static __inline u_int8_t __inb __P((volatile u_int8_t *a));
48 static __inline u_int16_t __inw __P((volatile u_int16_t *a));
49 static __inline u_int32_t __inl __P((volatile u_int32_t *a));
50 static __inline u_int16_t __inwrb __P((volatile u_int16_t *a));
51 static __inline u_int32_t __inlrb __P((volatile u_int32_t *a));
52 static __inline void __outsb __P((volatile u_int8_t *, const u_int8_t *,
53 	size_t));
54 static __inline void __outsw __P((volatile u_int16_t *, const u_int16_t *,
55 	size_t));
56 static __inline void __outsl __P((volatile u_int32_t *, const u_int32_t *,
57 	size_t));
58 static __inline void __outswrb __P((volatile u_int16_t *, const u_int16_t *,
59 	size_t));
60 static __inline void __outslrb __P((volatile u_int32_t *, const u_int32_t *,
61 	size_t));
62 static __inline void __insb __P((volatile u_int8_t *, u_int8_t *, size_t));
63 static __inline void __insw __P((volatile u_int16_t *, u_int16_t *, size_t));
64 static __inline void __insl __P((volatile u_int32_t *, u_int32_t *, size_t));
65 static __inline void __inswrb __P((volatile u_int16_t *, u_int16_t *, size_t));
66 static __inline void __inslrb __P((volatile u_int32_t *, u_int32_t *, size_t));
67 
68 static __inline void
69 __outb(a,v)
70 	volatile u_int8_t *a;
71 	u_int8_t v;
72 {
73 	*a = v;
74 	__asm__ volatile("eieio; sync");
75 }
76 
77 static __inline void
78 __outw(a,v)
79 	volatile u_int16_t *a;
80 	u_int16_t v;
81 {
82 	*a = v;
83 	__asm__ volatile("eieio; sync");
84 }
85 
86 static __inline void
87 __outl(a,v)
88 	volatile u_int32_t *a;
89 	u_int32_t v;
90 {
91 	*a = v;
92 	__asm__ volatile("eieio; sync");
93 }
94 
95 static __inline void
96 __outwrb(a,v)
97 	volatile u_int16_t *a;
98 	u_int16_t v;
99 {
100 	__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
101 	__asm__ volatile("eieio; sync");
102 }
103 
104 static __inline void
105 __outlrb(a,v)
106 	volatile u_int32_t *a;
107 	u_int32_t v;
108 {
109 	__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
110 	__asm__ volatile("eieio; sync");
111 }
112 
113 static __inline u_int8_t
114 __inb(a)
115 	volatile u_int8_t *a;
116 {
117 	u_int8_t _v_;
118 
119 	_v_ = *a;
120 	__asm__ volatile("eieio; sync");
121 	return _v_;
122 }
123 
124 static __inline u_int16_t
125 __inw(a)
126 	volatile u_int16_t *a;
127 {
128 	u_int16_t _v_;
129 
130 	_v_ = *a;
131 	__asm__ volatile("eieio; sync");
132 	return _v_;
133 }
134 
135 static __inline u_int32_t
136 __inl(a)
137 	volatile u_int32_t *a;
138 {
139 	u_int32_t _v_;
140 
141 	_v_ = *a;
142 	__asm__ volatile("eieio; sync");
143 	return _v_;
144 }
145 
146 static __inline u_int16_t
147 __inwrb(a)
148 	volatile u_int16_t *a;
149 {
150 	u_int16_t _v_;
151 
152 	__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
153 	__asm__ volatile("eieio; sync");
154 	return _v_;
155 }
156 
157 static __inline u_int32_t
158 __inlrb(a)
159 	volatile u_int32_t *a;
160 {
161 	u_int32_t _v_;
162 
163 	__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
164 	__asm__ volatile("eieio; sync");
165 	return _v_;
166 }
167 
168 #define	outb(a,v)	(__outb((volatile u_int8_t *)(a), v))
169 #define	out8(a,v)	outb(a,v)
170 #define	outw(a,v)	(__outw((volatile u_int16_t *)(a), v))
171 #define	out16(a,v)	outw(a,v)
172 #define	outl(a,v)	(__outl((volatile u_int32_t *)(a), v))
173 #define	out32(a,v)	outl(a,v)
174 #define	inb(a)		(__inb((volatile u_int8_t *)(a)))
175 #define	in8(a)		inb(a)
176 #define	inw(a)		(__inw((volatile u_int16_t *)(a)))
177 #define	in16(a)		inw(a)
178 #define	inl(a)		(__inl((volatile u_int32_t *)(a)))
179 #define	in32(a)		inl(a)
180 
181 #define	out8rb(a,v)	outb(a,v)
182 #define	outwrb(a,v)	(__outwrb((volatile u_int16_t *)(a), v))
183 #define	out16rb(a,v)	outwrb(a,v)
184 #define	outlrb(a,v)	(__outlrb((volatile u_int32_t *)(a), v))
185 #define	out32rb(a,v)	outlrb(a,v)
186 #define	in8rb(a)	inb(a)
187 #define	inwrb(a)	(__inwrb((volatile u_int16_t *)(a)))
188 #define	in16rb(a)	inwrb(a)
189 #define	inlrb(a)	(__inlrb((volatile u_int32_t *)(a)))
190 #define	in32rb(a)	inlrb(a)
191 
192 
193 static __inline void
194 __outsb(a,s,c)
195 	volatile u_int8_t *a;
196 	const u_int8_t *s;
197 	size_t c;
198 {
199 	while (c--)
200 		*a = *s++;
201 	__asm__ volatile("eieio; sync");
202 }
203 
204 static __inline void
205 __outsw(a,s,c)
206 	volatile u_int16_t *a;
207 	const u_int16_t *s;
208 	size_t c;
209 {
210 	while (c--)
211 		*a = *s++;
212 	__asm__ volatile("eieio; sync");
213 }
214 
215 static __inline void
216 __outsl(a,s,c)
217 	volatile u_int32_t *a;
218 	const u_int32_t *s;
219 	size_t c;
220 {
221 	while (c--)
222 		*a = *s++;
223 	__asm__ volatile("eieio; sync");
224 }
225 
226 static __inline void
227 __outswrb(a,s,c)
228 	volatile u_int16_t *a;
229 	const u_int16_t *s;
230 	size_t c;
231 {
232 	while (c--)
233 		__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
234 	__asm__ volatile("eieio; sync");
235 }
236 
237 static __inline void
238 __outslrb(a,s,c)
239 	volatile u_int32_t *a;
240 	const u_int32_t *s;
241 	size_t c;
242 {
243 	while (c--)
244 		__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
245 	__asm__ volatile("eieio; sync");
246 }
247 
248 static __inline void
249 __insb(a,d,c)
250 	volatile u_int8_t *a;
251 	u_int8_t *d;
252 	size_t c;
253 {
254 	while (c--)
255 		*d++ = *a;
256 	__asm__ volatile("eieio; sync");
257 }
258 
259 static __inline void
260 __insw(a,d,c)
261 	volatile u_int16_t *a;
262 	u_int16_t *d;
263 	size_t c;
264 {
265 	while (c--)
266 		*d++ = *a;
267 	__asm__ volatile("eieio; sync");
268 }
269 
270 static __inline void
271 __insl(a,d,c)
272 	volatile u_int32_t *a;
273 	u_int32_t *d;
274 	size_t c;
275 {
276 	while (c--)
277 		*d++ = *a;
278 	__asm__ volatile("eieio; sync");
279 }
280 
281 static __inline void
282 __inswrb(a,d,c)
283 	volatile u_int16_t *a;
284 	u_int16_t *d;
285 	size_t c;
286 {
287 	while (c--)
288 		__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
289 	__asm__ volatile("eieio; sync");
290 }
291 
292 static __inline void
293 __inslrb(a,d,c)
294 	volatile u_int32_t *a;
295 	u_int32_t *d;
296 	size_t c;
297 {
298 	while (c--)
299 		__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
300 	__asm__ volatile("eieio; sync");
301 }
302 
303 #define	outsb(a,s,c)	(__outsb((volatile u_int8_t *)(a), s, c))
304 #define	outs8(a,s,c)	outsb(a,s,c)
305 #define	outsw(a,s,c)	(__outsw((volatile u_int16_t *)(a), s, c))
306 #define	outs16(a,s,c)	outsw(a,s,c)
307 #define	outsl(a,s,c)	(__outsl((volatile u_int32_t *)(a), s, c))
308 #define	outs32(a,s,c)	outsl(a,s,c)
309 #define	insb(a,d,c)	(__insb((volatile u_int8_t *)(a), d, c))
310 #define	ins8(a,d,c)	insb(a,d,c)
311 #define	insw(a,d,c)	(__insw((volatile u_int16_t *)(a), d, c))
312 #define	ins16(a,d,c)	insw(a,d,c)
313 #define	insl(a,d,c)	(__insl((volatile u_int32_t *)(a), d, c))
314 #define	ins32(a,d,c)	insl(a,d,c)
315 
316 #define	outs8rb(a,s,c)	outsb(a,s,c)
317 #define	outswrb(a,s,c)	(__outswrb((volatile u_int16_t *)(a), s, c))
318 #define	outs16rb(a,s,c)	outswrb(a,s,c)
319 #define	outslrb(a,s,c)	(__outslrb((volatile u_int32_t *)(a), s, c))
320 #define	outs32rb(a,s,c)	outslrb(a,s,c)
321 #define	ins8rb(a,d,c)	insb(a,d,c)
322 #define	inswrb(a,d,c)	(__inswrb((volatile u_int16_t *)(a), d, c))
323 #define	ins16rb(a,d,c)	inswrb(a,d,c)
324 #define	inslrb(a,d,c)	(__inslrb((volatile u_int32_t *)(a), d, c))
325 #define	ins32rb(a,d,c)	inslrb(a,d,c)
326 
327 #endif /*_POWERPC_PIO_H_*/
328