1 /* $NetBSD: pte.h,v 1.2 2003/02/05 07:05:19 matt Exp $ */ 2 3 /*- 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _POWERPC_OEA_PTE_H_ 35 #define _POWERPC_OEA_PTE_H_ 36 37 #include <sys/queue.h> 38 39 /* 40 * Page Table Entries 41 */ 42 #ifndef _LOCORE 43 struct pte { 44 register_t pte_hi; 45 register_t pte_lo; 46 }; 47 48 struct pteg { 49 struct pte pt[8]; 50 }; 51 #endif /* _LOCORE */ 52 53 /* High word: */ 54 #define PTE_VALID 0x80000000 55 #define PTE_VSID 0x7fffff80 56 #define PTE_VSID_SHFT 7 57 #define PTE_VSID_LEN 24 58 #define PTE_HID 0x00000040 59 #define PTE_API 0x0000003f 60 #define PTE_API_SHFT 0 61 /* Low word: */ 62 #define PTE_RPGN 0xfffff000 63 #define PTE_RPGN_SHFT 12 64 #define PTE_REF 0x00000100 65 #define PTE_CHG 0x00000080 66 #define PTE_W 0x00000040 /* 1 = write-through, 0 = write-back */ 67 #define PTE_I 0x00000020 /* cache inhibit */ 68 #define PTE_M 0x00000010 /* memory coherency enable */ 69 #define PTE_G 0x00000008 /* guarded region (not on 601) */ 70 #define PTE_WIMG (PTE_W|PTE_I|PTE_M|PTE_G) 71 #define PTE_IG (PTE_I|PTE_G) 72 #define PTE_PP 0x00000003 73 #define PTE_SO 0x00000000 /* Super. Only (U: XX, S: RW) */ 74 #define PTE_SW 0x00000001 /* Super. Write-Only (U: RO, S: RW) */ 75 #define PTE_BW 0x00000002 /* Supervisor (U: RW, S: RW) */ 76 #define PTE_BR 0x00000003 /* Both Read Only (U: RO, S: RO) */ 77 #define PTE_RW PTE_BW 78 #define PTE_RO PTE_BR 79 80 #define PTE_EXEC 0x00000200 /* pseudo bit in attrs; page is exec */ 81 82 /* 83 * Extract bits from address 84 */ 85 #define ADDR_SR_SHFT 28 86 #define ADDR_PIDX 0x0ffff000 87 #define ADDR_PIDX_SHFT 12 88 #define ADDR_API_SHFT 22 89 #define ADDR_POFF 0x00000fff 90 #define ADDR_SEG_WIDTH 4 91 92 /* 93 * Segment registers 94 */ 95 #define SR_KEY_LEN 4 /* key bit width */ 96 #define SR_TYPE 0x80000000 /* T=0 selects memory format */ 97 #define SR_SUKEY 0x40000000 /* Supervisor protection key */ 98 #define SR_PRKEY 0x20000000 /* User protection key */ 99 #define SR_NOEXEC 0x10000000 /* No-execute protection bit */ 100 #define SR_VSID 0x00ffffff /* Virtual segment ID */ 101 102 #endif /* _POWERPC_OEA_PTE_H_ */ 103