xref: /netbsd-src/sys/arch/powerpc/include/lock.h (revision 53b02e147d4ed531c0d2a5ca9b3e8026ba3e99b5)
1 /*	$NetBSD: lock.h,v 1.16 2021/09/13 11:54:42 rin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000, 2007 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe and Andrew Doran.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Machine-dependent spin lock operations.
34  */
35 
36 #ifndef _POWERPC_LOCK_H_
37 #define _POWERPC_LOCK_H_
38 
39 static __inline int
40 __SIMPLELOCK_LOCKED_P(const __cpu_simple_lock_t *__ptr)
41 {
42 	return *__ptr == __SIMPLELOCK_LOCKED;
43 }
44 
45 static __inline int
46 __SIMPLELOCK_UNLOCKED_P(const __cpu_simple_lock_t *__ptr)
47 {
48 	return *__ptr == __SIMPLELOCK_UNLOCKED;
49 }
50 
51 static __inline void
52 __cpu_simple_lock_clear(__cpu_simple_lock_t *__ptr)
53 {
54 	*__ptr = __SIMPLELOCK_UNLOCKED;
55 }
56 
57 static __inline void
58 __cpu_simple_lock_set(__cpu_simple_lock_t *__ptr)
59 {
60 	*__ptr = __SIMPLELOCK_LOCKED;
61 }
62 
63 static __inline void
64 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
65 {
66 	*alp = __SIMPLELOCK_UNLOCKED;
67 	__asm volatile ("sync");
68 }
69 
70 static __inline void
71 __cpu_simple_lock(__cpu_simple_lock_t *alp)
72 {
73 	int old;
74 
75 	__asm volatile ("	\
76 				\n\
77 1:	lwarx	%0,0,%1		\n\
78 	cmpwi	%0,%2		\n\
79 	beq+	3f		\n\
80 2:	lwzx	%0,0,%1		\n\
81 	cmpwi	%0,%2		\n\
82 	beq+	1b		\n\
83 	b	2b		\n\
84 3:				\n"
85 #ifdef IBM405_ERRATA77
86 	"dcbt	0,%1		\n"
87 #endif
88 	"stwcx.	%3,0,%1		\n\
89 	bne-	1b		\n\
90 	isync			\n\
91 				\n"
92 	: "=&r"(old)
93 	: "r"(alp), "I"(__SIMPLELOCK_UNLOCKED), "r"(__SIMPLELOCK_LOCKED)
94 	: "memory");
95 }
96 
97 static __inline int
98 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
99 {
100 	int old, dummy;
101 
102 	__asm volatile ("	\
103 				\n\
104 1:	lwarx	%0,0,%1		\n\
105 	cmpwi	%0,%2		\n\
106 	bne	2f		\n"
107 #ifdef IBM405_ERRATA77
108 	"dcbt	0,%1		\n"
109 #endif
110 	"stwcx.	%3,0,%1		\n\
111 	bne-	1b		\n\
112 2:				\n"
113 #ifdef IBM405_ERRATA77
114 	"dcbt	0,%4		\n"
115 #endif
116 	"stwcx.	%3,0,%4		\n\
117 	isync			\n\
118 				\n"
119 	: "=&r"(old)
120 	: "r"(alp), "I"(__SIMPLELOCK_UNLOCKED), "r"(__SIMPLELOCK_LOCKED),
121 	  "r"(&dummy)
122 	: "memory");
123 
124 	return (old == __SIMPLELOCK_UNLOCKED);
125 }
126 
127 static __inline void
128 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
129 {
130 	__asm volatile ("sync");
131 	*alp = __SIMPLELOCK_UNLOCKED;
132 }
133 
134 #endif /* _POWERPC_LOCK_H_ */
135