xref: /netbsd-src/sys/arch/powerpc/include/asm.h (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: asm.h,v 1.15 2003/08/08 07:14:26 matt Exp $	*/
2 
3 /*
4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5  * Copyright (C) 1995, 1996 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef _PPC_ASM_H_
35 #define _PPC_ASM_H_
36 
37 #ifdef PIC
38 #define PIC_PROLOGUE	XXX
39 #define PIC_EPILOGUE	XXX
40 #define PIC_PLT(x)	x@plt
41 #ifdef	__STDC__
42 #define PIC_GOT(x)	XXX
43 #define PIC_GOTOFF(x)	XXX
44 #else	/* not __STDC__ */
45 #define PIC_GOT(x)	XXX
46 #define PIC_GOTOFF(x)	XXX
47 #endif	/* __STDC__ */
48 #else
49 #define PIC_PROLOGUE
50 #define PIC_EPILOGUE
51 #define PIC_PLT(x)	x
52 #define PIC_GOT(x)	x
53 #define PIC_GOTOFF(x)	x
54 #endif
55 
56 #define	_C_LABEL(x)	x
57 #define	_ASM_LABEL(x)	x
58 
59 #define	_GLOBAL(x) \
60 	.data; .align 2; .globl x; x:
61 
62 #define _ENTRY(x) \
63 	.text; .align 2; .globl x; .type x,@function; x:
64 
65 #ifdef GPROF
66 # define _PROF_PROLOGUE	mflr 0; stw 0,4(1); bl _mcount
67 #else
68 # define _PROF_PROLOGUE
69 #endif
70 
71 #define	ENTRY(y)	_ENTRY(_C_LABEL(y)); _PROF_PROLOGUE
72 #define	ENTRY_NOPROFILE(y) _ENTRY(_C_LABEL(y))
73 
74 #define	ASENTRY(y)	_ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE
75 #define	GLOBAL(y)	_GLOBAL(_C_LABEL(y))
76 
77 #define	ASMSTR		.asciz
78 
79 #define RCSID(x)	.text; .asciz x
80 
81 #ifdef __ELF__
82 #define	WEAK_ALIAS(alias,sym)						\
83 	.weak alias;							\
84 	alias = sym
85 #endif
86 
87 #ifdef __STDC__
88 #define	WARN_REFERENCES(_sym,_msg)				\
89 	.section .gnu.warning. ## _sym ; .ascii _msg ; .text
90 #else
91 #define	WARN_REFERENCES(_sym,_msg)				\
92 	.section .gnu.warning./**/_sym ; .ascii _msg ; .text
93 #endif /* __STDC__ */
94 
95 #ifdef _KERNEL
96 /*
97  * Get cpu_info pointer for current processor.  Always in SPRG0. *ALWAYS*
98  */
99 #define	GET_CPUINFO(r)		mfsprg r,0
100 /*
101  * IN:
102  *	R4[er] = first free byte beyond end/esym.
103  *
104  * OUT:
105  *	R1[sp] = new kernel stack
106  *	R4[er] = kernelend
107  */
108 
109 #define	INIT_CPUINFO(er,sp,tmp1,tmp2) 					\
110 	li	tmp1,PGOFSET;						\
111 	add	er,er,tmp1;						\
112 	andc	er,er,tmp1;		/* page align */		\
113 	lis	tmp1,_C_LABEL(cpu_info)@ha;				\
114 	addi	tmp1,tmp1,_C_LABEL(cpu_info)@l;				\
115 	mtsprg0	tmp1;			/* save for later use */	\
116 	addi	er,er,INTSTK;						\
117 	stptr	er,CI_INTSTK(tmp1);					\
118 	stptr	er,CI_IDLE_PCB(tmp1);					\
119 	addi	er,er,USPACE;		/* space for idle_u */		\
120 	li	tmp2,-1;						\
121 	stint	tmp2,CI_INTRDEPTH(tmp1);				\
122 	li	tmp2,0;							\
123 	stptr	tmp2,-CALLFRAMELEN(er);	/* terminate idle stack chain */\
124 	lis	tmp1,_C_LABEL(proc0paddr)@ha;				\
125 	stptr	er,_C_LABEL(proc0paddr)@l(tmp1);			\
126 	addi	er,er,USPACE;		/* stackpointer for proc0 */	\
127 	addi	sp,er,-FRAMELEN;	/* stackpointer for proc0 */	\
128 		/* er = end of mem reserved for kernel */		\
129 	stptru	tmp2,-CALLFRAMELEN(sp)	/* end of stack chain */
130 
131 #endif
132 
133 /* Condition Register Bit Fields */
134 
135 #if !defined(_NOREGNAMES)
136 #if defined(_KERNEL) || defined(_STANDALONE)
137 #define cr0     0
138 #define cr1     1
139 #define cr2     2
140 #define cr3     3
141 #define cr4     4
142 #define cr5     5
143 #define cr6     6
144 #define cr7     7
145 #endif
146 
147 /* General Purpose Registers (GPRs) */
148 
149 #if defined(_KERNEL) || defined(_STANDALONE)
150 #define r0      0
151 #define r1      1
152 #define r2      2
153 #define r3      3
154 #define r4      4
155 #define r5      5
156 #define r6      6
157 #define r7      7
158 #define r8      8
159 #define r9      9
160 #define r10     10
161 #define r11     11
162 #define r12     12
163 #define r13     13
164 #define r14     14
165 #define r15     15
166 #define r16     16
167 #define r17     17
168 #define r18     18
169 #define r19     19
170 #define r20     20
171 #define r21     21
172 #define r22     22
173 #define r23     23
174 #define r24     24
175 #define r25     25
176 #define r26     26
177 #define r27     27
178 #define r28     28
179 #define r29     29
180 #define r30     30
181 #define r31     31
182 #endif
183 
184 /* Floating Point Registers (FPRs) */
185 
186 #if defined(_KERNEL) || defined(_STANDALONE)
187 #define fr0     0
188 #define fr1     1
189 #define fr2     2
190 #define fr3     3
191 #define fr4     4
192 #define fr5     5
193 #define fr6     6
194 #define fr7     7
195 #define fr8     8
196 #define fr9     9
197 #define fr10    10
198 #define fr11    11
199 #define fr12    12
200 #define fr13    13
201 #define fr14    14
202 #define fr15    15
203 #define fr16    16
204 #define fr17    17
205 #define fr18    18
206 #define fr19    19
207 #define fr20    20
208 #define fr21    21
209 #define fr22    22
210 #define fr23    23
211 #define fr24    24
212 #define fr25    25
213 #define fr26    26
214 #define fr27    27
215 #define fr28    28
216 #define fr29    29
217 #define fr30    30
218 #define fr31    31
219 #endif
220 #endif /* !_NOREGNAMES */
221 
222 /*
223  * Add some psuedo instructions to made sharing of assembly versions of
224  * ILP32 and LP64 code possible.
225  */
226 #define ldint	lwz		/* not needed but for completeness */
227 #define ldintu	lwzu		/* not needed but for completeness */
228 #define stint	stw		/* not needed but for completeness */
229 #define stintu	stwu		/* not needed but for completeness */
230 #ifndef _LP64
231 #define ldlong	lwz		/* load "C" long */
232 #define ldlongu	lwzu		/* load "C" long with udpate */
233 #define stlong	stw		/* load "C" long */
234 #define stlongu	stwu		/* load "C" long with udpate */
235 #define ldptr	lwz		/* load "C" pointer */
236 #define ldptru	lwzu		/* load "C" pointer with udpate */
237 #define stptr	stw		/* load "C" pointer */
238 #define stptru	stwu		/* load "C" pointer with udpate */
239 #define	ldreg	lwz		/* load PPC general register */
240 #define	ldregu	lwzu		/* load PPC general register with udpate */
241 #define	streg	stw		/* load PPC general register */
242 #define	stregu	stwu		/* load PPC general register with udpate */
243 #define	SZREG	4		/* 4 byte registers */
244 #else
245 #define ldlong	ld		/* load "C" long */
246 #define ldlongu	ldu		/* load "C" long with update */
247 #define stlong	std		/* store "C" long */
248 #define stlongu	stdu		/* store "C" long with update */
249 #define ldptr	ld		/* load "C" pointer */
250 #define ldptru	ldu		/* load "C" pointer with update */
251 #define stptr	std		/* store "C" pointer */
252 #define stptru	stdu		/* store "C" pointer with update */
253 #define	ldreg	ld		/* load PPC general register */
254 #define	ldregu	ldu		/* load PPC general register with update */
255 #define	streg	std		/* store PPC general register */
256 #define	stregu	stdu		/* store PPC general register with update */
257 /* redefined this to force an error on PPC64 to catch their use.  */
258 #define	lmw	lmd		/* load multiple PPC general registers */
259 #define	stmw	stmd		/* store multiple PPC general registers */
260 #define	SZREG	8		/* 8 byte registers */
261 #endif
262 
263 #endif /* !_PPC_ASM_H_ */
264