1 /* $NetBSD: pmap.c,v 1.31 2005/01/27 12:35:53 simonb Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.31 2005/01/27 12:35:53 simonb Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/malloc.h> 74 #include <sys/proc.h> 75 #include <sys/user.h> 76 #include <sys/queue.h> 77 #include <sys/systm.h> 78 #include <sys/pool.h> 79 #include <sys/device.h> 80 81 #include <uvm/uvm.h> 82 83 #include <machine/cpu.h> 84 #include <machine/pcb.h> 85 #include <machine/powerpc.h> 86 87 #include <powerpc/spr.h> 88 #include <machine/tlb.h> 89 90 /* 91 * kernmap is an array of PTEs large enough to map in 92 * 4GB. At 16KB/page it is 256K entries or 2MB. 93 */ 94 #define KERNMAP_SIZE ((0xffffffffU/PAGE_SIZE)+1) 95 caddr_t kernmap; 96 97 #define MINCTX 2 98 #define NUMCTX 256 99 volatile struct pmap *ctxbusy[NUMCTX]; 100 101 #define TLBF_USED 0x1 102 #define TLBF_REF 0x2 103 #define TLBF_LOCKED 0x4 104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED) 105 typedef struct tlb_info_s { 106 char ti_flags; 107 char ti_ctx; /* TLB_PID assiciated with the entry */ 108 u_int ti_va; 109 } tlb_info_t; 110 111 volatile tlb_info_t tlb_info[NTLB]; 112 /* We'll use a modified FIFO replacement policy cause it's cheap */ 113 volatile int tlbnext = TLB_NRESERVED; 114 115 u_long dtlb_miss_count = 0; 116 u_long itlb_miss_count = 0; 117 u_long ktlb_miss_count = 0; 118 u_long utlb_miss_count = 0; 119 120 /* Event counters */ 121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 122 NULL, "cpu", "tlbmiss"); 123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 124 NULL, "cpu", "tlbhit"); 125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 126 NULL, "cpu", "tlbflush"); 127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 128 NULL, "cpu", "tlbenter"); 129 130 struct pmap kernel_pmap_; 131 132 int physmem; 133 static int npgs; 134 static u_int nextavail; 135 #ifndef MSGBUFADDR 136 extern paddr_t msgbuf_paddr; 137 #endif 138 139 static struct mem_region *mem, *avail; 140 141 /* 142 * This is a cache of referenced/modified bits. 143 * Bits herein are shifted by ATTRSHFT. 144 */ 145 static char *pmap_attrib; 146 147 #define PV_WIRED 0x1 148 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED) 149 #define PV_UNWIRE(pv) ((pv)->pv_va &= ~PV_WIRED) 150 #define PV_ISWIRED(pv) ((pv)->pv_va & PV_WIRED) 151 #define PV_CMPVA(va,pv) (!(((pv)->pv_va ^ (va)) & (~PV_WIRED))) 152 153 struct pv_entry { 154 struct pv_entry *pv_next; /* Linked list of mappings */ 155 vaddr_t pv_va; /* virtual address of mapping */ 156 struct pmap *pv_pm; 157 }; 158 159 struct pv_entry *pv_table; 160 static struct pool pv_pool; 161 162 static int pmap_initialized; 163 164 static int ctx_flush(int); 165 166 inline struct pv_entry *pa_to_pv(paddr_t); 167 static inline char *pa_to_attr(paddr_t); 168 169 static inline volatile u_int *pte_find(struct pmap *, vaddr_t); 170 static inline int pte_enter(struct pmap *, vaddr_t, u_int); 171 172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t, boolean_t); 173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t); 174 175 176 inline struct pv_entry * 177 pa_to_pv(paddr_t pa) 178 { 179 int bank, pg; 180 181 bank = vm_physseg_find(atop(pa), &pg); 182 if (bank == -1) 183 return NULL; 184 return &vm_physmem[bank].pmseg.pvent[pg]; 185 } 186 187 static inline char * 188 pa_to_attr(paddr_t pa) 189 { 190 int bank, pg; 191 192 bank = vm_physseg_find(atop(pa), &pg); 193 if (bank == -1) 194 return NULL; 195 return &vm_physmem[bank].pmseg.attrs[pg]; 196 } 197 198 /* 199 * Insert PTE into page table. 200 */ 201 int 202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte) 203 { 204 int seg = STIDX(va); 205 int ptn = PTIDX(va); 206 u_int oldpte; 207 208 if (!pm->pm_ptbl[seg]) { 209 /* Don't allocate a page to clear a non-existent mapping. */ 210 if (!pte) 211 return (0); 212 /* Allocate a page XXXX this will sleep! */ 213 pm->pm_ptbl[seg] = 214 (uint *)uvm_km_zalloc(kernel_map, PAGE_SIZE); 215 } 216 oldpte = pm->pm_ptbl[seg][ptn]; 217 pm->pm_ptbl[seg][ptn] = pte; 218 219 /* Flush entry. */ 220 ppc4xx_tlb_flush(va, pm->pm_ctx); 221 if (oldpte != pte) { 222 if (pte == 0) 223 pm->pm_stats.resident_count--; 224 else 225 pm->pm_stats.resident_count++; 226 } 227 return (1); 228 } 229 230 /* 231 * Get a pointer to a PTE in a page table. 232 */ 233 volatile u_int * 234 pte_find(struct pmap *pm, vaddr_t va) 235 { 236 int seg = STIDX(va); 237 int ptn = PTIDX(va); 238 239 if (pm->pm_ptbl[seg]) 240 return (&pm->pm_ptbl[seg][ptn]); 241 242 return (NULL); 243 } 244 245 /* 246 * This is called during initppc, before the system is really initialized. 247 */ 248 void 249 pmap_bootstrap(u_int kernelstart, u_int kernelend) 250 { 251 struct mem_region *mp, *mp1; 252 int cnt, i; 253 u_int s, e, sz; 254 255 /* 256 * Allocate the kernel page table at the end of 257 * kernel space so it's in the locked TTE. 258 */ 259 kernmap = (caddr_t)kernelend; 260 261 /* 262 * Initialize kernel page table. 263 */ 264 for (i = 0; i < STSZ; i++) { 265 pmap_kernel()->pm_ptbl[i] = 0; 266 } 267 ctxbusy[0] = ctxbusy[1] = pmap_kernel(); 268 269 /* 270 * Announce page-size to the VM-system 271 */ 272 uvmexp.pagesize = NBPG; 273 uvm_setpagesize(); 274 275 /* 276 * Get memory. 277 */ 278 mem_regions(&mem, &avail); 279 for (mp = mem; mp->size; mp++) { 280 physmem += btoc(mp->size); 281 printf("+%lx,",mp->size); 282 } 283 printf("\n"); 284 ppc4xx_tlb_init(); 285 /* 286 * Count the number of available entries. 287 */ 288 for (cnt = 0, mp = avail; mp->size; mp++) 289 cnt++; 290 291 /* 292 * Page align all regions. 293 * Non-page aligned memory isn't very interesting to us. 294 * Also, sort the entries for ascending addresses. 295 */ 296 kernelstart &= ~PGOFSET; 297 kernelend = (kernelend + PGOFSET) & ~PGOFSET; 298 for (mp = avail; mp->size; mp++) { 299 s = mp->start; 300 e = mp->start + mp->size; 301 printf("%08x-%08x -> ",s,e); 302 /* 303 * Check whether this region holds all of the kernel. 304 */ 305 if (s < kernelstart && e > kernelend) { 306 avail[cnt].start = kernelend; 307 avail[cnt++].size = e - kernelend; 308 e = kernelstart; 309 } 310 /* 311 * Look whether this regions starts within the kernel. 312 */ 313 if (s >= kernelstart && s < kernelend) { 314 if (e <= kernelend) 315 goto empty; 316 s = kernelend; 317 } 318 /* 319 * Now look whether this region ends within the kernel. 320 */ 321 if (e > kernelstart && e <= kernelend) { 322 if (s >= kernelstart) 323 goto empty; 324 e = kernelstart; 325 } 326 /* 327 * Now page align the start and size of the region. 328 */ 329 s = round_page(s); 330 e = trunc_page(e); 331 if (e < s) 332 e = s; 333 sz = e - s; 334 printf("%08x-%08x = %x\n",s,e,sz); 335 /* 336 * Check whether some memory is left here. 337 */ 338 if (sz == 0) { 339 empty: 340 memmove(mp, mp + 1, 341 (cnt - (mp - avail)) * sizeof *mp); 342 cnt--; 343 mp--; 344 continue; 345 } 346 /* 347 * Do an insertion sort. 348 */ 349 npgs += btoc(sz); 350 for (mp1 = avail; mp1 < mp; mp1++) 351 if (s < mp1->start) 352 break; 353 if (mp1 < mp) { 354 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1); 355 mp1->start = s; 356 mp1->size = sz; 357 } else { 358 mp->start = s; 359 mp->size = sz; 360 } 361 } 362 363 /* 364 * We cannot do pmap_steal_memory here, 365 * since we don't run with translation enabled yet. 366 */ 367 #ifndef MSGBUFADDR 368 /* 369 * allow for msgbuf 370 */ 371 sz = round_page(MSGBUFSIZE); 372 mp = NULL; 373 for (mp1 = avail; mp1->size; mp1++) 374 if (mp1->size >= sz) 375 mp = mp1; 376 if (mp == NULL) 377 panic("not enough memory?"); 378 379 npgs -= btoc(sz); 380 msgbuf_paddr = mp->start + mp->size - sz; 381 mp->size -= sz; 382 if (mp->size <= 0) 383 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp); 384 #endif 385 386 for (mp = avail; mp->size; mp++) 387 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size), 388 atop(mp->start), atop(mp->start + mp->size), 389 VM_FREELIST_DEFAULT); 390 391 /* 392 * Initialize kernel pmap and hardware. 393 */ 394 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */ 395 pmap_kernel()->pm_ctx = KERNEL_PID; 396 nextavail = avail->start; 397 398 399 evcnt_attach_static(&tlbmiss_ev); 400 evcnt_attach_static(&tlbhit_ev); 401 evcnt_attach_static(&tlbflush_ev); 402 evcnt_attach_static(&tlbenter_ev); 403 } 404 405 /* 406 * Restrict given range to physical memory 407 * 408 * (Used by /dev/mem) 409 */ 410 void 411 pmap_real_memory(paddr_t *start, psize_t *size) 412 { 413 struct mem_region *mp; 414 415 for (mp = mem; mp->size; mp++) { 416 if (*start + *size > mp->start && 417 *start < mp->start + mp->size) { 418 if (*start < mp->start) { 419 *size -= mp->start - *start; 420 *start = mp->start; 421 } 422 if (*start + *size > mp->start + mp->size) 423 *size = mp->start + mp->size - *start; 424 return; 425 } 426 } 427 *size = 0; 428 } 429 430 /* 431 * Initialize anything else for pmap handling. 432 * Called during vm_init(). 433 */ 434 void 435 pmap_init(void) 436 { 437 struct pv_entry *pv; 438 vsize_t sz; 439 vaddr_t addr; 440 int i, s; 441 int bank; 442 char *attr; 443 444 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs); 445 sz = round_page(sz); 446 addr = uvm_km_zalloc(kernel_map, sz); 447 s = splvm(); 448 pv = pv_table = (struct pv_entry *)addr; 449 for (i = npgs; --i >= 0;) 450 pv++->pv_pm = NULL; 451 pmap_attrib = (char *)pv; 452 memset(pv, 0, npgs); 453 454 pv = pv_table; 455 attr = pmap_attrib; 456 for (bank = 0; bank < vm_nphysseg; bank++) { 457 sz = vm_physmem[bank].end - vm_physmem[bank].start; 458 vm_physmem[bank].pmseg.pvent = pv; 459 vm_physmem[bank].pmseg.attrs = attr; 460 pv += sz; 461 attr += sz; 462 } 463 464 pmap_initialized = 1; 465 splx(s); 466 467 /* Setup a pool for additional pvlist structures */ 468 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL); 469 } 470 471 /* 472 * How much virtual space is available to the kernel? 473 */ 474 void 475 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 476 { 477 478 #if 0 479 /* 480 * Reserve one segment for kernel virtual memory 481 */ 482 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT); 483 *end = *start + SEGMENT_LENGTH; 484 #else 485 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS; 486 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS; 487 #endif 488 } 489 490 #ifdef PMAP_GROWKERNEL 491 /* 492 * Preallocate kernel page tables to a specified VA. 493 * This simply loops through the first TTE for each 494 * page table from the beginning of the kernel pmap, 495 * reads the entry, and if the result is 496 * zero (either invalid entry or no page table) it stores 497 * a zero there, populating page tables in the process. 498 * This is not the most efficient technique but i don't 499 * expect it to be called that often. 500 */ 501 extern struct vm_page *vm_page_alloc1 __P((void)); 502 extern void vm_page_free1 __P((struct vm_page *)); 503 504 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS; 505 506 vaddr_t 507 pmap_growkernel(vaddr_t maxkvaddr) 508 { 509 int s; 510 int seg; 511 paddr_t pg; 512 struct pmap *pm = pmap_kernel(); 513 514 s = splvm(); 515 516 /* Align with the start of a page table */ 517 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr; 518 kbreak += PTMAP) { 519 seg = STIDX(kbreak); 520 521 if (pte_find(pm, kbreak)) 522 continue; 523 524 if (uvm.page_init_done) { 525 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1()); 526 } else { 527 if (!uvm_page_physget(&pg)) 528 panic("pmap_growkernel: no memory"); 529 } 530 if (!pg) panic("pmap_growkernel: no pages"); 531 pmap_zero_page((paddr_t)pg); 532 533 /* XXX This is based on all phymem being addressable */ 534 pm->pm_ptbl[seg] = (u_int *)pg; 535 } 536 splx(s); 537 return (kbreak); 538 } 539 540 /* 541 * vm_page_alloc1: 542 * 543 * Allocate and return a memory cell with no associated object. 544 */ 545 struct vm_page * 546 vm_page_alloc1(void) 547 { 548 struct vm_page *pg; 549 550 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE); 551 if (pg) { 552 pg->wire_count = 1; /* no mappings yet */ 553 pg->flags &= ~PG_BUSY; /* never busy */ 554 } 555 return pg; 556 } 557 558 /* 559 * vm_page_free1: 560 * 561 * Returns the given page to the free list, 562 * disassociating it with any VM object. 563 * 564 * Object and page must be locked prior to entry. 565 */ 566 void 567 vm_page_free1(struct vm_page *mem) 568 { 569 #ifdef DIAGNOSTIC 570 if (mem->flags != (PG_CLEAN|PG_FAKE)) { 571 printf("Freeing invalid page %p\n", mem); 572 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem)); 573 #ifdef DDB 574 Debugger(); 575 #endif 576 return; 577 } 578 #endif 579 mem->flags |= PG_BUSY; 580 mem->wire_count = 0; 581 uvm_pagefree(mem); 582 } 583 #endif 584 585 /* 586 * Create and return a physical map. 587 */ 588 struct pmap * 589 pmap_create(void) 590 { 591 struct pmap *pm; 592 593 pm = malloc(sizeof *pm, M_VMPMAP, M_WAITOK); 594 memset(pm, 0, sizeof *pm); 595 pm->pm_refs = 1; 596 return pm; 597 } 598 599 /* 600 * Add a reference to the given pmap. 601 */ 602 void 603 pmap_reference(struct pmap *pm) 604 { 605 606 pm->pm_refs++; 607 } 608 609 /* 610 * Retire the given pmap from service. 611 * Should only be called if the map contains no valid mappings. 612 */ 613 void 614 pmap_destroy(struct pmap *pm) 615 { 616 int i; 617 618 if (--pm->pm_refs > 0) { 619 return; 620 } 621 KASSERT(pm->pm_stats.resident_count == 0); 622 KASSERT(pm->pm_stats.wired_count == 0); 623 for (i = 0; i < STSZ; i++) 624 if (pm->pm_ptbl[i]) { 625 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i], 626 PAGE_SIZE); 627 pm->pm_ptbl[i] = NULL; 628 } 629 if (pm->pm_ctx) 630 ctx_free(pm); 631 free(pm, M_VMPMAP); 632 } 633 634 /* 635 * Copy the range specified by src_addr/len 636 * from the source map to the range dst_addr/len 637 * in the destination map. 638 * 639 * This routine is only advisory and need not do anything. 640 */ 641 void 642 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr, 643 vsize_t len, vaddr_t src_addr) 644 { 645 } 646 647 /* 648 * Require that all active physical maps contain no 649 * incorrect entries NOW. 650 */ 651 void 652 pmap_update(struct pmap *pmap) 653 { 654 } 655 656 /* 657 * Garbage collects the physical map system for 658 * pages which are no longer used. 659 * Success need not be guaranteed -- that is, there 660 * may well be pages which are not referenced, but 661 * others may be collected. 662 * Called by the pageout daemon when pages are scarce. 663 */ 664 void 665 pmap_collect(struct pmap *pm) 666 { 667 } 668 669 /* 670 * Fill the given physical page with zeroes. 671 */ 672 void 673 pmap_zero_page(paddr_t pa) 674 { 675 676 #ifdef PPC_4XX_NOCACHE 677 memset((caddr_t)pa, 0, PAGE_SIZE); 678 #else 679 int i; 680 681 for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) { 682 __asm __volatile ("dcbz 0,%0" :: "r"(pa)); 683 pa += CACHELINESIZE; 684 } 685 #endif 686 } 687 688 /* 689 * Copy the given physical source page to its destination. 690 */ 691 void 692 pmap_copy_page(paddr_t src, paddr_t dst) 693 { 694 695 memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE); 696 dcache_flush_page(dst); 697 } 698 699 /* 700 * This returns whether this is the first mapping of a page. 701 */ 702 static inline int 703 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa, boolean_t wired) 704 { 705 struct pv_entry *pv, *npv = NULL; 706 int s; 707 708 if (!pmap_initialized) 709 return 0; 710 711 s = splvm(); 712 pv = pa_to_pv(pa); 713 if (!pv->pv_pm) { 714 /* 715 * No entries yet, use header as the first entry. 716 */ 717 pv->pv_va = va; 718 pv->pv_pm = pm; 719 pv->pv_next = NULL; 720 } else { 721 /* 722 * There is at least one other VA mapping this page. 723 * Place this entry after the header. 724 */ 725 npv = pool_get(&pv_pool, PR_WAITOK); 726 npv->pv_va = va; 727 npv->pv_pm = pm; 728 npv->pv_next = pv->pv_next; 729 pv->pv_next = npv; 730 } 731 if (wired) { 732 PV_WIRE(pv); 733 } 734 splx(s); 735 return (1); 736 } 737 738 static void 739 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa) 740 { 741 struct pv_entry *pv, *npv; 742 743 /* 744 * Remove from the PV table. 745 */ 746 pv = pa_to_pv(pa); 747 if (!pv) 748 return; 749 750 /* 751 * If it is the first entry on the list, it is actually 752 * in the header and we must copy the following entry up 753 * to the header. Otherwise we must search the list for 754 * the entry. In either case we free the now unused entry. 755 */ 756 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) { 757 if (PV_ISWIRED(pv)) { 758 pm->pm_stats.wired_count--; 759 } 760 if ((npv = pv->pv_next)) { 761 *pv = *npv; 762 pool_put(&pv_pool, npv); 763 } else 764 pv->pv_pm = NULL; 765 } else { 766 for (; (npv = pv->pv_next) != NULL; pv = npv) 767 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) 768 break; 769 if (npv) { 770 pv->pv_next = npv->pv_next; 771 if (PV_ISWIRED(npv)) { 772 pm->pm_stats.wired_count--; 773 } 774 pool_put(&pv_pool, npv); 775 } 776 } 777 } 778 779 /* 780 * Insert physical page at pa into the given pmap at virtual address va. 781 */ 782 int 783 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 784 { 785 int s; 786 u_int tte; 787 int managed; 788 789 /* 790 * Have to remove any existing mapping first. 791 */ 792 pmap_remove(pm, va, va + PAGE_SIZE); 793 794 if (flags & PMAP_WIRED) 795 flags |= prot; 796 797 managed = 0; 798 if (vm_physseg_find(atop(pa), NULL) != -1) 799 managed = 1; 800 801 /* 802 * Generate TTE. 803 */ 804 tte = TTE_PA(pa); 805 /* XXXX -- need to support multiple page sizes. */ 806 tte |= TTE_SZ_16K; 807 #ifdef DIAGNOSTIC 808 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) == 809 (PME_NOCACHE | PME_WRITETHROUG)) 810 panic("pmap_enter: uncached & writethrough"); 811 #endif 812 if (flags & PME_NOCACHE) 813 /* Must be I/O mapping */ 814 tte |= TTE_I | TTE_G; 815 #ifdef PPC_4XX_NOCACHE 816 tte |= TTE_I; 817 #else 818 else if (flags & PME_WRITETHROUG) 819 /* Uncached and writethrough are not compatible */ 820 tte |= TTE_W; 821 #endif 822 if (pm == pmap_kernel()) 823 tte |= TTE_ZONE(ZONE_PRIV); 824 else 825 tte |= TTE_ZONE(ZONE_USER); 826 827 if (flags & VM_PROT_WRITE) 828 tte |= TTE_WR; 829 830 if (flags & VM_PROT_EXECUTE) 831 tte |= TTE_EX; 832 833 /* 834 * Now record mapping for later back-translation. 835 */ 836 if (pmap_initialized && managed) { 837 char *attr; 838 839 if (!pmap_enter_pv(pm, va, pa, flags & PMAP_WIRED)) { 840 /* Could not enter pv on a managed page */ 841 return 1; 842 } 843 844 /* Now set attributes. */ 845 attr = pa_to_attr(pa); 846 #ifdef DIAGNOSTIC 847 if (!attr) 848 panic("managed but no attr"); 849 #endif 850 if (flags & VM_PROT_ALL) 851 *attr |= PMAP_ATTR_REF; 852 if (flags & VM_PROT_WRITE) 853 *attr |= PMAP_ATTR_CHG; 854 } 855 856 s = splvm(); 857 858 /* Insert page into page table. */ 859 pte_enter(pm, va, tte); 860 861 /* If this is a real fault, enter it in the tlb */ 862 if (tte && ((flags & PMAP_WIRED) == 0)) { 863 ppc4xx_tlb_enter(pm->pm_ctx, va, tte); 864 } 865 splx(s); 866 867 /* Flush the real memory from the instruction cache. */ 868 if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0) 869 __syncicache((void *)pa, PAGE_SIZE); 870 871 if (flags & PMAP_WIRED) 872 pm->pm_stats.wired_count++; 873 874 return 0; 875 } 876 877 void 878 pmap_unwire(struct pmap *pm, vaddr_t va) 879 { 880 struct pv_entry *pv, *npv; 881 paddr_t pa; 882 int s; 883 884 if (!pmap_extract(pm, va, &pa)) { 885 return; 886 } 887 888 pv = pa_to_pv(pa); 889 if (!pv) 890 return; 891 892 /* 893 * If it is the first entry on the list, it is actually 894 * in the header and we must copy the following entry up 895 * to the header. Otherwise we must search the list for 896 * the entry. In either case we free the now unused entry. 897 */ 898 s = splvm(); 899 for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) { 900 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) { 901 if (PV_ISWIRED(npv)) { 902 PV_UNWIRE(npv); 903 pm->pm_stats.wired_count--; 904 } 905 break; 906 } 907 } 908 splx(s); 909 } 910 911 void 912 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 913 { 914 int s; 915 u_int tte; 916 struct pmap *pm = pmap_kernel(); 917 918 /* 919 * Have to remove any existing mapping first. 920 */ 921 922 /* 923 * Generate TTE. 924 * 925 * XXXX 926 * 927 * Since the kernel does not handle execution privileges properly, 928 * we will handle read and execute permissions together. 929 */ 930 tte = 0; 931 if (prot & VM_PROT_ALL) { 932 933 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV); 934 /* XXXX -- need to support multiple page sizes. */ 935 tte |= TTE_SZ_16K; 936 #ifdef DIAGNOSTIC 937 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) == 938 (PME_NOCACHE | PME_WRITETHROUG)) 939 panic("pmap_kenter_pa: uncached & writethrough"); 940 #endif 941 if (prot & PME_NOCACHE) 942 /* Must be I/O mapping */ 943 tte |= TTE_I | TTE_G; 944 #ifdef PPC_4XX_NOCACHE 945 tte |= TTE_I; 946 #else 947 else if (prot & PME_WRITETHROUG) 948 /* Uncached and writethrough are not compatible */ 949 tte |= TTE_W; 950 #endif 951 if (prot & VM_PROT_WRITE) 952 tte |= TTE_WR; 953 } 954 955 s = splvm(); 956 957 /* Insert page into page table. */ 958 pte_enter(pm, va, tte); 959 splx(s); 960 } 961 962 void 963 pmap_kremove(vaddr_t va, vsize_t len) 964 { 965 966 while (len > 0) { 967 pte_enter(pmap_kernel(), va, 0); 968 va += PAGE_SIZE; 969 len -= PAGE_SIZE; 970 } 971 } 972 973 /* 974 * Remove the given range of mapping entries. 975 */ 976 void 977 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva) 978 { 979 int s; 980 paddr_t pa; 981 volatile u_int *ptp; 982 983 s = splvm(); 984 while (va < endva) { 985 986 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) { 987 pa = TTE_PA(pa); 988 pmap_remove_pv(pm, va, pa); 989 *ptp = 0; 990 ppc4xx_tlb_flush(va, pm->pm_ctx); 991 pm->pm_stats.resident_count--; 992 } 993 va += PAGE_SIZE; 994 } 995 996 splx(s); 997 } 998 999 /* 1000 * Get the physical page address for the given pmap/virtual address. 1001 */ 1002 boolean_t 1003 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap) 1004 { 1005 int seg = STIDX(va); 1006 int ptn = PTIDX(va); 1007 u_int pa = 0; 1008 int s; 1009 1010 s = splvm(); 1011 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) { 1012 *pap = TTE_PA(pa) | (va & PGOFSET); 1013 } 1014 splx(s); 1015 return (pa != 0); 1016 } 1017 1018 /* 1019 * Lower the protection on the specified range of this pmap. 1020 * 1021 * There are only two cases: either the protection is going to 0, 1022 * or it is going to read-only. 1023 */ 1024 void 1025 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 1026 { 1027 volatile u_int *ptp; 1028 int s, bic; 1029 1030 if ((prot & VM_PROT_READ) == 0) { 1031 pmap_remove(pm, sva, eva); 1032 return; 1033 } 1034 bic = 0; 1035 if ((prot & VM_PROT_WRITE) == 0) { 1036 bic |= TTE_WR; 1037 } 1038 if ((prot & VM_PROT_EXECUTE) == 0) { 1039 bic |= TTE_EX; 1040 } 1041 if (bic == 0) { 1042 return; 1043 } 1044 s = splvm(); 1045 while (sva < eva) { 1046 if ((ptp = pte_find(pm, sva)) != NULL) { 1047 *ptp &= ~bic; 1048 ppc4xx_tlb_flush(sva, pm->pm_ctx); 1049 } 1050 sva += PAGE_SIZE; 1051 } 1052 splx(s); 1053 } 1054 1055 boolean_t 1056 pmap_check_attr(struct vm_page *pg, u_int mask, int clear) 1057 { 1058 paddr_t pa; 1059 char *attr; 1060 int s, rv; 1061 1062 /* 1063 * First modify bits in cache. 1064 */ 1065 pa = VM_PAGE_TO_PHYS(pg); 1066 attr = pa_to_attr(pa); 1067 if (attr == NULL) 1068 return FALSE; 1069 1070 s = splvm(); 1071 rv = ((*attr & mask) != 0); 1072 if (clear) { 1073 *attr &= ~mask; 1074 pmap_page_protect(pg, mask == PMAP_ATTR_CHG ? VM_PROT_READ : 0); 1075 } 1076 splx(s); 1077 return rv; 1078 } 1079 1080 1081 /* 1082 * Lower the protection on the specified physical page. 1083 * 1084 * There are only two cases: either the protection is going to 0, 1085 * or it is going to read-only. 1086 */ 1087 void 1088 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 1089 { 1090 paddr_t pa = VM_PAGE_TO_PHYS(pg); 1091 vaddr_t va; 1092 struct pv_entry *pvh, *pv, *npv; 1093 struct pmap *pm; 1094 1095 pvh = pa_to_pv(pa); 1096 if (pvh == NULL) 1097 return; 1098 1099 /* Handle extra pvs which may be deleted in the operation */ 1100 for (pv = pvh->pv_next; pv; pv = npv) { 1101 npv = pv->pv_next; 1102 1103 pm = pv->pv_pm; 1104 va = pv->pv_va; 1105 pmap_protect(pm, va, va + PAGE_SIZE, prot); 1106 } 1107 /* Now check the head pv */ 1108 if (pvh->pv_pm) { 1109 pv = pvh; 1110 pm = pv->pv_pm; 1111 va = pv->pv_va; 1112 pmap_protect(pm, va, va + PAGE_SIZE, prot); 1113 } 1114 } 1115 1116 /* 1117 * Activate the address space for the specified process. If the process 1118 * is the current process, load the new MMU context. 1119 */ 1120 void 1121 pmap_activate(struct lwp *l) 1122 { 1123 #if 0 1124 struct pcb *pcb = &l->l_proc->p_addr->u_pcb; 1125 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 1126 1127 /* 1128 * XXX Normally performed in cpu_fork(). 1129 */ 1130 printf("pmap_activate(%p), pmap=%p\n",l,pmap); 1131 pcb->pcb_pm = pmap; 1132 #endif 1133 } 1134 1135 /* 1136 * Deactivate the specified process's address space. 1137 */ 1138 void 1139 pmap_deactivate(struct lwp *l) 1140 { 1141 } 1142 1143 /* 1144 * Synchronize caches corresponding to [addr, addr+len) in p. 1145 */ 1146 void 1147 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 1148 { 1149 struct pmap *pm = p->p_vmspace->vm_map.pmap; 1150 int msr, ctx, opid, step; 1151 1152 step = CACHELINESIZE; 1153 1154 /* 1155 * Need to turn off IMMU and switch to user context. 1156 * (icbi uses DMMU). 1157 */ 1158 if (!(ctx = pm->pm_ctx)) { 1159 /* No context -- assign it one */ 1160 ctx_alloc(pm); 1161 ctx = pm->pm_ctx; 1162 } 1163 __asm __volatile("mfmsr %0;" 1164 "li %1, %7;" 1165 "andc %1,%0,%1;" 1166 "mtmsr %1;" 1167 "sync;isync;" 1168 "mfpid %1;" 1169 "mtpid %2;" 1170 "sync; isync;" 1171 "1:" 1172 "dcbf 0,%3;" 1173 "icbi 0,%3;" 1174 "add %3,%3,%5;" 1175 "addc. %4,%4,%6;" 1176 "bge 1b;" 1177 "mtpid %1;" 1178 "mtmsr %0;" 1179 "sync; isync" 1180 : "=&r" (msr), "=&r" (opid) 1181 : "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step), 1182 "K" (PSL_IR | PSL_DR)); 1183 } 1184 1185 1186 /* This has to be done in real mode !!! */ 1187 void 1188 ppc4xx_tlb_flush(vaddr_t va, int pid) 1189 { 1190 u_long i, found; 1191 u_long msr; 1192 1193 /* If there's no context then it can't be mapped. */ 1194 if (!pid) 1195 return; 1196 1197 asm("mfpid %1;" /* Save PID */ 1198 "mfmsr %2;" /* Save MSR */ 1199 "li %0,0;" /* Now clear MSR */ 1200 "mtmsr %0;" 1201 "mtpid %4;" /* Set PID */ 1202 "sync;" 1203 "tlbsx. %0,0,%3;" /* Search TLB */ 1204 "sync;" 1205 "mtpid %1;" /* Restore PID */ 1206 "mtmsr %2;" /* Restore MSR */ 1207 "sync;isync;" 1208 "li %1,1;" 1209 "beq 1f;" 1210 "li %1,0;" 1211 "1:" 1212 : "=&r" (i), "=&r" (found), "=&r" (msr) 1213 : "r" (va), "r" (pid)); 1214 if (found && !TLB_LOCKED(i)) { 1215 1216 /* Now flush translation */ 1217 asm volatile( 1218 "tlbwe %0,%1,0;" 1219 "sync;isync;" 1220 : : "r" (0), "r" (i)); 1221 1222 tlb_info[i].ti_ctx = 0; 1223 tlb_info[i].ti_flags = 0; 1224 tlbnext = i; 1225 /* Successful flushes */ 1226 tlbflush_ev.ev_count++; 1227 } 1228 } 1229 1230 void 1231 ppc4xx_tlb_flush_all(void) 1232 { 1233 u_long i; 1234 1235 for (i = 0; i < NTLB; i++) 1236 if (!TLB_LOCKED(i)) { 1237 asm volatile( 1238 "tlbwe %0,%1,0;" 1239 "sync;isync;" 1240 : : "r" (0), "r" (i)); 1241 tlb_info[i].ti_ctx = 0; 1242 tlb_info[i].ti_flags = 0; 1243 } 1244 1245 asm volatile("sync;isync"); 1246 } 1247 1248 /* Find a TLB entry to evict. */ 1249 static int 1250 ppc4xx_tlb_find_victim(void) 1251 { 1252 int flags; 1253 1254 for (;;) { 1255 if (++tlbnext >= NTLB) 1256 tlbnext = TLB_NRESERVED; 1257 flags = tlb_info[tlbnext].ti_flags; 1258 if (!(flags & TLBF_USED) || 1259 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) { 1260 u_long va, stack = (u_long)&va; 1261 1262 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) && 1263 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) && 1264 (flags & TLBF_USED)) { 1265 /* Kernel stack page */ 1266 flags |= TLBF_USED; 1267 tlb_info[tlbnext].ti_flags = flags; 1268 } else { 1269 /* Found it! */ 1270 return (tlbnext); 1271 } 1272 } else { 1273 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF); 1274 } 1275 } 1276 } 1277 1278 void 1279 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte) 1280 { 1281 u_long th, tl, idx; 1282 tlbpid_t pid; 1283 u_short msr; 1284 paddr_t pa; 1285 int s, sz; 1286 1287 tlbenter_ev.ev_count++; 1288 1289 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT; 1290 pa = (pte & TTE_RPN_MASK(sz)); 1291 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID; 1292 tl = (pte & ~TLB_RPN_MASK) | pa; 1293 tl |= ppc4xx_tlbflags(va, pa); 1294 1295 s = splhigh(); 1296 idx = ppc4xx_tlb_find_victim(); 1297 1298 #ifdef DIAGNOSTIC 1299 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) { 1300 panic("ppc4xx_tlb_enter: replacing entry %ld", idx); 1301 } 1302 #endif 1303 1304 tlb_info[idx].ti_va = (va & TLB_EPN_MASK); 1305 tlb_info[idx].ti_ctx = ctx; 1306 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF; 1307 1308 asm volatile( 1309 "mfmsr %0;" /* Save MSR */ 1310 "li %1,0;" 1311 "tlbwe %1,%3,0;" /* Invalidate old entry. */ 1312 "mtmsr %1;" /* Clear MSR */ 1313 "mfpid %1;" /* Save old PID */ 1314 "mtpid %2;" /* Load translation ctx */ 1315 "sync; isync;" 1316 #ifdef DEBUG 1317 "andi. %3,%3,63;" 1318 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */ 1319 #endif 1320 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */ 1321 "sync; isync;" 1322 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */ 1323 "sync; isync;" 1324 : "=&r" (msr), "=&r" (pid) 1325 : "r" (ctx), "r" (idx), "r" (tl), "r" (th)); 1326 splx(s); 1327 } 1328 1329 void 1330 ppc4xx_tlb_unpin(int i) 1331 { 1332 1333 if (i == -1) 1334 for (i = 0; i < TLB_NRESERVED; i++) 1335 tlb_info[i].ti_flags &= ~TLBF_LOCKED; 1336 else 1337 tlb_info[i].ti_flags &= ~TLBF_LOCKED; 1338 } 1339 1340 void 1341 ppc4xx_tlb_init(void) 1342 { 1343 int i; 1344 1345 /* Mark reserved TLB entries */ 1346 for (i = 0; i < TLB_NRESERVED; i++) { 1347 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED; 1348 tlb_info[i].ti_ctx = KERNEL_PID; 1349 } 1350 1351 /* Setup security zones */ 1352 /* Z0 - accessible by kernel only if TLB entry permissions allow 1353 * Z1,Z2 - access is controlled by TLB entry permissions 1354 * Z3 - full access regardless of TLB entry permissions 1355 */ 1356 1357 asm volatile( 1358 "mtspr %0,%1;" 1359 "sync;" 1360 :: "K"(SPR_ZPR), "r" (0x1b000000)); 1361 } 1362 1363 1364 /* 1365 * We should pass the ctx in from trap code. 1366 */ 1367 int 1368 pmap_tlbmiss(vaddr_t va, int ctx) 1369 { 1370 volatile u_int *pte; 1371 u_long tte; 1372 1373 tlbmiss_ev.ev_count++; 1374 1375 /* 1376 * XXXX We will reserve 0-0x80000000 for va==pa mappings. 1377 */ 1378 if (ctx != KERNEL_PID || (va & 0x80000000)) { 1379 pte = pte_find((struct pmap *)ctxbusy[ctx], va); 1380 if (pte == NULL) { 1381 /* Map unmanaged addresses directly for kernel access */ 1382 return 1; 1383 } 1384 tte = *pte; 1385 if (tte == 0) { 1386 return 1; 1387 } 1388 } else { 1389 /* Create a 16MB writable mapping. */ 1390 #ifdef PPC_4XX_NOCACHE 1391 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR; 1392 #else 1393 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR; 1394 #endif 1395 } 1396 tlbhit_ev.ev_count++; 1397 ppc4xx_tlb_enter(ctx, va, tte); 1398 1399 return 0; 1400 } 1401 1402 /* 1403 * Flush all the entries matching a context from the TLB. 1404 */ 1405 static int 1406 ctx_flush(int cnum) 1407 { 1408 int i; 1409 1410 /* We gotta steal this context */ 1411 for (i = TLB_NRESERVED; i < NTLB; i++) { 1412 if (tlb_info[i].ti_ctx == cnum) { 1413 /* Can't steal ctx if it has a locked entry. */ 1414 if (TLB_LOCKED(i)) { 1415 #ifdef DIAGNOSTIC 1416 printf("ctx_flush: can't invalidate " 1417 "locked mapping %d " 1418 "for context %d\n", i, cnum); 1419 #ifdef DDB 1420 Debugger(); 1421 #endif 1422 #endif 1423 return (1); 1424 } 1425 #ifdef DIAGNOSTIC 1426 if (i < TLB_NRESERVED) 1427 panic("TLB entry %d not locked", i); 1428 #endif 1429 /* Invalidate particular TLB entry regardless of locked status */ 1430 asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i)); 1431 tlb_info[i].ti_flags = 0; 1432 } 1433 } 1434 return (0); 1435 } 1436 1437 /* 1438 * Allocate a context. If necessary, steal one from someone else. 1439 * 1440 * The new context is flushed from the TLB before returning. 1441 */ 1442 int 1443 ctx_alloc(struct pmap *pm) 1444 { 1445 int s, cnum; 1446 static int next = MINCTX; 1447 1448 if (pm == pmap_kernel()) { 1449 #ifdef DIAGNOSTIC 1450 printf("ctx_alloc: kernel pmap!\n"); 1451 #endif 1452 return (0); 1453 } 1454 s = splvm(); 1455 1456 /* Find a likely context. */ 1457 cnum = next; 1458 do { 1459 if ((++cnum) > NUMCTX) 1460 cnum = MINCTX; 1461 } while (ctxbusy[cnum] != NULL && cnum != next); 1462 1463 /* Now clean it out */ 1464 oops: 1465 if (cnum < MINCTX) 1466 cnum = MINCTX; /* Never steal ctx 0 or 1 */ 1467 if (ctx_flush(cnum)) { 1468 /* oops -- something's wired. */ 1469 if ((++cnum) > NUMCTX) 1470 cnum = MINCTX; 1471 goto oops; 1472 } 1473 1474 if (ctxbusy[cnum]) { 1475 #ifdef DEBUG 1476 /* We should identify this pmap and clear it */ 1477 printf("Warning: stealing context %d\n", cnum); 1478 #endif 1479 ctxbusy[cnum]->pm_ctx = 0; 1480 } 1481 ctxbusy[cnum] = pm; 1482 next = cnum; 1483 splx(s); 1484 pm->pm_ctx = cnum; 1485 1486 return cnum; 1487 } 1488 1489 /* 1490 * Give away a context. 1491 */ 1492 void 1493 ctx_free(struct pmap *pm) 1494 { 1495 int oldctx; 1496 1497 oldctx = pm->pm_ctx; 1498 1499 if (oldctx == 0) 1500 panic("ctx_free: freeing kernel context"); 1501 #ifdef DIAGNOSTIC 1502 if (ctxbusy[oldctx] == 0) 1503 printf("ctx_free: freeing free context %d\n", oldctx); 1504 if (ctxbusy[oldctx] != pm) { 1505 printf("ctx_free: freeing someone esle's context\n " 1506 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n", 1507 oldctx, (void *)(u_long)ctxbusy[oldctx], pm); 1508 #ifdef DDB 1509 Debugger(); 1510 #endif 1511 } 1512 #endif 1513 /* We should verify it has not been stolen and reallocated... */ 1514 ctxbusy[oldctx] = NULL; 1515 ctx_flush(oldctx); 1516 } 1517 1518 1519 #ifdef DEBUG 1520 /* 1521 * Test ref/modify handling. 1522 */ 1523 void pmap_testout __P((void)); 1524 void 1525 pmap_testout() 1526 { 1527 vaddr_t va; 1528 volatile int *loc; 1529 int val = 0; 1530 paddr_t pa; 1531 struct vm_page *pg; 1532 int ref, mod; 1533 1534 /* Allocate a page */ 1535 va = (vaddr_t)uvm_km_zalloc(kernel_map, PAGE_SIZE); 1536 loc = (int*)va; 1537 1538 pmap_extract(pmap_kernel(), va, &pa); 1539 pg = PHYS_TO_VM_PAGE(pa); 1540 pmap_unwire(pmap_kernel(), va); 1541 1542 pmap_remove(pmap_kernel(), va, va+1); 1543 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1544 pmap_update(pmap_kernel()); 1545 1546 /* Now clear reference and modify */ 1547 ref = pmap_clear_reference(pg); 1548 mod = pmap_clear_modify(pg); 1549 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1550 (void *)(u_long)va, (long)pa, 1551 ref, mod); 1552 1553 /* Check it's properly cleared */ 1554 ref = pmap_is_referenced(pg); 1555 mod = pmap_is_modified(pg); 1556 printf("Checking cleared page: ref %d, mod %d\n", 1557 ref, mod); 1558 1559 /* Reference page */ 1560 val = *loc; 1561 1562 ref = pmap_is_referenced(pg); 1563 mod = pmap_is_modified(pg); 1564 printf("Referenced page: ref %d, mod %d val %x\n", 1565 ref, mod, val); 1566 1567 /* Now clear reference and modify */ 1568 ref = pmap_clear_reference(pg); 1569 mod = pmap_clear_modify(pg); 1570 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1571 (void *)(u_long)va, (long)pa, 1572 ref, mod); 1573 1574 /* Modify page */ 1575 *loc = 1; 1576 1577 ref = pmap_is_referenced(pg); 1578 mod = pmap_is_modified(pg); 1579 printf("Modified page: ref %d, mod %d\n", 1580 ref, mod); 1581 1582 /* Now clear reference and modify */ 1583 ref = pmap_clear_reference(pg); 1584 mod = pmap_clear_modify(pg); 1585 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1586 (void *)(u_long)va, (long)pa, 1587 ref, mod); 1588 1589 /* Check it's properly cleared */ 1590 ref = pmap_is_referenced(pg); 1591 mod = pmap_is_modified(pg); 1592 printf("Checking cleared page: ref %d, mod %d\n", 1593 ref, mod); 1594 1595 /* Modify page */ 1596 *loc = 1; 1597 1598 ref = pmap_is_referenced(pg); 1599 mod = pmap_is_modified(pg); 1600 printf("Modified page: ref %d, mod %d\n", 1601 ref, mod); 1602 1603 /* Check pmap_protect() */ 1604 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ); 1605 pmap_update(pmap_kernel()); 1606 ref = pmap_is_referenced(pg); 1607 mod = pmap_is_modified(pg); 1608 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n", 1609 ref, mod); 1610 1611 /* Now clear reference and modify */ 1612 ref = pmap_clear_reference(pg); 1613 mod = pmap_clear_modify(pg); 1614 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1615 (void *)(u_long)va, (long)pa, 1616 ref, mod); 1617 1618 /* Reference page */ 1619 val = *loc; 1620 1621 ref = pmap_is_referenced(pg); 1622 mod = pmap_is_modified(pg); 1623 printf("Referenced page: ref %d, mod %d val %x\n", 1624 ref, mod, val); 1625 1626 /* Now clear reference and modify */ 1627 ref = pmap_clear_reference(pg); 1628 mod = pmap_clear_modify(pg); 1629 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1630 (void *)(u_long)va, (long)pa, 1631 ref, mod); 1632 1633 /* Modify page */ 1634 #if 0 1635 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1636 pmap_update(pmap_kernel()); 1637 #endif 1638 *loc = 1; 1639 1640 ref = pmap_is_referenced(pg); 1641 mod = pmap_is_modified(pg); 1642 printf("Modified page: ref %d, mod %d\n", 1643 ref, mod); 1644 1645 /* Check pmap_protect() */ 1646 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE); 1647 pmap_update(pmap_kernel()); 1648 ref = pmap_is_referenced(pg); 1649 mod = pmap_is_modified(pg); 1650 printf("pmap_protect(): ref %d, mod %d\n", 1651 ref, mod); 1652 1653 /* Now clear reference and modify */ 1654 ref = pmap_clear_reference(pg); 1655 mod = pmap_clear_modify(pg); 1656 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1657 (void *)(u_long)va, (long)pa, 1658 ref, mod); 1659 1660 /* Reference page */ 1661 val = *loc; 1662 1663 ref = pmap_is_referenced(pg); 1664 mod = pmap_is_modified(pg); 1665 printf("Referenced page: ref %d, mod %d val %x\n", 1666 ref, mod, val); 1667 1668 /* Now clear reference and modify */ 1669 ref = pmap_clear_reference(pg); 1670 mod = pmap_clear_modify(pg); 1671 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1672 (void *)(u_long)va, (long)pa, 1673 ref, mod); 1674 1675 /* Modify page */ 1676 #if 0 1677 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1678 pmap_update(pmap_kernel()); 1679 #endif 1680 *loc = 1; 1681 1682 ref = pmap_is_referenced(pg); 1683 mod = pmap_is_modified(pg); 1684 printf("Modified page: ref %d, mod %d\n", 1685 ref, mod); 1686 1687 /* Check pmap_pag_protect() */ 1688 pmap_page_protect(pg, VM_PROT_READ); 1689 ref = pmap_is_referenced(pg); 1690 mod = pmap_is_modified(pg); 1691 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n", 1692 ref, mod); 1693 1694 /* Now clear reference and modify */ 1695 ref = pmap_clear_reference(pg); 1696 mod = pmap_clear_modify(pg); 1697 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1698 (void *)(u_long)va, (long)pa, 1699 ref, mod); 1700 1701 /* Reference page */ 1702 val = *loc; 1703 1704 ref = pmap_is_referenced(pg); 1705 mod = pmap_is_modified(pg); 1706 printf("Referenced page: ref %d, mod %d val %x\n", 1707 ref, mod, val); 1708 1709 /* Now clear reference and modify */ 1710 ref = pmap_clear_reference(pg); 1711 mod = pmap_clear_modify(pg); 1712 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1713 (void *)(u_long)va, (long)pa, 1714 ref, mod); 1715 1716 /* Modify page */ 1717 #if 0 1718 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1719 pmap_update(pmap_kernel()); 1720 #endif 1721 *loc = 1; 1722 1723 ref = pmap_is_referenced(pg); 1724 mod = pmap_is_modified(pg); 1725 printf("Modified page: ref %d, mod %d\n", 1726 ref, mod); 1727 1728 /* Check pmap_pag_protect() */ 1729 pmap_page_protect(pg, VM_PROT_NONE); 1730 ref = pmap_is_referenced(pg); 1731 mod = pmap_is_modified(pg); 1732 printf("pmap_page_protect(): ref %d, mod %d\n", 1733 ref, mod); 1734 1735 /* Now clear reference and modify */ 1736 ref = pmap_clear_reference(pg); 1737 mod = pmap_clear_modify(pg); 1738 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1739 (void *)(u_long)va, (long)pa, 1740 ref, mod); 1741 1742 1743 /* Reference page */ 1744 val = *loc; 1745 1746 ref = pmap_is_referenced(pg); 1747 mod = pmap_is_modified(pg); 1748 printf("Referenced page: ref %d, mod %d val %x\n", 1749 ref, mod, val); 1750 1751 /* Now clear reference and modify */ 1752 ref = pmap_clear_reference(pg); 1753 mod = pmap_clear_modify(pg); 1754 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1755 (void *)(u_long)va, (long)pa, 1756 ref, mod); 1757 1758 /* Modify page */ 1759 #if 0 1760 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1761 pmap_update(pmap_kernel()); 1762 #endif 1763 *loc = 1; 1764 1765 ref = pmap_is_referenced(pg); 1766 mod = pmap_is_modified(pg); 1767 printf("Modified page: ref %d, mod %d\n", 1768 ref, mod); 1769 1770 /* Unmap page */ 1771 pmap_remove(pmap_kernel(), va, va+1); 1772 pmap_update(pmap_kernel()); 1773 ref = pmap_is_referenced(pg); 1774 mod = pmap_is_modified(pg); 1775 printf("Unmapped page: ref %d, mod %d\n", ref, mod); 1776 1777 /* Now clear reference and modify */ 1778 ref = pmap_clear_reference(pg); 1779 mod = pmap_clear_modify(pg); 1780 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1781 (void *)(u_long)va, (long)pa, ref, mod); 1782 1783 /* Check it's properly cleared */ 1784 ref = pmap_is_referenced(pg); 1785 mod = pmap_is_modified(pg); 1786 printf("Checking cleared page: ref %d, mod %d\n", 1787 ref, mod); 1788 1789 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 1790 VM_PROT_ALL|PMAP_WIRED); 1791 uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE); 1792 } 1793 #endif 1794