1 /* $NetBSD: pmap.c,v 1.29 2004/07/31 13:28:53 simonb Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.29 2004/07/31 13:28:53 simonb Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/malloc.h> 74 #include <sys/proc.h> 75 #include <sys/user.h> 76 #include <sys/queue.h> 77 #include <sys/systm.h> 78 #include <sys/pool.h> 79 #include <sys/device.h> 80 81 #include <uvm/uvm.h> 82 83 #include <machine/cpu.h> 84 #include <machine/pcb.h> 85 #include <machine/powerpc.h> 86 87 #include <powerpc/spr.h> 88 #include <machine/tlb.h> 89 90 /* 91 * kernmap is an array of PTEs large enough to map in 92 * 4GB. At 16KB/page it is 256K entries or 2MB. 93 */ 94 #define KERNMAP_SIZE ((0xffffffffU/PAGE_SIZE)+1) 95 caddr_t kernmap; 96 97 #define MINCTX 2 98 #define NUMCTX 256 99 volatile struct pmap *ctxbusy[NUMCTX]; 100 101 #define TLBF_USED 0x1 102 #define TLBF_REF 0x2 103 #define TLBF_LOCKED 0x4 104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED) 105 typedef struct tlb_info_s { 106 char ti_flags; 107 char ti_ctx; /* TLB_PID assiciated with the entry */ 108 u_int ti_va; 109 } tlb_info_t; 110 111 volatile tlb_info_t tlb_info[NTLB]; 112 /* We'll use a modified FIFO replacement policy cause it's cheap */ 113 volatile int tlbnext = TLB_NRESERVED; 114 115 u_long dtlb_miss_count = 0; 116 u_long itlb_miss_count = 0; 117 u_long ktlb_miss_count = 0; 118 u_long utlb_miss_count = 0; 119 120 /* Event counters */ 121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 122 NULL, "cpu", "tlbmiss"); 123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 124 NULL, "cpu", "tlbhit"); 125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 126 NULL, "cpu", "tlbflush"); 127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, 128 NULL, "cpu", "tlbenter"); 129 130 struct pmap kernel_pmap_; 131 132 int physmem; 133 static int npgs; 134 static u_int nextavail; 135 #ifndef MSGBUFADDR 136 extern paddr_t msgbuf_paddr; 137 #endif 138 139 static struct mem_region *mem, *avail; 140 141 /* 142 * This is a cache of referenced/modified bits. 143 * Bits herein are shifted by ATTRSHFT. 144 */ 145 static char *pmap_attrib; 146 147 #define PV_WIRED 0x1 148 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED) 149 #define PV_CMPVA(va,pv) (!(((pv)->pv_va^(va))&(~PV_WIRED))) 150 151 struct pv_entry { 152 struct pv_entry *pv_next; /* Linked list of mappings */ 153 vaddr_t pv_va; /* virtual address of mapping */ 154 struct pmap *pv_pm; 155 }; 156 157 struct pv_entry *pv_table; 158 static struct pool pv_pool; 159 160 static int pmap_initialized; 161 162 static int ctx_flush(int); 163 164 inline struct pv_entry *pa_to_pv(paddr_t); 165 static inline char *pa_to_attr(paddr_t); 166 167 static inline volatile u_int *pte_find(struct pmap *, vaddr_t); 168 static inline int pte_enter(struct pmap *, vaddr_t, u_int); 169 170 static void pmap_pinit(pmap_t); 171 static void pmap_release(pmap_t); 172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t); 173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t); 174 175 176 inline struct pv_entry * 177 pa_to_pv(paddr_t pa) 178 { 179 int bank, pg; 180 181 bank = vm_physseg_find(atop(pa), &pg); 182 if (bank == -1) 183 return NULL; 184 return &vm_physmem[bank].pmseg.pvent[pg]; 185 } 186 187 static inline char * 188 pa_to_attr(paddr_t pa) 189 { 190 int bank, pg; 191 192 bank = vm_physseg_find(atop(pa), &pg); 193 if (bank == -1) 194 return NULL; 195 return &vm_physmem[bank].pmseg.attrs[pg]; 196 } 197 198 /* 199 * Insert PTE into page table. 200 */ 201 int 202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte) 203 { 204 int seg = STIDX(va); 205 int ptn = PTIDX(va); 206 u_int oldpte; 207 208 if (!pm->pm_ptbl[seg]) { 209 /* Don't allocate a page to clear a non-existent mapping. */ 210 if (!pte) return (0); 211 /* Allocate a page XXXX this will sleep! */ 212 pm->pm_ptbl[seg] = 213 (uint *)uvm_km_zalloc(kernel_map, PAGE_SIZE); 214 } 215 oldpte = pm->pm_ptbl[seg][ptn]; 216 pm->pm_ptbl[seg][ptn] = pte; 217 218 /* Flush entry. */ 219 ppc4xx_tlb_flush(va, pm->pm_ctx); 220 if (oldpte != pte) { 221 if (pte == 0) 222 pm->pm_stats.resident_count--; 223 else 224 pm->pm_stats.resident_count++; 225 } 226 return (1); 227 } 228 229 /* 230 * Get a pointer to a PTE in a page table. 231 */ 232 volatile u_int * 233 pte_find(struct pmap *pm, vaddr_t va) 234 { 235 int seg = STIDX(va); 236 int ptn = PTIDX(va); 237 238 if (pm->pm_ptbl[seg]) 239 return (&pm->pm_ptbl[seg][ptn]); 240 241 return (NULL); 242 } 243 244 /* 245 * This is called during initppc, before the system is really initialized. 246 */ 247 void 248 pmap_bootstrap(u_int kernelstart, u_int kernelend) 249 { 250 struct mem_region *mp, *mp1; 251 int cnt, i; 252 u_int s, e, sz; 253 254 /* 255 * Allocate the kernel page table at the end of 256 * kernel space so it's in the locked TTE. 257 */ 258 kernmap = (caddr_t)kernelend; 259 260 /* 261 * Initialize kernel page table. 262 */ 263 for (i = 0; i < STSZ; i++) { 264 pmap_kernel()->pm_ptbl[i] = 0; 265 } 266 ctxbusy[0] = ctxbusy[1] = pmap_kernel(); 267 268 /* 269 * Announce page-size to the VM-system 270 */ 271 uvmexp.pagesize = NBPG; 272 uvm_setpagesize(); 273 274 /* 275 * Get memory. 276 */ 277 mem_regions(&mem, &avail); 278 for (mp = mem; mp->size; mp++) { 279 physmem += btoc(mp->size); 280 printf("+%lx,",mp->size); 281 } 282 printf("\n"); 283 ppc4xx_tlb_init(); 284 /* 285 * Count the number of available entries. 286 */ 287 for (cnt = 0, mp = avail; mp->size; mp++) 288 cnt++; 289 290 /* 291 * Page align all regions. 292 * Non-page aligned memory isn't very interesting to us. 293 * Also, sort the entries for ascending addresses. 294 */ 295 kernelstart &= ~PGOFSET; 296 kernelend = (kernelend + PGOFSET) & ~PGOFSET; 297 for (mp = avail; mp->size; mp++) { 298 s = mp->start; 299 e = mp->start + mp->size; 300 printf("%08x-%08x -> ",s,e); 301 /* 302 * Check whether this region holds all of the kernel. 303 */ 304 if (s < kernelstart && e > kernelend) { 305 avail[cnt].start = kernelend; 306 avail[cnt++].size = e - kernelend; 307 e = kernelstart; 308 } 309 /* 310 * Look whether this regions starts within the kernel. 311 */ 312 if (s >= kernelstart && s < kernelend) { 313 if (e <= kernelend) 314 goto empty; 315 s = kernelend; 316 } 317 /* 318 * Now look whether this region ends within the kernel. 319 */ 320 if (e > kernelstart && e <= kernelend) { 321 if (s >= kernelstart) 322 goto empty; 323 e = kernelstart; 324 } 325 /* 326 * Now page align the start and size of the region. 327 */ 328 s = round_page(s); 329 e = trunc_page(e); 330 if (e < s) 331 e = s; 332 sz = e - s; 333 printf("%08x-%08x = %x\n",s,e,sz); 334 /* 335 * Check whether some memory is left here. 336 */ 337 if (sz == 0) { 338 empty: 339 memmove(mp, mp + 1, 340 (cnt - (mp - avail)) * sizeof *mp); 341 cnt--; 342 mp--; 343 continue; 344 } 345 /* 346 * Do an insertion sort. 347 */ 348 npgs += btoc(sz); 349 for (mp1 = avail; mp1 < mp; mp1++) 350 if (s < mp1->start) 351 break; 352 if (mp1 < mp) { 353 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1); 354 mp1->start = s; 355 mp1->size = sz; 356 } else { 357 mp->start = s; 358 mp->size = sz; 359 } 360 } 361 362 /* 363 * We cannot do pmap_steal_memory here, 364 * since we don't run with translation enabled yet. 365 */ 366 #ifndef MSGBUFADDR 367 /* 368 * allow for msgbuf 369 */ 370 sz = round_page(MSGBUFSIZE); 371 mp = NULL; 372 for (mp1 = avail; mp1->size; mp1++) 373 if (mp1->size >= sz) 374 mp = mp1; 375 if (mp == NULL) 376 panic("not enough memory?"); 377 378 npgs -= btoc(sz); 379 msgbuf_paddr = mp->start + mp->size - sz; 380 mp->size -= sz; 381 if (mp->size <= 0) 382 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp); 383 #endif 384 385 for (mp = avail; mp->size; mp++) 386 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size), 387 atop(mp->start), atop(mp->start + mp->size), 388 VM_FREELIST_DEFAULT); 389 390 /* 391 * Initialize kernel pmap and hardware. 392 */ 393 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */ 394 pmap_kernel()->pm_ctx = KERNEL_PID; 395 nextavail = avail->start; 396 397 398 evcnt_attach_static(&tlbmiss_ev); 399 evcnt_attach_static(&tlbhit_ev); 400 evcnt_attach_static(&tlbflush_ev); 401 evcnt_attach_static(&tlbenter_ev); 402 } 403 404 /* 405 * Restrict given range to physical memory 406 * 407 * (Used by /dev/mem) 408 */ 409 void 410 pmap_real_memory(paddr_t *start, psize_t *size) 411 { 412 struct mem_region *mp; 413 414 for (mp = mem; mp->size; mp++) { 415 if (*start + *size > mp->start && 416 *start < mp->start + mp->size) { 417 if (*start < mp->start) { 418 *size -= mp->start - *start; 419 *start = mp->start; 420 } 421 if (*start + *size > mp->start + mp->size) 422 *size = mp->start + mp->size - *start; 423 return; 424 } 425 } 426 *size = 0; 427 } 428 429 /* 430 * Initialize anything else for pmap handling. 431 * Called during vm_init(). 432 */ 433 void 434 pmap_init(void) 435 { 436 struct pv_entry *pv; 437 vsize_t sz; 438 vaddr_t addr; 439 int i, s; 440 int bank; 441 char *attr; 442 443 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs); 444 sz = round_page(sz); 445 addr = uvm_km_zalloc(kernel_map, sz); 446 s = splvm(); 447 pv = pv_table = (struct pv_entry *)addr; 448 for (i = npgs; --i >= 0;) 449 pv++->pv_pm = NULL; 450 pmap_attrib = (char *)pv; 451 memset(pv, 0, npgs); 452 453 pv = pv_table; 454 attr = pmap_attrib; 455 for (bank = 0; bank < vm_nphysseg; bank++) { 456 sz = vm_physmem[bank].end - vm_physmem[bank].start; 457 vm_physmem[bank].pmseg.pvent = pv; 458 vm_physmem[bank].pmseg.attrs = attr; 459 pv += sz; 460 attr += sz; 461 } 462 463 pmap_initialized = 1; 464 splx(s); 465 466 /* Setup a pool for additional pvlist structures */ 467 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL); 468 } 469 470 /* 471 * How much virtual space is available to the kernel? 472 */ 473 void 474 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 475 { 476 477 #if 0 478 /* 479 * Reserve one segment for kernel virtual memory 480 */ 481 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT); 482 *end = *start + SEGMENT_LENGTH; 483 #else 484 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS; 485 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS; 486 #endif 487 } 488 489 #ifdef PMAP_GROWKERNEL 490 /* 491 * Preallocate kernel page tables to a specified VA. 492 * This simply loops through the first TTE for each 493 * page table from the beginning of the kernel pmap, 494 * reads the entry, and if the result is 495 * zero (either invalid entry or no page table) it stores 496 * a zero there, populating page tables in the process. 497 * This is not the most efficient technique but i don't 498 * expect it to be called that often. 499 */ 500 extern struct vm_page *vm_page_alloc1 __P((void)); 501 extern void vm_page_free1 __P((struct vm_page *)); 502 503 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS; 504 505 vaddr_t 506 pmap_growkernel(maxkvaddr) 507 vaddr_t maxkvaddr; 508 { 509 int s; 510 int seg; 511 paddr_t pg; 512 struct pmap *pm = pmap_kernel(); 513 514 s = splvm(); 515 516 /* Align with the start of a page table */ 517 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr; 518 kbreak += PTMAP) { 519 seg = STIDX(kbreak); 520 521 if (pte_find(pm, kbreak)) continue; 522 523 if (uvm.page_init_done) { 524 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1()); 525 } else { 526 if (!uvm_page_physget(&pg)) 527 panic("pmap_growkernel: no memory"); 528 } 529 if (!pg) panic("pmap_growkernel: no pages"); 530 pmap_zero_page((paddr_t)pg); 531 532 /* XXX This is based on all phymem being addressable */ 533 pm->pm_ptbl[seg] = (u_int *)pg; 534 } 535 splx(s); 536 return (kbreak); 537 } 538 539 /* 540 * vm_page_alloc1: 541 * 542 * Allocate and return a memory cell with no associated object. 543 */ 544 struct vm_page * 545 vm_page_alloc1() 546 { 547 struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE); 548 if (pg) { 549 pg->wire_count = 1; /* no mappings yet */ 550 pg->flags &= ~PG_BUSY; /* never busy */ 551 } 552 return pg; 553 } 554 555 /* 556 * vm_page_free1: 557 * 558 * Returns the given page to the free list, 559 * disassociating it with any VM object. 560 * 561 * Object and page must be locked prior to entry. 562 */ 563 void 564 vm_page_free1(mem) 565 struct vm_page *mem; 566 { 567 #ifdef DIAGNOSTIC 568 if (mem->flags != (PG_CLEAN|PG_FAKE)) { 569 printf("Freeing invalid page %p\n", mem); 570 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem)); 571 #ifdef DDB 572 Debugger(); 573 #endif 574 return; 575 } 576 #endif 577 mem->flags |= PG_BUSY; 578 mem->wire_count = 0; 579 uvm_pagefree(mem); 580 } 581 #endif 582 583 /* 584 * Create and return a physical map. 585 */ 586 struct pmap * 587 pmap_create(void) 588 { 589 struct pmap *pm; 590 591 pm = (struct pmap *)malloc(sizeof *pm, M_VMPMAP, M_WAITOK); 592 memset((caddr_t)pm, 0, sizeof *pm); 593 pmap_pinit(pm); 594 return pm; 595 } 596 597 /* 598 * Initialize a preallocated and zeroed pmap structure. 599 */ 600 void 601 pmap_pinit(struct pmap *pm) 602 { 603 int i; 604 605 /* 606 * Allocate some segment registers for this pmap. 607 */ 608 pm->pm_refs = 1; 609 for (i = 0; i < STSZ; i++) 610 pm->pm_ptbl[i] = NULL; 611 } 612 613 /* 614 * Add a reference to the given pmap. 615 */ 616 void 617 pmap_reference(struct pmap *pm) 618 { 619 620 pm->pm_refs++; 621 } 622 623 /* 624 * Retire the given pmap from service. 625 * Should only be called if the map contains no valid mappings. 626 */ 627 void 628 pmap_destroy(struct pmap *pm) 629 { 630 631 if (--pm->pm_refs == 0) { 632 pmap_release(pm); 633 free((caddr_t)pm, M_VMPMAP); 634 } 635 } 636 637 /* 638 * Release any resources held by the given physical map. 639 * Called when a pmap initialized by pmap_pinit is being released. 640 */ 641 static void 642 pmap_release(struct pmap *pm) 643 { 644 int i; 645 646 for (i = 0; i < STSZ; i++) 647 if (pm->pm_ptbl[i]) { 648 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i], 649 PAGE_SIZE); 650 pm->pm_ptbl[i] = NULL; 651 } 652 if (pm->pm_ctx) ctx_free(pm); 653 } 654 655 /* 656 * Copy the range specified by src_addr/len 657 * from the source map to the range dst_addr/len 658 * in the destination map. 659 * 660 * This routine is only advisory and need not do anything. 661 */ 662 void 663 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr, 664 vsize_t len, vaddr_t src_addr) 665 { 666 } 667 668 /* 669 * Require that all active physical maps contain no 670 * incorrect entries NOW. 671 */ 672 void 673 pmap_update(struct pmap *pmap) 674 { 675 } 676 677 /* 678 * Garbage collects the physical map system for 679 * pages which are no longer used. 680 * Success need not be guaranteed -- that is, there 681 * may well be pages which are not referenced, but 682 * others may be collected. 683 * Called by the pageout daemon when pages are scarce. 684 */ 685 void 686 pmap_collect(struct pmap *pm) 687 { 688 } 689 690 /* 691 * Fill the given physical page with zeroes. 692 */ 693 void 694 pmap_zero_page(paddr_t pa) 695 { 696 697 #ifdef PPC_4XX_NOCACHE 698 memset((caddr_t)pa, 0, PAGE_SIZE); 699 #else 700 int i; 701 702 for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) { 703 __asm __volatile ("dcbz 0,%0" :: "r"(pa)); 704 pa += CACHELINESIZE; 705 } 706 #endif 707 } 708 709 /* 710 * Copy the given physical source page to its destination. 711 */ 712 void 713 pmap_copy_page(paddr_t src, paddr_t dst) 714 { 715 716 memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE); 717 dcache_flush_page(dst); 718 } 719 720 /* 721 * This returns whether this is the first mapping of a page. 722 */ 723 static inline int 724 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa) 725 { 726 struct pv_entry *pv, *npv = NULL; 727 int s; 728 729 if (!pmap_initialized) 730 return 0; 731 732 s = splvm(); 733 734 pv = pa_to_pv(pa); 735 for (npv = pv; npv; npv = npv->pv_next) 736 if (npv->pv_va == va && npv->pv_pm == pm) { 737 printf("Duplicate pv: va %lx pm %p\n", va, pm); 738 #ifdef DDB 739 Debugger(); 740 #endif 741 return (1); 742 } 743 744 if (!pv->pv_pm) { 745 /* 746 * No entries yet, use header as the first entry. 747 */ 748 pv->pv_va = va; 749 pv->pv_pm = pm; 750 pv->pv_next = NULL; 751 } else { 752 /* 753 * There is at least one other VA mapping this page. 754 * Place this entry after the header. 755 */ 756 npv = pool_get(&pv_pool, PR_WAITOK); 757 if (!npv) return (0); 758 npv->pv_va = va; 759 npv->pv_pm = pm; 760 npv->pv_next = pv->pv_next; 761 pv->pv_next = npv; 762 } 763 splx(s); 764 return (1); 765 } 766 767 static void 768 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa) 769 { 770 struct pv_entry *pv, *npv; 771 772 /* 773 * Remove from the PV table. 774 */ 775 pv = pa_to_pv(pa); 776 if (!pv) return; 777 778 /* 779 * If it is the first entry on the list, it is actually 780 * in the header and we must copy the following entry up 781 * to the header. Otherwise we must search the list for 782 * the entry. In either case we free the now unused entry. 783 */ 784 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) { 785 if ((npv = pv->pv_next)) { 786 *pv = *npv; 787 pool_put(&pv_pool, npv); 788 } else 789 pv->pv_pm = NULL; 790 } else { 791 for (; (npv = pv->pv_next) != NULL; pv = npv) 792 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) 793 break; 794 if (npv) { 795 pv->pv_next = npv->pv_next; 796 pool_put(&pv_pool, npv); 797 } 798 } 799 } 800 801 /* 802 * Insert physical page at pa into the given pmap at virtual address va. 803 */ 804 int 805 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 806 { 807 int s; 808 u_int tte; 809 int managed; 810 811 /* 812 * Have to remove any existing mapping first. 813 */ 814 pmap_remove(pm, va, va + PAGE_SIZE); 815 816 if (flags & PMAP_WIRED) flags |= prot; 817 818 /* If it has no protections don't bother w/the rest */ 819 if (!(flags & VM_PROT_ALL)) 820 return (0); 821 822 managed = 0; 823 if (vm_physseg_find(atop(pa), NULL) != -1) 824 managed = 1; 825 826 /* 827 * Generate TTE. 828 */ 829 tte = TTE_PA(pa); 830 /* XXXX -- need to support multiple page sizes. */ 831 tte |= TTE_SZ_16K; 832 #ifdef DIAGNOSTIC 833 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) == 834 (PME_NOCACHE | PME_WRITETHROUG)) 835 panic("pmap_enter: uncached & writethrough"); 836 #endif 837 if (flags & PME_NOCACHE) 838 /* Must be I/O mapping */ 839 tte |= TTE_I | TTE_G; 840 #ifdef PPC_4XX_NOCACHE 841 tte |= TTE_I; 842 #else 843 else if (flags & PME_WRITETHROUG) 844 /* Uncached and writethrough are not compatible */ 845 tte |= TTE_W; 846 #endif 847 if (pm == pmap_kernel()) 848 tte |= TTE_ZONE(ZONE_PRIV); 849 else 850 tte |= TTE_ZONE(ZONE_USER); 851 852 if (flags & VM_PROT_WRITE) 853 tte |= TTE_WR; 854 855 if (flags & VM_PROT_EXECUTE) 856 tte |= TTE_EX; 857 858 /* 859 * Now record mapping for later back-translation. 860 */ 861 if (pmap_initialized && managed) { 862 char *attr; 863 864 if (!pmap_enter_pv(pm, va, pa)) { 865 /* Could not enter pv on a managed page */ 866 return 1; 867 } 868 869 /* Now set attributes. */ 870 attr = pa_to_attr(pa); 871 #ifdef DIAGNOSTIC 872 if (!attr) 873 panic("managed but no attr"); 874 #endif 875 if (flags & VM_PROT_ALL) 876 *attr |= PTE_HI_REF; 877 if (flags & VM_PROT_WRITE) 878 *attr |= PTE_HI_CHG; 879 } 880 881 s = splvm(); 882 883 /* Insert page into page table. */ 884 pte_enter(pm, va, tte); 885 886 /* If this is a real fault, enter it in the tlb */ 887 if (tte && ((flags & PMAP_WIRED) == 0)) { 888 ppc4xx_tlb_enter(pm->pm_ctx, va, tte); 889 } 890 splx(s); 891 892 /* Flush the real memory from the instruction cache. */ 893 if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0) 894 __syncicache((void *)pa, PAGE_SIZE); 895 896 return 0; 897 } 898 899 void 900 pmap_unwire(struct pmap *pm, vaddr_t va) 901 { 902 struct pv_entry *pv, *npv; 903 paddr_t pa; 904 int s = splvm(); 905 906 if (pm == NULL) { 907 return; 908 } 909 910 if (!pmap_extract(pm, va, &pa)) { 911 return; 912 } 913 914 va |= PV_WIRED; 915 916 pv = pa_to_pv(pa); 917 if (!pv) return; 918 919 /* 920 * If it is the first entry on the list, it is actually 921 * in the header and we must copy the following entry up 922 * to the header. Otherwise we must search the list for 923 * the entry. In either case we free the now unused entry. 924 */ 925 for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) { 926 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) { 927 npv->pv_va &= ~PV_WIRED; 928 break; 929 } 930 } 931 splx(s); 932 } 933 934 void 935 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 936 { 937 int s; 938 u_int tte; 939 struct pmap *pm = pmap_kernel(); 940 941 /* 942 * Have to remove any existing mapping first. 943 */ 944 945 /* 946 * Generate TTE. 947 * 948 * XXXX 949 * 950 * Since the kernel does not handle execution privileges properly, 951 * we will handle read and execute permissions together. 952 */ 953 tte = 0; 954 if (prot & VM_PROT_ALL) { 955 956 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV); 957 /* XXXX -- need to support multiple page sizes. */ 958 tte |= TTE_SZ_16K; 959 #ifdef DIAGNOSTIC 960 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) == 961 (PME_NOCACHE | PME_WRITETHROUG)) 962 panic("pmap_kenter_pa: uncached & writethrough"); 963 #endif 964 if (prot & PME_NOCACHE) 965 /* Must be I/O mapping */ 966 tte |= TTE_I | TTE_G; 967 #ifdef PPC_4XX_NOCACHE 968 tte |= TTE_I; 969 #else 970 else if (prot & PME_WRITETHROUG) 971 /* Uncached and writethrough are not compatible */ 972 tte |= TTE_W; 973 #endif 974 if (prot & VM_PROT_WRITE) 975 tte |= TTE_WR; 976 } 977 978 s = splvm(); 979 980 /* Insert page into page table. */ 981 pte_enter(pm, va, tte); 982 splx(s); 983 } 984 985 void 986 pmap_kremove(vaddr_t va, vsize_t len) 987 { 988 989 while (len > 0) { 990 pte_enter(pmap_kernel(), va, 0); 991 va += PAGE_SIZE; 992 len -= PAGE_SIZE; 993 } 994 } 995 996 /* 997 * Remove the given range of mapping entries. 998 */ 999 void 1000 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva) 1001 { 1002 int s; 1003 paddr_t pa; 1004 volatile u_int *ptp; 1005 1006 s = splvm(); 1007 while (va < endva) { 1008 1009 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) { 1010 pa = TTE_PA(pa); 1011 pmap_remove_pv(pm, va, pa); 1012 *ptp = 0; 1013 ppc4xx_tlb_flush(va, pm->pm_ctx); 1014 pm->pm_stats.resident_count--; 1015 } 1016 va += PAGE_SIZE; 1017 } 1018 1019 splx(s); 1020 } 1021 1022 /* 1023 * Get the physical page address for the given pmap/virtual address. 1024 */ 1025 boolean_t 1026 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap) 1027 { 1028 int seg = STIDX(va); 1029 int ptn = PTIDX(va); 1030 u_int pa = 0; 1031 int s = splvm(); 1032 1033 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) { 1034 *pap = TTE_PA(pa) | (va & PGOFSET); 1035 } 1036 splx(s); 1037 return (pa != 0); 1038 } 1039 1040 /* 1041 * Lower the protection on the specified range of this pmap. 1042 * 1043 * There are only two cases: either the protection is going to 0, 1044 * or it is going to read-only. 1045 */ 1046 void 1047 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 1048 { 1049 volatile u_int *ptp; 1050 int s, bic; 1051 1052 if ((prot & VM_PROT_READ) == 0) { 1053 pmap_remove(pm, sva, eva); 1054 return; 1055 } 1056 bic = 0; 1057 if ((prot & VM_PROT_WRITE) == 0) { 1058 bic |= TTE_WR; 1059 } 1060 if ((prot & VM_PROT_EXECUTE) == 0) { 1061 bic |= TTE_EX; 1062 } 1063 if (bic == 0) { 1064 return; 1065 } 1066 s = splvm(); 1067 while (sva < eva) { 1068 if ((ptp = pte_find(pm, sva)) != NULL) { 1069 *ptp &= ~bic; 1070 ppc4xx_tlb_flush(sva, pm->pm_ctx); 1071 } 1072 sva += PAGE_SIZE; 1073 } 1074 splx(s); 1075 } 1076 1077 boolean_t 1078 check_attr(struct vm_page *pg, u_int mask, int clear) 1079 { 1080 paddr_t pa = VM_PAGE_TO_PHYS(pg); 1081 int s; 1082 char *attr; 1083 int rv; 1084 1085 /* 1086 * First modify bits in cache. 1087 */ 1088 s = splvm(); 1089 attr = pa_to_attr(pa); 1090 if (attr == NULL) 1091 return FALSE; 1092 1093 rv = ((*attr & mask) != 0); 1094 if (clear) { 1095 *attr &= ~mask; 1096 pmap_page_protect(pg, (mask == PTE_HI_CHG) ? VM_PROT_READ : 0); 1097 } 1098 splx(s); 1099 return rv; 1100 } 1101 1102 1103 /* 1104 * Lower the protection on the specified physical page. 1105 * 1106 * There are only two cases: either the protection is going to 0, 1107 * or it is going to read-only. 1108 */ 1109 void 1110 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 1111 { 1112 paddr_t pa = VM_PAGE_TO_PHYS(pg); 1113 vaddr_t va; 1114 struct pv_entry *pvh, *pv, *npv; 1115 struct pmap *pm; 1116 1117 pvh = pa_to_pv(pa); 1118 if (pvh == NULL) 1119 return; 1120 1121 /* Handle extra pvs which may be deleted in the operation */ 1122 for (pv = pvh->pv_next; pv; pv = npv) { 1123 npv = pv->pv_next; 1124 1125 pm = pv->pv_pm; 1126 va = pv->pv_va; 1127 pmap_protect(pm, va, va + PAGE_SIZE, prot); 1128 } 1129 /* Now check the head pv */ 1130 if (pvh->pv_pm) { 1131 pv = pvh; 1132 pm = pv->pv_pm; 1133 va = pv->pv_va; 1134 pmap_protect(pm, va, va + PAGE_SIZE, prot); 1135 } 1136 } 1137 1138 /* 1139 * Activate the address space for the specified process. If the process 1140 * is the current process, load the new MMU context. 1141 */ 1142 void 1143 pmap_activate(struct lwp *l) 1144 { 1145 #if 0 1146 struct pcb *pcb = &l->l_proc->p_addr->u_pcb; 1147 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 1148 1149 /* 1150 * XXX Normally performed in cpu_fork(). 1151 */ 1152 printf("pmap_activate(%p), pmap=%p\n",l,pmap); 1153 pcb->pcb_pm = pmap; 1154 #endif 1155 } 1156 1157 /* 1158 * Deactivate the specified process's address space. 1159 */ 1160 void 1161 pmap_deactivate(struct lwp *l) 1162 { 1163 } 1164 1165 /* 1166 * Synchronize caches corresponding to [addr, addr+len) in p. 1167 */ 1168 void 1169 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 1170 { 1171 struct pmap *pm = p->p_vmspace->vm_map.pmap; 1172 int msr, ctx, opid, step; 1173 1174 step = CACHELINESIZE; 1175 1176 /* 1177 * Need to turn off IMMU and switch to user context. 1178 * (icbi uses DMMU). 1179 */ 1180 if (!(ctx = pm->pm_ctx)) { 1181 /* No context -- assign it one */ 1182 ctx_alloc(pm); 1183 ctx = pm->pm_ctx; 1184 } 1185 __asm __volatile("mfmsr %0;" 1186 "li %1, %7;" 1187 "andc %1,%0,%1;" 1188 "mtmsr %1;" 1189 "sync;isync;" 1190 "mfpid %1;" 1191 "mtpid %2;" 1192 "sync; isync;" 1193 "1:" 1194 "dcbf 0,%3;" 1195 "icbi 0,%3;" 1196 "add %3,%3,%5;" 1197 "addc. %4,%4,%6;" 1198 "bge 1b;" 1199 "mtpid %1;" 1200 "mtmsr %0;" 1201 "sync; isync" 1202 : "=&r" (msr), "=&r" (opid) 1203 : "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step), 1204 "K" (PSL_IR | PSL_DR)); 1205 } 1206 1207 1208 /* This has to be done in real mode !!! */ 1209 void 1210 ppc4xx_tlb_flush(vaddr_t va, int pid) 1211 { 1212 u_long i, found; 1213 u_long msr; 1214 1215 /* If there's no context then it can't be mapped. */ 1216 if (!pid) 1217 return; 1218 1219 asm("mfpid %1;" /* Save PID */ 1220 "mfmsr %2;" /* Save MSR */ 1221 "li %0,0;" /* Now clear MSR */ 1222 "mtmsr %0;" 1223 "mtpid %4;" /* Set PID */ 1224 "sync;" 1225 "tlbsx. %0,0,%3;" /* Search TLB */ 1226 "sync;" 1227 "mtpid %1;" /* Restore PID */ 1228 "mtmsr %2;" /* Restore MSR */ 1229 "sync;isync;" 1230 "li %1,1;" 1231 "beq 1f;" 1232 "li %1,0;" 1233 "1:" 1234 : "=&r" (i), "=&r" (found), "=&r" (msr) 1235 : "r" (va), "r" (pid)); 1236 if (found && !TLB_LOCKED(i)) { 1237 1238 /* Now flush translation */ 1239 asm volatile( 1240 "tlbwe %0,%1,0;" 1241 "sync;isync;" 1242 : : "r" (0), "r" (i)); 1243 1244 tlb_info[i].ti_ctx = 0; 1245 tlb_info[i].ti_flags = 0; 1246 tlbnext = i; 1247 /* Successful flushes */ 1248 tlbflush_ev.ev_count++; 1249 } 1250 } 1251 1252 void 1253 ppc4xx_tlb_flush_all(void) 1254 { 1255 u_long i; 1256 1257 for (i = 0; i < NTLB; i++) 1258 if (!TLB_LOCKED(i)) { 1259 asm volatile( 1260 "tlbwe %0,%1,0;" 1261 "sync;isync;" 1262 : : "r" (0), "r" (i)); 1263 tlb_info[i].ti_ctx = 0; 1264 tlb_info[i].ti_flags = 0; 1265 } 1266 1267 asm volatile("sync;isync"); 1268 } 1269 1270 /* Find a TLB entry to evict. */ 1271 static int 1272 ppc4xx_tlb_find_victim(void) 1273 { 1274 int flags; 1275 1276 for (;;) { 1277 if (++tlbnext >= NTLB) 1278 tlbnext = TLB_NRESERVED; 1279 flags = tlb_info[tlbnext].ti_flags; 1280 if (!(flags & TLBF_USED) || 1281 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) { 1282 u_long va, stack = (u_long)&va; 1283 1284 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) && 1285 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) && 1286 (flags & TLBF_USED)) { 1287 /* Kernel stack page */ 1288 flags |= TLBF_USED; 1289 tlb_info[tlbnext].ti_flags = flags; 1290 } else { 1291 /* Found it! */ 1292 return (tlbnext); 1293 } 1294 } else { 1295 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF); 1296 } 1297 } 1298 } 1299 1300 void 1301 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte) 1302 { 1303 u_long th, tl, idx; 1304 tlbpid_t pid; 1305 u_short msr; 1306 paddr_t pa; 1307 int s, sz; 1308 1309 tlbenter_ev.ev_count++; 1310 1311 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT; 1312 pa = (pte & TTE_RPN_MASK(sz)); 1313 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID; 1314 tl = (pte & ~TLB_RPN_MASK) | pa; 1315 tl |= ppc4xx_tlbflags(va, pa); 1316 1317 s = splhigh(); 1318 idx = ppc4xx_tlb_find_victim(); 1319 1320 #ifdef DIAGNOSTIC 1321 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) { 1322 panic("ppc4xx_tlb_enter: repacing entry %ld", idx); 1323 } 1324 #endif 1325 1326 tlb_info[idx].ti_va = (va & TLB_EPN_MASK); 1327 tlb_info[idx].ti_ctx = ctx; 1328 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF; 1329 1330 asm volatile( 1331 "mfmsr %0;" /* Save MSR */ 1332 "li %1,0;" 1333 "tlbwe %1,%3,0;" /* Invalidate old entry. */ 1334 "mtmsr %1;" /* Clear MSR */ 1335 "mfpid %1;" /* Save old PID */ 1336 "mtpid %2;" /* Load translation ctx */ 1337 "sync; isync;" 1338 #ifdef DEBUG 1339 "andi. %3,%3,63;" 1340 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */ 1341 #endif 1342 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */ 1343 "sync; isync;" 1344 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */ 1345 "sync; isync;" 1346 : "=&r" (msr), "=&r" (pid) 1347 : "r" (ctx), "r" (idx), "r" (tl), "r" (th)); 1348 splx(s); 1349 } 1350 1351 void 1352 ppc4xx_tlb_unpin(int i) 1353 { 1354 1355 if (i == -1) 1356 for (i = 0; i < TLB_NRESERVED; i++) 1357 tlb_info[i].ti_flags &= ~TLBF_LOCKED; 1358 else 1359 tlb_info[i].ti_flags &= ~TLBF_LOCKED; 1360 } 1361 1362 void 1363 ppc4xx_tlb_init(void) 1364 { 1365 int i; 1366 1367 /* Mark reserved TLB entries */ 1368 for (i = 0; i < TLB_NRESERVED; i++) { 1369 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED; 1370 tlb_info[i].ti_ctx = KERNEL_PID; 1371 } 1372 1373 /* Setup security zones */ 1374 /* Z0 - accessible by kernel only if TLB entry permissions allow 1375 * Z1,Z2 - access is controlled by TLB entry permissions 1376 * Z3 - full access regardless of TLB entry permissions 1377 */ 1378 1379 asm volatile( 1380 "mtspr %0,%1;" 1381 "sync;" 1382 :: "K"(SPR_ZPR), "r" (0x1b000000)); 1383 } 1384 1385 1386 /* 1387 * We should pass the ctx in from trap code. 1388 */ 1389 int 1390 pmap_tlbmiss(vaddr_t va, int ctx) 1391 { 1392 volatile u_int *pte; 1393 u_long tte; 1394 1395 tlbmiss_ev.ev_count++; 1396 1397 /* 1398 * XXXX We will reserve 0-0x80000000 for va==pa mappings. 1399 */ 1400 if (ctx != KERNEL_PID || (va & 0x80000000)) { 1401 pte = pte_find((struct pmap *)ctxbusy[ctx], va); 1402 if (pte == NULL) { 1403 /* Map unmanaged addresses directly for kernel access */ 1404 return 1; 1405 } 1406 tte = *pte; 1407 if (tte == 0) { 1408 return 1; 1409 } 1410 } else { 1411 /* Create a 16MB writable mapping. */ 1412 #ifdef PPC_4XX_NOCACHE 1413 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR; 1414 #else 1415 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR; 1416 #endif 1417 } 1418 tlbhit_ev.ev_count++; 1419 ppc4xx_tlb_enter(ctx, va, tte); 1420 1421 return 0; 1422 } 1423 1424 /* 1425 * Flush all the entries matching a context from the TLB. 1426 */ 1427 static int 1428 ctx_flush(int cnum) 1429 { 1430 int i; 1431 1432 /* We gotta steal this context */ 1433 for (i = TLB_NRESERVED; i < NTLB; i++) { 1434 if (tlb_info[i].ti_ctx == cnum) { 1435 /* Can't steal ctx if it has a locked entry. */ 1436 if (TLB_LOCKED(i)) { 1437 #ifdef DIAGNOSTIC 1438 printf("ctx_flush: can't invalidate " 1439 "locked mapping %d " 1440 "for context %d\n", i, cnum); 1441 #ifdef DDB 1442 Debugger(); 1443 #endif 1444 #endif 1445 return (1); 1446 } 1447 #ifdef DIAGNOSTIC 1448 if (i < TLB_NRESERVED) 1449 panic("TLB entry %d not locked", i); 1450 #endif 1451 /* Invalidate particular TLB entry regardless of locked status */ 1452 asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i)); 1453 tlb_info[i].ti_flags = 0; 1454 } 1455 } 1456 return (0); 1457 } 1458 1459 /* 1460 * Allocate a context. If necessary, steal one from someone else. 1461 * 1462 * The new context is flushed from the TLB before returning. 1463 */ 1464 int 1465 ctx_alloc(struct pmap *pm) 1466 { 1467 int s, cnum; 1468 static int next = MINCTX; 1469 1470 if (pm == pmap_kernel()) { 1471 #ifdef DIAGNOSTIC 1472 printf("ctx_alloc: kernel pmap!\n"); 1473 #endif 1474 return (0); 1475 } 1476 s = splvm(); 1477 1478 /* Find a likely context. */ 1479 cnum = next; 1480 do { 1481 if ((++cnum) > NUMCTX) 1482 cnum = MINCTX; 1483 } while (ctxbusy[cnum] != NULL && cnum != next); 1484 1485 /* Now clean it out */ 1486 oops: 1487 if (cnum < MINCTX) 1488 cnum = MINCTX; /* Never steal ctx 0 or 1 */ 1489 if (ctx_flush(cnum)) { 1490 /* oops -- something's wired. */ 1491 if ((++cnum) > NUMCTX) 1492 cnum = MINCTX; 1493 goto oops; 1494 } 1495 1496 if (ctxbusy[cnum]) { 1497 #ifdef DEBUG 1498 /* We should identify this pmap and clear it */ 1499 printf("Warning: stealing context %d\n", cnum); 1500 #endif 1501 ctxbusy[cnum]->pm_ctx = 0; 1502 } 1503 ctxbusy[cnum] = pm; 1504 next = cnum; 1505 splx(s); 1506 pm->pm_ctx = cnum; 1507 1508 return cnum; 1509 } 1510 1511 /* 1512 * Give away a context. 1513 */ 1514 void 1515 ctx_free(struct pmap *pm) 1516 { 1517 int oldctx; 1518 1519 oldctx = pm->pm_ctx; 1520 1521 if (oldctx == 0) 1522 panic("ctx_free: freeing kernel context"); 1523 #ifdef DIAGNOSTIC 1524 if (ctxbusy[oldctx] == 0) 1525 printf("ctx_free: freeing free context %d\n", oldctx); 1526 if (ctxbusy[oldctx] != pm) { 1527 printf("ctx_free: freeing someone esle's context\n " 1528 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n", 1529 oldctx, (void *)(u_long)ctxbusy[oldctx], pm); 1530 #ifdef DDB 1531 Debugger(); 1532 #endif 1533 } 1534 #endif 1535 /* We should verify it has not been stolen and reallocated... */ 1536 ctxbusy[oldctx] = NULL; 1537 ctx_flush(oldctx); 1538 } 1539 1540 1541 #ifdef DEBUG 1542 /* 1543 * Test ref/modify handling. 1544 */ 1545 void pmap_testout __P((void)); 1546 void 1547 pmap_testout() 1548 { 1549 vaddr_t va; 1550 volatile int *loc; 1551 int val = 0; 1552 paddr_t pa; 1553 struct vm_page *pg; 1554 int ref, mod; 1555 1556 /* Allocate a page */ 1557 va = (vaddr_t)uvm_km_zalloc(kernel_map, PAGE_SIZE); 1558 loc = (int*)va; 1559 1560 pmap_extract(pmap_kernel(), va, &pa); 1561 pg = PHYS_TO_VM_PAGE(pa); 1562 pmap_unwire(pmap_kernel(), va); 1563 1564 pmap_remove(pmap_kernel(), va, va+1); 1565 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1566 pmap_update(pmap_kernel()); 1567 1568 /* Now clear reference and modify */ 1569 ref = pmap_clear_reference(pg); 1570 mod = pmap_clear_modify(pg); 1571 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1572 (void *)(u_long)va, (long)pa, 1573 ref, mod); 1574 1575 /* Check it's properly cleared */ 1576 ref = pmap_is_referenced(pg); 1577 mod = pmap_is_modified(pg); 1578 printf("Checking cleared page: ref %d, mod %d\n", 1579 ref, mod); 1580 1581 /* Reference page */ 1582 val = *loc; 1583 1584 ref = pmap_is_referenced(pg); 1585 mod = pmap_is_modified(pg); 1586 printf("Referenced page: ref %d, mod %d val %x\n", 1587 ref, mod, val); 1588 1589 /* Now clear reference and modify */ 1590 ref = pmap_clear_reference(pg); 1591 mod = pmap_clear_modify(pg); 1592 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1593 (void *)(u_long)va, (long)pa, 1594 ref, mod); 1595 1596 /* Modify page */ 1597 *loc = 1; 1598 1599 ref = pmap_is_referenced(pg); 1600 mod = pmap_is_modified(pg); 1601 printf("Modified page: ref %d, mod %d\n", 1602 ref, mod); 1603 1604 /* Now clear reference and modify */ 1605 ref = pmap_clear_reference(pg); 1606 mod = pmap_clear_modify(pg); 1607 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1608 (void *)(u_long)va, (long)pa, 1609 ref, mod); 1610 1611 /* Check it's properly cleared */ 1612 ref = pmap_is_referenced(pg); 1613 mod = pmap_is_modified(pg); 1614 printf("Checking cleared page: ref %d, mod %d\n", 1615 ref, mod); 1616 1617 /* Modify page */ 1618 *loc = 1; 1619 1620 ref = pmap_is_referenced(pg); 1621 mod = pmap_is_modified(pg); 1622 printf("Modified page: ref %d, mod %d\n", 1623 ref, mod); 1624 1625 /* Check pmap_protect() */ 1626 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ); 1627 pmap_update(pmap_kernel()); 1628 ref = pmap_is_referenced(pg); 1629 mod = pmap_is_modified(pg); 1630 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n", 1631 ref, mod); 1632 1633 /* Now clear reference and modify */ 1634 ref = pmap_clear_reference(pg); 1635 mod = pmap_clear_modify(pg); 1636 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1637 (void *)(u_long)va, (long)pa, 1638 ref, mod); 1639 1640 /* Reference page */ 1641 val = *loc; 1642 1643 ref = pmap_is_referenced(pg); 1644 mod = pmap_is_modified(pg); 1645 printf("Referenced page: ref %d, mod %d val %x\n", 1646 ref, mod, val); 1647 1648 /* Now clear reference and modify */ 1649 ref = pmap_clear_reference(pg); 1650 mod = pmap_clear_modify(pg); 1651 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1652 (void *)(u_long)va, (long)pa, 1653 ref, mod); 1654 1655 /* Modify page */ 1656 #if 0 1657 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1658 pmap_update(pmap_kernel()); 1659 #endif 1660 *loc = 1; 1661 1662 ref = pmap_is_referenced(pg); 1663 mod = pmap_is_modified(pg); 1664 printf("Modified page: ref %d, mod %d\n", 1665 ref, mod); 1666 1667 /* Check pmap_protect() */ 1668 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE); 1669 pmap_update(pmap_kernel()); 1670 ref = pmap_is_referenced(pg); 1671 mod = pmap_is_modified(pg); 1672 printf("pmap_protect(): ref %d, mod %d\n", 1673 ref, mod); 1674 1675 /* Now clear reference and modify */ 1676 ref = pmap_clear_reference(pg); 1677 mod = pmap_clear_modify(pg); 1678 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1679 (void *)(u_long)va, (long)pa, 1680 ref, mod); 1681 1682 /* Reference page */ 1683 val = *loc; 1684 1685 ref = pmap_is_referenced(pg); 1686 mod = pmap_is_modified(pg); 1687 printf("Referenced page: ref %d, mod %d val %x\n", 1688 ref, mod, val); 1689 1690 /* Now clear reference and modify */ 1691 ref = pmap_clear_reference(pg); 1692 mod = pmap_clear_modify(pg); 1693 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1694 (void *)(u_long)va, (long)pa, 1695 ref, mod); 1696 1697 /* Modify page */ 1698 #if 0 1699 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1700 pmap_update(pmap_kernel()); 1701 #endif 1702 *loc = 1; 1703 1704 ref = pmap_is_referenced(pg); 1705 mod = pmap_is_modified(pg); 1706 printf("Modified page: ref %d, mod %d\n", 1707 ref, mod); 1708 1709 /* Check pmap_pag_protect() */ 1710 pmap_page_protect(pg, VM_PROT_READ); 1711 ref = pmap_is_referenced(pg); 1712 mod = pmap_is_modified(pg); 1713 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n", 1714 ref, mod); 1715 1716 /* Now clear reference and modify */ 1717 ref = pmap_clear_reference(pg); 1718 mod = pmap_clear_modify(pg); 1719 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1720 (void *)(u_long)va, (long)pa, 1721 ref, mod); 1722 1723 /* Reference page */ 1724 val = *loc; 1725 1726 ref = pmap_is_referenced(pg); 1727 mod = pmap_is_modified(pg); 1728 printf("Referenced page: ref %d, mod %d val %x\n", 1729 ref, mod, val); 1730 1731 /* Now clear reference and modify */ 1732 ref = pmap_clear_reference(pg); 1733 mod = pmap_clear_modify(pg); 1734 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1735 (void *)(u_long)va, (long)pa, 1736 ref, mod); 1737 1738 /* Modify page */ 1739 #if 0 1740 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1741 pmap_update(pmap_kernel()); 1742 #endif 1743 *loc = 1; 1744 1745 ref = pmap_is_referenced(pg); 1746 mod = pmap_is_modified(pg); 1747 printf("Modified page: ref %d, mod %d\n", 1748 ref, mod); 1749 1750 /* Check pmap_pag_protect() */ 1751 pmap_page_protect(pg, VM_PROT_NONE); 1752 ref = pmap_is_referenced(pg); 1753 mod = pmap_is_modified(pg); 1754 printf("pmap_page_protect(): ref %d, mod %d\n", 1755 ref, mod); 1756 1757 /* Now clear reference and modify */ 1758 ref = pmap_clear_reference(pg); 1759 mod = pmap_clear_modify(pg); 1760 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1761 (void *)(u_long)va, (long)pa, 1762 ref, mod); 1763 1764 1765 /* Reference page */ 1766 val = *loc; 1767 1768 ref = pmap_is_referenced(pg); 1769 mod = pmap_is_modified(pg); 1770 printf("Referenced page: ref %d, mod %d val %x\n", 1771 ref, mod, val); 1772 1773 /* Now clear reference and modify */ 1774 ref = pmap_clear_reference(pg); 1775 mod = pmap_clear_modify(pg); 1776 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1777 (void *)(u_long)va, (long)pa, 1778 ref, mod); 1779 1780 /* Modify page */ 1781 #if 0 1782 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0); 1783 pmap_update(pmap_kernel()); 1784 #endif 1785 *loc = 1; 1786 1787 ref = pmap_is_referenced(pg); 1788 mod = pmap_is_modified(pg); 1789 printf("Modified page: ref %d, mod %d\n", 1790 ref, mod); 1791 1792 /* Unmap page */ 1793 pmap_remove(pmap_kernel(), va, va+1); 1794 pmap_update(pmap_kernel()); 1795 ref = pmap_is_referenced(pg); 1796 mod = pmap_is_modified(pg); 1797 printf("Unmapped page: ref %d, mod %d\n", ref, mod); 1798 1799 /* Now clear reference and modify */ 1800 ref = pmap_clear_reference(pg); 1801 mod = pmap_clear_modify(pg); 1802 printf("Clearing page va %p pa %lx: ref %d, mod %d\n", 1803 (void *)(u_long)va, (long)pa, ref, mod); 1804 1805 /* Check it's properly cleared */ 1806 ref = pmap_is_referenced(pg); 1807 mod = pmap_is_modified(pg); 1808 printf("Checking cleared page: ref %d, mod %d\n", 1809 ref, mod); 1810 1811 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 1812 VM_PROT_ALL|PMAP_WIRED); 1813 uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE); 1814 } 1815 #endif 1816