1 /* $NetBSD: pci_machdep.c,v 1.9 2011/06/18 06:41:42 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 * 40 * The configuration method can be hard-coded in the config file by 41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 42 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.9 2011/06/18 06:41:42 matt Exp $"); 47 48 #include <sys/types.h> 49 #include <sys/param.h> 50 #include <sys/time.h> 51 #include <sys/systm.h> 52 #include <sys/errno.h> 53 #include <sys/device.h> 54 #include <sys/extent.h> 55 #include <sys/bus.h> 56 #include <sys/intr.h> 57 58 #include <uvm/uvm_extern.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 #include <dev/pci/pcidevs.h> 63 #include <dev/pci/pciconf.h> 64 65 #include <powerpc/ibm4xx/ibm405gp.h> 66 #include <powerpc/ibm4xx/dev/pcicreg.h> 67 68 static struct powerpc_bus_space pci_iot = { 69 _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE, 70 0x00000000, 71 IBM405GP_PCIC0_BASE, /* extent base */ 72 IBM405GP_PCIC0_BASE + 8, /* extent limit */ 73 }; 74 75 static bus_space_handle_t pci_ioh; 76 77 void 78 pci_machdep_init(void) 79 { 80 81 if (pci_ioh == 0 && 82 (bus_space_init(&pci_iot, "pcicfg", NULL, 0) || 83 bus_space_map(&pci_iot, IBM405GP_PCIC0_BASE, 8, 0, &pci_ioh))) 84 panic("Cannot map PCI registers"); 85 } 86 87 void 88 pci_attach_hook(device_t parent, device_t self, 89 struct pcibus_attach_args *pba) 90 { 91 92 #ifdef PCI_CONFIGURE_VERBOSE 93 printf("pci_attach_hook\n"); 94 ibm4xx_show_pci_map(); 95 #endif 96 ibm4xx_setup_pci(); 97 #ifdef PCI_CONFIGURE_VERBOSE 98 ibm4xx_show_pci_map(); 99 #endif 100 } 101 102 pcitag_t 103 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 104 { 105 pcitag_t tag; 106 107 if (bus >= 256 || device >= 32 || function >= 8) 108 panic("pci_make_tag: bad request"); 109 110 /* XXX magic number */ 111 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8); 112 113 return tag; 114 } 115 116 void 117 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 118 { 119 120 if (bp != NULL) 121 *bp = (tag >> 16) & 0xff; 122 if (dp != NULL) 123 *dp = (tag >> 11) & 0x1f; 124 if (fp != NULL) 125 *fp = (tag >> 8) & 0x07; 126 } 127 128 pcireg_t 129 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 130 { 131 pcireg_t data; 132 133 /* 405GT BIOS disables interrupts here. Should we? --Art */ 134 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg); 135 data = bus_space_read_4(&pci_iot, pci_ioh, PCIC_CFGDATA); 136 /* 405GP pass2 errata #6 */ 137 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0); 138 return data; 139 } 140 141 void 142 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 143 { 144 145 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg); 146 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGDATA, data); 147 /* 405GP pass2 errata #6 */ 148 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0); 149 } 150 151 const char * 152 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 153 { 154 static char irqstr[8]; /* 4 + 2 + NUL + sanity */ 155 156 /* Make sure it looks sane, intr_establish does the real check. */ 157 if (ih < 0 || ih > 99) 158 panic("pci_intr_string: handle %d won't fit two digits", ih); 159 160 sprintf(irqstr, "irq %d", ih); 161 return (irqstr); 162 163 } 164 165 const struct evcnt * 166 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 167 { 168 169 /* XXX for now, no evcnt parent reported */ 170 return NULL; 171 } 172 173 int 174 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 175 int attr, uint64_t data) 176 { 177 178 switch (attr) { 179 case PCI_INTR_MPSAFE: 180 return 0; 181 default: 182 return ENODEV; 183 } 184 } 185 186 void * 187 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 188 int (*func)(void *), void *arg) 189 { 190 return intr_establish(ih, IST_LEVEL, level, func, arg); 191 } 192 193 void 194 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 195 { 196 197 intr_disestablish(cookie); 198 } 199 200 /* Avoid overconfiguration */ 201 int 202 pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, pcireg_t id) 203 { 204 205 if ((PCI_VENDOR(id) == PCI_VENDOR_IBM && PCI_PRODUCT(id) == PCI_PRODUCT_IBM_405GP) || 206 (PCI_VENDOR(id) == PCI_VENDOR_INTEL && PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_80960_RP)) { 207 /* Don't configure the bridge and PCI probe. */ 208 return 0; 209 } 210 return PCI_CONF_DEFAULT; 211 } 212