xref: /netbsd-src/sys/arch/powerpc/ibm4xx/dev/opb.c (revision 5bbd2a12505d72a8177929a37b5cee489d0a1cfd)
1 /* $NetBSD: opb.c,v 1.26 2011/06/18 06:41:42 matt Exp $ */
2 
3 /*
4  * Copyright 2001,2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
40  *
41  * Redistribution and use in source and binary forms, with or without
42  * modification, are permitted provided that the following conditions
43  * are met:
44  * 1. Redistributions of source code must retain the above copyright
45  *    notice, this list of conditions and the following disclaimer.
46  * 2. Redistributions in binary form must reproduce the above copyright
47  *    notice, this list of conditions and the following disclaimer in the
48  *    documentation and/or other materials provided with the distribution.
49  * 3. All advertising materials mentioning features or use of this software
50  *    must display the following acknowledgement:
51  *      This product includes software developed by Christopher G. Demetriou
52  *	for the NetBSD Project.
53  * 4. The name of the author may not be used to endorse or promote products
54  *    derived from this software without specific prior written permission
55  *
56  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
57  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
58  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
60  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
61  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
63  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
64  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
65  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
66  */
67 
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.26 2011/06/18 06:41:42 matt Exp $");
70 
71 #include "locators.h"
72 #include "opt_emac.h"
73 
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/device.h>
77 #include <sys/extent.h>
78 #include <sys/cpu.h>
79 
80 #include <powerpc/ibm4xx/cpu.h>
81 #include <powerpc/ibm4xx/dcr4xx.h>
82 
83 #include <powerpc/ibm4xx/dev/opbreg.h>
84 #include <powerpc/ibm4xx/dev/opbvar.h>
85 #include <powerpc/ibm4xx/dev/plbvar.h>
86 #include <powerpc/ibm4xx/dev/rgmiireg.h>
87 #include <powerpc/ibm4xx/dev/zmiireg.h>
88 
89 #include <powerpc/spr.h>
90 #include <powerpc/ibm4xx/spr.h>
91 
92 #include <powerpc/ibm4xx/ibm405gp.h>
93 #include <powerpc/ibm4xx/amcc405ex.h>
94 
95 static int opb_get_frequency_405gp(void);
96 static int opb_get_frequency_405ex(void);
97 
98 
99 /*
100  * The devices on the On-chip Peripheral Bus to the 405GP/EX CPU.
101  */
102 const struct opb_dev {
103 	int pvr;
104 	const char *name;
105 	bus_addr_t addr;
106 	int instance;
107 	int irq;
108 	int flags;
109 } opb_devs [] = {
110 	/* IBM405GP */
111 	{ IBM405GP,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
112 	{ IBM405GP,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
113 	{ IBM405GP,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
114 	{ IBM405GP,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
115 	{ IBM405GP,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
116 	{ IBM405GP,	"wdog",	-1,	        	0, -1, 0 },
117 
118 	/* IBM405GPR */
119 	{ IBM405GPR,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
120 	{ IBM405GPR,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
121 	{ IBM405GPR,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
122 	{ IBM405GPR,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
123 	{ IBM405GPR,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
124 	{ IBM405GPR,	"wdog",	-1,	        	0, -1, 0 },
125 
126 	/* AMCC405EX */
127 	{ AMCC405EX,	"gpt",	AMCC405EX_GPT0_BASE,	 0, -1, 0 },
128 	{ AMCC405EX,	"com",	AMCC405EX_UART0_BASE,	 0, 26, 0 },
129 	{ AMCC405EX,	"com",	AMCC405EX_UART1_BASE,	 1,  1, 0 },
130 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC0_BASE,	 0,  2, 0 },
131 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC1_BASE,	 1,  7, 0 },
132 	{ AMCC405EX,	"scp",	AMCC405EX_SCP0_BASE,	 0,  8, 0 }, /* SPI */
133 	{ AMCC405EX,	"opbgpio",	AMCC405EX_GPIO0_BASE,	-1, -1, 0 },
134 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC0_BASE,	 0, 24,
135 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
136 	    OPB_FLAGS_EMAC_RMII_RGMII },
137 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC1_BASE,	 1, 25,
138 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
139 	    OPB_FLAGS_EMAC_RMII_RGMII },
140 	{ AMCC405EX,	"wdog",	-1,			 0, -1, 0 },
141 
142 	{ 0,		 NULL }
143 };
144 
145 int (*opb_get_frequency)(void);
146 const struct opb_param {
147 	int pvr;
148 	bus_addr_t base;
149 	bus_addr_t limit;
150 	int (*opb_get_frequency)(void);
151 	bus_addr_t zmii_base;
152 	bus_addr_t rgmii_base;
153 } opb_params[] = {
154 	{ IBM405GP,
155 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
156 	    opb_get_frequency_405gp,
157 	    0,				0 },
158 	{ IBM405GPR,
159 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
160 	    opb_get_frequency_405gp,
161 	    0,				0 },
162 	{ AMCC405EX,
163 	    AMCC405EX_OPB_BASE,	AMCC405EX_OPB_BASE + OPBREG_SIZE,
164 	    opb_get_frequency_405ex,
165 	    0,				AMCC405EX_RGMIIB0_BASE},
166 
167 	{ 0 }
168 };
169 
170 static int	opb_match(device_t, cfdata_t, void *);
171 static void	opb_attach(device_t, device_t, void *);
172 static int	opb_submatch(device_t, cfdata_t, const int *, void *);
173 static int	opb_print(void *, const char *);
174 
175 CFATTACH_DECL_NEW(opb, sizeof(struct opb_softc),
176     opb_match, opb_attach, NULL, NULL);
177 
178 static struct powerpc_bus_space opb_tag = {
179 	_BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE,
180 	0x00000000,
181 };
182 static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
183     __attribute__((aligned(8)));
184 static int opb_tag_init_done;
185 
186 /*
187  * Probe for the opb; always succeeds.
188  */
189 static int
190 opb_match(device_t parent, cfdata_t cf, void *aux)
191 {
192 	struct opb_attach_args *oaa = aux;
193 
194 	/* match only opb devices */
195 	if (strcmp(oaa->opb_name, cf->cf_name) != 0)
196 		return 0;
197 
198 	return 1;
199 }
200 
201 static int
202 opb_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
203 {
204 	struct opb_attach_args *oaa = aux;
205 
206 	if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT &&
207 	    cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr)
208 		return 0;
209 
210 	return config_match(parent, cf, aux);
211 }
212 
213 /*
214  * Attach the on-chip peripheral bus.
215  */
216 static void
217 opb_attach(device_t parent, device_t self, void *aux)
218 {
219 	struct opb_softc *sc = device_private(self);
220 	struct plb_attach_args *paa = aux;
221 	struct opb_attach_args oaa;
222 	int i, pvr;
223 
224 	aprint_naive("\n");
225 	aprint_normal("\n");
226 	pvr = mfpvr() >> 16;
227 
228 	sc->sc_dev = self;
229 	sc->sc_iot = opb_get_bus_space_tag();
230 
231 	for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; i++)
232 		;
233 	if (opb_params[i].pvr == 0)
234 		panic("opb_get_bus_space_tag: no params for this CPU!");
235 	opb_get_frequency = opb_params[i].opb_get_frequency;
236 #ifdef EMAC_ZMII_PHY
237 	if (opb_params[i].zmii_base != 0)
238 		bus_space_map(sc->sc_iot, opb_params[i].zmii_base, ZMII0_SIZE,
239 		    0, &sc->sc_zmiih);
240 #endif
241 #ifdef EMAC_RGMII_PHY
242 	if (opb_params[i].rgmii_base != 0)
243 		bus_space_map(sc->sc_iot, opb_params[i].rgmii_base, RGMII0_SIZE,
244 		    0, &sc->sc_rgmiih);
245 #endif
246 
247 	for (i = 0; opb_devs[i].name != NULL; i++) {
248 		if (opb_devs[i].pvr != pvr)
249 			continue;
250 		oaa.opb_name = opb_devs[i].name;
251 		oaa.opb_addr = opb_devs[i].addr;
252 		oaa.opb_instance = opb_devs[i].instance;
253 		oaa.opb_irq = opb_devs[i].irq;
254 		oaa.opb_bt = sc->sc_iot;
255 		oaa.opb_dmat = paa->plb_dmat;
256 		oaa.opb_flags = opb_devs[i].flags;
257 
258 		(void) config_found_sm_loc(self, "opb", NULL, &oaa, opb_print,
259 					   opb_submatch);
260 	}
261 }
262 
263 static int
264 opb_print(void *aux, const char *pnp)
265 {
266 	struct opb_attach_args *oaa = aux;
267 
268 	if (pnp)
269 		aprint_normal("%s at %s", oaa->opb_name, pnp);
270 
271 	if (oaa->opb_addr != OPBCF_ADDR_DEFAULT)
272 		aprint_normal(" addr 0x%08lx", oaa->opb_addr);
273 	if (oaa->opb_irq != OPBCF_IRQ_DEFAULT)
274 		aprint_normal(" irq %d", oaa->opb_irq);
275 
276 	return UNCONF;
277 }
278 
279 bus_space_tag_t
280 opb_get_bus_space_tag(void)
281 {
282 	int i, pvr;
283 
284 	if (!opb_tag_init_done) {
285 		pvr = mfpvr() >> 16;
286 
287 		for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr;
288 		    i++)
289 			;
290 		if (opb_params[i].pvr == 0)
291 			panic("opb_get_bus_space_tag: no params for this CPU!");
292 
293 		opb_tag.pbs_base = opb_params[i].base;
294 		opb_tag.pbs_limit = opb_params[i].limit;
295 
296 		if (bus_space_init(&opb_tag, "opbtag",
297 		    ex_storage, sizeof(ex_storage)))
298 			panic("opb_attach: Failed to initialise opb_tag");
299 		opb_tag_init_done = 1;
300 	}
301 
302 	return &opb_tag;
303 }
304 
305 static int
306 opb_get_frequency_405gp(void)
307 {
308 	prop_number_t pn;
309 	uint32_t pllmr;
310 	unsigned int processor_freq, plb_freq, opb_freq;
311 
312 	pn = prop_dictionary_get(board_properties, "processor-frequency");
313 	KASSERT(pn != NULL);
314 	processor_freq = (unsigned int) prop_number_integer_value(pn);
315 	pllmr = mfdcr(DCR_CPC0_PLLMR);
316 	plb_freq = processor_freq / CPC0_PLLMR_CBDV(pllmr);
317 	opb_freq = plb_freq / CPC0_PLLMR_OPDV(pllmr);
318 
319 	return opb_freq;
320 }
321 
322 static int
323 opb_get_frequency_405ex(void)
324 {
325 	prop_number_t pn;
326 	unsigned int processor_freq, plb_freq, opb_freq;
327 
328 	pn = prop_dictionary_get(board_properties, "processor-frequency");
329 	KASSERT(pn != NULL);
330 	processor_freq = (unsigned int) prop_number_integer_value(pn);
331 	plb_freq = processor_freq / CPR0_PLBDV0(mfcpr(DCR_CPR0_PLBD));
332 	opb_freq = plb_freq / CPR0_OPBDV0(mfcpr(DCR_CPR0_OPBD));
333 
334 	return opb_freq;
335 }
336