1 /* $NetBSD: ibm405gp.c,v 1.1 2002/12/09 12:28:12 scw Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/device.h> 40 #include <sys/systm.h> 41 42 #include <machine/bus.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <powerpc/ibm4xx/ibm405gp.h> 46 #include <powerpc/ibm4xx/dev/pcicreg.h> 47 48 static bus_space_tag_t pcicfg_iot = ibm4xx_make_bus_space_tag(0, 0); 49 static bus_space_handle_t pcicfg_ioh = 0; 50 51 #define PCI0_MEM_BASE 0x80000000 52 53 static void setup_pcicfg_window(void) 54 { 55 if (pcicfg_ioh) 56 return; 57 if (bus_space_map(pcicfg_iot, IBM405GP_PCIL0_BASE, 0x40 , 0, &pcicfg_ioh)) 58 panic("Cannot map PCI configuration registers"); 59 } 60 61 /* 62 * Setup proper Local<->PCI mapping 63 * PCI memory window: 256M @ PCI0MEMBASE with direct memory translation 64 */ 65 void ibm4xx_setup_pci(void) 66 { 67 pcitag_t tag; 68 69 setup_pcicfg_window(); 70 71 /* Disable all three memory mappers */ 72 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0x00000000); /* disabled */ 73 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA, 0x00000000); /* disabled */ 74 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA, 0x00000000); /* disabled */ 75 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0x00000000); /* Can't really disable PTM1. */ 76 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS, 0x00000000); /* disabled */ 77 78 79 /* Setup memory map #0 */ 80 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0xF0000001); /* 256M non-prefetchable, enabled */ 81 82 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA, PCI0_MEM_BASE); 83 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA, PCI0_MEM_BASE); 84 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA, 0); 85 86 /* Configure PCI bridge */ 87 tag = pci_make_tag(0, 0, 0, 0); 88 // x = pci_conf_read(0, tag, PCI0_CMD); /* Read PCI command register */ 89 // pci_conf_write(0, tag, PCI0_CMD, x | MA | ME); /* enable bus mastering and memory space */ 90 91 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0xF0000001); /* Enable PTM1 */ 92 bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA, 0); 93 pci_conf_write(0, tag, PCIC_PTM1BAR, 0); /* Set up proper PCI->Local address base. Always enabled */ 94 pci_conf_write(0, tag, PCIC_PTM2BAR, 0); 95 } 96 97 void ibm4xx_show_pci_map(void) 98 { 99 paddr_t la, lm, pl, ph; 100 pcitag_t tag; 101 102 setup_pcicfg_window(); 103 104 printf("Local -> PCI map\n"); 105 la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA); 106 lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA); 107 pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA); 108 ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA); 109 printf("0: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl, 110 (lm & 2) ? "":"not ", 111 (lm & 1) ? "enabled":"disabled"); 112 la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1LA); 113 lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA); 114 pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCILA); 115 ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCIHA); 116 printf("1: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl, 117 (lm & 2) ? "":"not ", 118 (lm & 1) ? "enabled":"disabled"); 119 la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2LA); 120 lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA); 121 pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCILA); 122 ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCIHA); 123 printf("2: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl, 124 (lm & 2) ? "":"not ", 125 (lm & 1) ? "enabled":"disabled"); 126 printf("PCI -> Local map\n"); 127 128 tag = pci_make_tag(0, 0, 0, 0); 129 pl = pci_conf_read(0, tag, PCIC_PTM1BAR); 130 la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA); 131 lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS); 132 printf("1: %08lx -> %08lx,%08lx %s\n", pl, la, lm, 133 (lm & 1)?"enabled":"disabled"); 134 pl = pci_conf_read(0, tag, PCIC_PTM2BAR); 135 la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2LA); 136 lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS); 137 printf("2: %08lx -> %08lx,%08lx %s\n", pl, la, lm, 138 (lm & 1)?"enabled":"disabled"); 139 } 140