xref: /netbsd-src/sys/arch/powerpc/ibm4xx/clock.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: clock.c,v 1.22 2010/02/25 23:31:47 matt Exp $	*/
2 /*      $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $  */
3 
4 /*
5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6  * Copyright (C) 1995, 1996 TooLs GmbH.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by TooLs GmbH.
20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.22 2010/02/25 23:31:47 matt Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/timetc.h>
42 
43 #include <uvm/uvm_extern.h>
44 
45 #include <prop/proplib.h>
46 
47 #include <machine/cpu.h>
48 
49 #include <powerpc/spr.h>
50 #include <powerpc/ibm4xx/spr.h>
51 
52 /*
53  * Initially we assume a processor with a bus frequency of 12.5 MHz.
54  */
55 static u_long ticks_per_sec;
56 static u_long ns_per_tick;
57 static long ticks_per_intr;
58 static volatile u_long lasttb, lasttb2;
59 static u_long ticksmissed;
60 static volatile int tickspending;
61 
62 static void init_ppc4xx_tc(void);
63 static u_int get_ppc4xx_timecount(struct timecounter *);
64 
65 static struct timecounter ppc4xx_timecounter = {
66 	get_ppc4xx_timecount,	/* get_timecount */
67 	0,			/* no poll_pps */
68 	~0u,			/* counter_mask */
69 	0,			/* frequency */
70 	"ppc_timebase",		/* name */
71 	100,			/* quality */
72 	NULL,			/* tc_priv */
73 	NULL			/* tc_next */
74 };
75 
76 void decr_intr(struct clockframe *);	/* called from trap_subr.S */
77 void stat_intr(struct clockframe *);	/* called from trap_subr.S */
78 
79 #ifdef FAST_STAT_CLOCK
80 /* Stat clock runs at ~ 1.5 kHz */
81 #define PERIOD_POWER	17
82 #define TCR_PERIOD	TCR_FP_2_17
83 #else
84 /* Stat clock runs at ~ 95Hz */
85 #define PERIOD_POWER	21
86 #define TCR_PERIOD	TCR_FP_2_21
87 #endif
88 
89 
90 void
91 stat_intr(struct clockframe *frame)
92 {
93 
94 	mtspr(SPR_TSR, TSR_FIS);	/* Clear TSR[FIS] */
95 	uvmexp.intrs++;
96 	curcpu()->ci_ev_statclock.ev_count++;
97 
98 	/* Nobody can interrupt us, but see if we're allowed to run. */
99 	if (! (curcpu()->ci_cpl & mask_statclock))
100   		statclock(frame);
101 }
102 
103 void
104 decr_intr(struct clockframe *frame)
105 {
106 	int pri;
107 	long tbtick, xticks;
108 	int nticks;
109 
110 	/*
111 	 * Check whether we are initialized.
112 	 */
113 	if (!ticks_per_intr)
114 		return;
115 
116 	tbtick = mftbl();
117 	mtspr(SPR_TSR, TSR_PIS);	/* Clear TSR[PIS] */
118 
119 	xticks = tbtick - lasttb2;	/* Number of TLB cycles since last exception */
120 	for (nticks = 0; xticks > ticks_per_intr; nticks++)
121 		xticks -= ticks_per_intr;
122 	lasttb2 = tbtick - xticks;
123 
124 	uvmexp.intrs++;
125 	curcpu()->ci_ev_clock.ev_count++;
126 	pri = splclock();
127 	if (pri & mask_clock) {
128 		tickspending += nticks;
129 		ticksmissed += nticks;
130 	} else {
131 		nticks += tickspending;
132 		tickspending = 0;
133 
134 		/*
135 		 * lasttb is used during microtime. Set it to the virtual
136 		 * start of this tick interval.
137 		 */
138 		lasttb = lasttb2;
139 
140 		/*
141 		 * Reenable interrupts
142 		 */
143 		__asm volatile ("wrteei 1");
144 
145 		/*
146 		 * Do standard timer interrupt stuff.
147 		 * Do softclock stuff only on the last iteration.
148 		 */
149 		frame->pri = pri | mask_clock;
150 		while (--nticks > 0)
151 			hardclock(frame);
152 		frame->pri = pri;
153 		hardclock(frame);
154 	}
155 	splx(pri);
156 }
157 
158 void
159 cpu_initclocks(void)
160 {
161 	/* Initialized in powerpc/ibm4xx/cpu.c */
162 	evcnt_attach_static(&curcpu()->ci_ev_clock);
163 	evcnt_attach_static(&curcpu()->ci_ev_statclock);
164 
165 	ticks_per_intr = ticks_per_sec / hz;
166 	stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER);
167 
168 	printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz,
169 	    ticks_per_intr);
170 
171 	lasttb2 = lasttb = mftbl();
172 	mtspr(SPR_PIT, ticks_per_intr);
173 
174 	/* Enable PIT & FIT(2^17c = 0.655ms) interrupts and auto-reload */
175 	mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
176 
177 	init_ppc4xx_tc();
178 }
179 
180 void
181 calc_delayconst(void)
182 {
183 	prop_number_t freq;
184 
185 	freq = prop_dictionary_get(board_properties, "processor-frequency");
186 	KASSERT(freq != NULL);
187 
188 	ticks_per_sec = (u_long) prop_number_integer_value(freq);
189 	ns_per_tick = 1000000000 / ticks_per_sec;
190 }
191 
192 static u_int
193 get_ppc4xx_timecount(struct timecounter *tc)
194 {
195 	u_long tb;
196 	int msr;
197 
198 	__asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr) :);
199 	tb = mftbl();
200 	__asm volatile ("mtmsr %0" :: "r"(msr));
201 
202 	return tb;
203 }
204 
205 /*
206  * Wait for about n microseconds (at least!).
207  */
208 void
209 delay(unsigned int n)
210 {
211 	u_quad_t tb;
212 	u_long tbh, tbl, scratch;
213 
214 	tb = mftb();
215 	/* use 1000ULL to force 64 bit math to avoid 32 bit overflows */
216 	tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick;
217 	tbh = tb >> 32;
218 	tbl = tb;
219 	__asm volatile (
220 #ifdef PPC_IBM403
221 	    "1:	mftbhi %0	\n"
222 #else
223 	    "1:	mftbu %0	\n"
224 #endif
225 	    "	cmplw %0,%1	\n"
226 	    "	blt 1b		\n"
227 	    "	bgt 2f		\n"
228 #ifdef PPC_IBM403
229 	    "	mftblo %0	\n"
230 #else
231 	    "	mftb %0		\n"
232 #endif
233 	    "	cmplw %0,%2	\n"
234 	    "	blt 1b		\n"
235 	    "2: 		\n"
236 	    : "=&r"(scratch) : "r"(tbh), "r"(tbl) : "cr0");
237 }
238 
239 /*
240  * Nothing to do.
241  */
242 void
243 setstatclockrate(int arg)
244 {
245 
246 	/* Do nothing */
247 }
248 
249 static void
250 init_ppc4xx_tc(void)
251 {
252 	/* from machdep initialization */
253 	ppc4xx_timecounter.tc_frequency = ticks_per_sec;
254 	tc_init(&ppc4xx_timecounter);
255 }
256