xref: /netbsd-src/sys/arch/powerpc/ibm4xx/clock.c (revision 56a34939419542e88b386b2229be7565f4f45461)
1 /*	$NetBSD: clock.c,v 1.21 2008/01/09 06:50:36 simonb Exp $	*/
2 /*      $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $  */
3 
4 /*
5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6  * Copyright (C) 1995, 1996 TooLs GmbH.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by TooLs GmbH.
20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.21 2008/01/09 06:50:36 simonb Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/timetc.h>
42 
43 #include <uvm/uvm_extern.h>
44 
45 #include <prop/proplib.h>
46 
47 #include <machine/cpu.h>
48 
49 #include <powerpc/spr.h>
50 
51 /*
52  * Initially we assume a processor with a bus frequency of 12.5 MHz.
53  */
54 static u_long ticks_per_sec;
55 static u_long ns_per_tick;
56 static long ticks_per_intr;
57 static volatile u_long lasttb, lasttb2;
58 static u_long ticksmissed;
59 static volatile int tickspending;
60 
61 static void init_ppc4xx_tc(void);
62 static u_int get_ppc4xx_timecount(struct timecounter *);
63 
64 static struct timecounter ppc4xx_timecounter = {
65 	get_ppc4xx_timecount,	/* get_timecount */
66 	0,			/* no poll_pps */
67 	~0u,			/* counter_mask */
68 	0,			/* frequency */
69 	"ppc_timebase",		/* name */
70 	100,			/* quality */
71 	NULL,			/* tc_priv */
72 	NULL			/* tc_next */
73 };
74 
75 void decr_intr(struct clockframe *);	/* called from trap_subr.S */
76 void stat_intr(struct clockframe *);	/* called from trap_subr.S */
77 
78 #ifdef FAST_STAT_CLOCK
79 /* Stat clock runs at ~ 1.5 kHz */
80 #define PERIOD_POWER	17
81 #define TCR_PERIOD	TCR_FP_2_17
82 #else
83 /* Stat clock runs at ~ 95Hz */
84 #define PERIOD_POWER	21
85 #define TCR_PERIOD	TCR_FP_2_21
86 #endif
87 
88 
89 void
90 stat_intr(struct clockframe *frame)
91 {
92 
93 	mtspr(SPR_TSR, TSR_FIS);	/* Clear TSR[FIS] */
94 	uvmexp.intrs++;
95 	curcpu()->ci_ev_statclock.ev_count++;
96 
97 	/* Nobody can interrupt us, but see if we're allowed to run. */
98 	if (! (curcpu()->ci_cpl & mask_statclock))
99   		statclock(frame);
100 }
101 
102 void
103 decr_intr(struct clockframe *frame)
104 {
105 	int pri;
106 	long tbtick, xticks;
107 	int nticks;
108 
109 	/*
110 	 * Check whether we are initialized.
111 	 */
112 	if (!ticks_per_intr)
113 		return;
114 
115 	tbtick = mftbl();
116 	mtspr(SPR_TSR, TSR_PIS);	/* Clear TSR[PIS] */
117 
118 	xticks = tbtick - lasttb2;	/* Number of TLB cycles since last exception */
119 	for (nticks = 0; xticks > ticks_per_intr; nticks++)
120 		xticks -= ticks_per_intr;
121 	lasttb2 = tbtick - xticks;
122 
123 	uvmexp.intrs++;
124 	curcpu()->ci_ev_clock.ev_count++;
125 	pri = splclock();
126 	if (pri & mask_clock) {
127 		tickspending += nticks;
128 		ticksmissed += nticks;
129 	} else {
130 		nticks += tickspending;
131 		tickspending = 0;
132 
133 		/*
134 		 * lasttb is used during microtime. Set it to the virtual
135 		 * start of this tick interval.
136 		 */
137 		lasttb = lasttb2;
138 
139 		/*
140 		 * Reenable interrupts
141 		 */
142 		__asm volatile ("wrteei 1");
143 
144 		/*
145 		 * Do standard timer interrupt stuff.
146 		 * Do softclock stuff only on the last iteration.
147 		 */
148 		frame->pri = pri | mask_clock;
149 		while (--nticks > 0)
150 			hardclock(frame);
151 		frame->pri = pri;
152 		hardclock(frame);
153 	}
154 	splx(pri);
155 }
156 
157 void
158 cpu_initclocks(void)
159 {
160 	/* Initialized in powerpc/ibm4xx/cpu.c */
161 	evcnt_attach_static(&curcpu()->ci_ev_clock);
162 	evcnt_attach_static(&curcpu()->ci_ev_statclock);
163 
164 	ticks_per_intr = ticks_per_sec / hz;
165 	stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER);
166 
167 	printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz,
168 	    ticks_per_intr);
169 
170 	lasttb2 = lasttb = mftbl();
171 	mtspr(SPR_PIT, ticks_per_intr);
172 
173 	/* Enable PIT & FIT(2^17c = 0.655ms) interrupts and auto-reload */
174 	mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
175 
176 	init_ppc4xx_tc();
177 }
178 
179 void
180 calc_delayconst(void)
181 {
182 	prop_number_t freq;
183 
184 	freq = prop_dictionary_get(board_properties, "processor-frequency");
185 	KASSERT(freq != NULL);
186 
187 	ticks_per_sec = (u_long) prop_number_integer_value(freq);
188 	ns_per_tick = 1000000000 / ticks_per_sec;
189 }
190 
191 static u_int
192 get_ppc4xx_timecount(struct timecounter *tc)
193 {
194 	u_long tb;
195 	int msr;
196 
197 	__asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr) :);
198 	tb = mftbl();
199 	__asm volatile ("mtmsr %0" :: "r"(msr));
200 
201 	return tb;
202 }
203 
204 /*
205  * Wait for about n microseconds (at least!).
206  */
207 void
208 delay(unsigned int n)
209 {
210 	u_quad_t tb;
211 	u_long tbh, tbl, scratch;
212 
213 	tb = mftb();
214 	/* use 1000ULL to force 64 bit math to avoid 32 bit overflows */
215 	tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick;
216 	tbh = tb >> 32;
217 	tbl = tb;
218 	__asm volatile (
219 #ifdef PPC_IBM403
220 	    "1:	mftbhi %0	\n"
221 #else
222 	    "1:	mftbu %0	\n"
223 #endif
224 	    "	cmplw %0,%1	\n"
225 	    "	blt 1b		\n"
226 	    "	bgt 2f		\n"
227 #ifdef PPC_IBM403
228 	    "	mftblo %0	\n"
229 #else
230 	    "	mftb %0		\n"
231 #endif
232 	    "	cmplw %0,%2	\n"
233 	    "	blt 1b		\n"
234 	    "2: 		\n"
235 	    : "=&r"(scratch) : "r"(tbh), "r"(tbl) : "cr0");
236 }
237 
238 /*
239  * Nothing to do.
240  */
241 void
242 setstatclockrate(int arg)
243 {
244 
245 	/* Do nothing */
246 }
247 
248 static void
249 init_ppc4xx_tc(void)
250 {
251 	/* from machdep initialization */
252 	ppc4xx_timecounter.tc_frequency = ticks_per_sec;
253 	tc_init(&ppc4xx_timecounter);
254 }
255