xref: /netbsd-src/sys/arch/powerpc/ibm4xx/clock.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: clock.c,v 1.10 2004/09/02 08:22:58 scw Exp $	*/
2 /*      $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $  */
3 
4 /*
5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6  * Copyright (C) 1995, 1996 TooLs GmbH.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by TooLs GmbH.
20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.10 2004/09/02 08:22:58 scw Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/properties.h>
42 
43 #include <machine/cpu.h>
44 
45 #include <powerpc/spr.h>
46 
47 /*
48  * Initially we assume a processor with a bus frequency of 12.5 MHz.
49  */
50 static u_long ticks_per_sec;
51 static u_long ns_per_tick;
52 static long ticks_per_intr;
53 static volatile u_long lasttb;
54 static u_long ticksmissed;
55 static volatile int tickspending;
56 
57 void decr_intr(struct clockframe *);	/* called from trap_subr.S */
58 void stat_intr(struct clockframe *);	/* called from trap_subr.S */
59 
60 #ifdef FAST_STAT_CLOCK
61 /* Stat clock runs at ~ 1.5KHz */
62 #define PERIOD_POWER	17
63 #define TCR_PERIOD	TCR_FP_2_17
64 #else
65 /* Stat clock runs at ~ 95Hz */
66 #define PERIOD_POWER	21
67 #define TCR_PERIOD	TCR_FP_2_21
68 #endif
69 
70 
71 void
72 stat_intr(struct clockframe *frame)
73 {
74 	extern u_long intrcnt[];
75 
76 	mtspr(SPR_TSR, TSR_FIS);	/* Clear TSR[FIS] */
77 	intrcnt[CNT_STATCLOCK]++;
78   	statclock(frame);
79 }
80 
81 void
82 decr_intr(struct clockframe *frame)
83 {
84 	int pri;
85 	long tick, xticks;
86 	int nticks;
87 	extern u_long intrcnt[];
88 	/*
89 	 * Check whether we are initialized.
90 	 */
91 	if (!ticks_per_intr)
92 		return;
93 
94 	tick = mftbl();
95 	mtspr(SPR_TSR, TSR_PIS);	/* Clear TSR[PIS] */
96 	/*
97 	 * lasttb is used during microtime. Set it to the virtual
98 	 * start of this tick interval.
99 	 */
100 	xticks = tick - lasttb;	/* Number of TLB cycles since last exception */
101 	for (nticks = 0; xticks > ticks_per_intr; nticks++)
102 		xticks -= ticks_per_intr;
103 	lasttb = tick - xticks;
104 
105 	intrcnt[CNT_CLOCK]++;
106 	pri = splclock();
107 	if (pri & SPL_CLOCK) {
108 		tickspending += nticks;
109 		ticksmissed+= nticks;
110 	} else {
111 		nticks += tickspending;
112 		tickspending = 0;
113 
114 		/*
115 		 * Reenable interrupts
116 		 */
117 		asm volatile ("wrteei 1");
118 
119 		/*
120 		 * Do standard timer interrupt stuff.
121 		 * Do softclock stuff only on the last iteration.
122 		 */
123 		frame->pri = pri | SINT_CLOCK;
124 		while (--nticks > 0)
125 			hardclock(frame);
126 		frame->pri = pri;
127 		hardclock(frame);
128 	}
129 	splx(pri);
130 }
131 
132 void
133 cpu_initclocks(void)
134 {
135 
136 	ticks_per_intr = ticks_per_sec / hz;
137 	stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER);
138 	printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz, ticks_per_intr);
139 	lasttb = mftbl();
140 	mtspr(SPR_PIT, ticks_per_intr);
141 	/* Enable PIT & FIT(2^17c = 0.655ms) interrupts and auto-reload */
142 	mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
143 }
144 
145 void
146 calc_delayconst(void)
147 {
148 	unsigned int processor_freq;
149 
150 	if (board_info_get("processor-frequency",
151 		&processor_freq, sizeof(processor_freq)) == -1)
152 		panic("no processor-frequency");
153 
154 	ticks_per_sec = processor_freq;
155 	ns_per_tick = 1000000000 / ticks_per_sec;
156 }
157 
158 /*
159  * Fill in *tvp with current time with microsecond resolution.
160  */
161 void
162 microtime(struct timeval *tvp)
163 {
164 	u_long tb;
165 	u_long ticks;
166 	int msr;
167 
168 	asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr) :);
169 	tb = mftbl();
170 	ticks = (tb - lasttb) * ns_per_tick;
171 	*tvp = time;
172 	asm volatile ("mtmsr %0" :: "r"(msr));
173 	ticks /= 1000;
174 	tvp->tv_usec += ticks;
175 	while (tvp->tv_usec >= 1000000) {
176 		tvp->tv_usec -= 1000000;
177 		tvp->tv_sec++;
178 	}
179 }
180 
181 /*
182  * Wait for about n microseconds (at least!).
183  */
184 void
185 delay(unsigned int n)
186 {
187 	u_quad_t tb;
188 	u_long tbh, tbl, scratch;
189 
190 	tb = mftb();
191 	/* use 1000ULL to force 64 bit math to avoid 32 bit overflows */
192 	tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick;
193 	tbh = tb >> 32;
194 	tbl = tb;
195 	asm volatile (
196 #ifdef PPC_IBM403
197 	    "1:	mftbhi %0	\n"
198 #else
199 	    "1:	mftbu %0	\n"
200 #endif
201 	    "	cmplw %0,%1	\n"
202 	    "	blt 1b		\n"
203 	    "	bgt 2f		\n"
204 #ifdef PPC_IBM403
205 	    "	mftblo %0	\n"
206 #else
207 	    "	mftb %0		\n"
208 #endif
209 	    "	cmplw %0,%2	\n"
210 	    "	blt 1b		\n"
211 	    "2: 		\n"
212 	    : "=&r"(scratch) : "r"(tbh), "r"(tbl) : "cr0");
213 }
214 
215 /*
216  * Nothing to do.
217  */
218 void
219 setstatclockrate(int arg)
220 {
221 
222 	/* Do nothing */
223 }
224