xref: /netbsd-src/sys/arch/powerpc/fpu/fpu_arith.h (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: fpu_arith.h,v 1.1 2001/06/13 06:01:47 simonb Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_arith.h	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * Extended-precision arithmetic.
49  *
50  * We hold the notion of a `carry register', which may or may not be a
51  * machine carry bit or register.  On the SPARC, it is just the machine's
52  * carry bit.
53  *
54  * In the worst case, you can compute the carry from x+y as
55  *	(unsigned)(x + y) < (unsigned)x
56  * and from x+y+c as
57  *	((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
58  * for example.
59  */
60 
61 
62 #ifndef FPE_USE_ASM
63 
64 /* set up for extended-precision arithemtic */
65 #define	FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp;
66 
67 /*
68  * We have three kinds of add:
69  *	add with carry:					  r = x + y + c
70  *	add (ignoring current carry) and set carry:	c'r = x + y + 0
71  *	add with carry and set carry:			c'r = x + y + c
72  * The macros use `C' for `use carry' and `S' for `set carry'.
73  * Note that the state of the carry is undefined after ADDC and SUBC,
74  * so if all you have for these is `add with carry and set carry',
75  * that is OK.
76  *
77  * The same goes for subtract, except that we compute x - y - c.
78  *
79  * Finally, we have a way to get the carry into a `regular' variable,
80  * or set it from a value.  SET_CARRY turns 0 into no-carry, nonzero
81  * into carry; GET_CARRY sets its argument to 0 or 1.
82  */
83 #define	FPU_ADDC(r, x, y) \
84 	(r) = (x) + (y) + (!!fpu_carry)
85 #define	FPU_ADDS(r, x, y) \
86 	{ \
87 		fpu_tmp = (quad_t)(x) + (quad_t)(y); \
88 		(r) = (u_int)fpu_tmp; \
89 		fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
90 	}
91 #define	FPU_ADDCS(r, x, y) \
92 	{ \
93 		fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \
94 		(r) = (u_int)fpu_tmp; \
95 		fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
96 	}
97 #define	FPU_SUBC(r, x, y) \
98 	(r) = (x) - (y) - (!!fpu_carry)
99 #define	FPU_SUBS(r, x, y) \
100 	{ \
101 		fpu_tmp = (quad_t)(x) - (quad_t)(y); \
102 		(r) = (u_int)fpu_tmp; \
103 		fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
104 	}
105 #define	FPU_SUBCS(r, x, y) \
106 	{ \
107 		fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \
108 		(r) = (u_int)fpu_tmp; \
109 		fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
110 	}
111 
112 #define	FPU_GET_CARRY(r) (r) = (!!fpu_carry)
113 #define	FPU_SET_CARRY(v) fpu_carry = ((v) != 0)
114 
115 #else
116 /* set up for extended-precision arithemtic */
117 #define	FPU_DECL_CARRY
118 
119 /*
120  * We have three kinds of add:
121  *	add with carry:					  r = x + y + c
122  *	add (ignoring current carry) and set carry:	c'r = x + y + 0
123  *	add with carry and set carry:			c'r = x + y + c
124  * The macros use `C' for `use carry' and `S' for `set carry'.
125  * Note that the state of the carry is undefined after ADDC and SUBC,
126  * so if all you have for these is `add with carry and set carry',
127  * that is OK.
128  *
129  * The same goes for subtract, except that we compute x - y - c.
130  *
131  * Finally, we have a way to get the carry into a `regular' variable,
132  * or set it from a value.  SET_CARRY turns 0 into no-carry, nonzero
133  * into carry; GET_CARRY sets its argument to 0 or 1.
134  */
135 #define	FPU_ADDC(r, x, y) \
136 	__asm __volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
137 #define	FPU_ADDS(r, x, y) \
138 	__asm __volatile("addc %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
139 #define	FPU_ADDCS(r, x, y) \
140 	__asm __volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
141 #define	FPU_SUBC(r, x, y) \
142 	__asm __volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
143 #define	FPU_SUBS(r, x, y) \
144 	__asm __volatile("subfc %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
145 #define	FPU_SUBCS(r, x, y) \
146 	__asm __volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
147 
148 #define	FPU_GET_CARRY(r) __asm __volatile("li %0,0; addie %0,%0,0" : "=r"(r))
149 /* This one needs to destroy a temp register. */
150 #define	FPU_SET_CARRY(v) do { int __tmp;				\
151 		__asm __volatile("addic %0,%0,-1" : "r"(__tmp) : "r"(v)); \
152 	} while (0)
153 
154 #define	FPU_SHL1_BY_ADD	/* shift left 1 faster by ADDC than (a<<1)|(b>>31) */
155 #endif
156